TEXAS INSTRUMENTS INCORPORATED

Patent Trials and Appeals BoardMar 2, 2021

2020002470 (P.T.A.B. Mar. 2, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 15/960,537 04/23/2018 Cetin Kaya TI-77974 9598 23494 7590 03/02/2021 TEXAS INSTRUMENTS INCORPORATED P O BOX 655474, MS 3999 DALLAS, TX 75265 EXAMINER O TOOLE, COLLEEN J ART UNIT PAPER NUMBER 2849 NOTIFICATION DATE DELIVERY MODE 03/02/2021 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): uspto@ti.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ Ex parte CETIN KAYA and SERKAN DUSMEZ Appeal 2020-002470 Application 15/960,537 Technology Center 2800 ____________ Before GEORGE C. BEST, LILAN REN, and MICHAEL G. McMANUS, Administrative Patent Judges. McMANUS, Administrative Patent Judge. DECISION ON APPEAL Pursuant to 35 U.S.C. § 134(a), Appellant1 seeks review of the Examiner’s decision to reject claims 1–20. We have jurisdiction under 35 U.S.C. § 6(b). We affirm in part. 1 We use the word “Appellant” to refer to “applicant” as defined in 37 C.F.R. § 1.42. Appellant identifies the real party in interest as Texas Instruments Incorporated. Appeal Brief dated July 23, 2019 (“Appeal Br.”) 2. Appeal 2020-002470 Application 15/960,537 2 CLAIMED SUBJECT MATTER The present application generally relates to semiconductor switches. Specification dated Apr. 23, 2018 (“Spec.”) ¶ 1. The Specification teaches that the semiconductor switches can be MOSFETS (metal-oxide semiconductor field-effect transistors). Id. ¶ 11. The Specification teaches that the power-carrying capabilities of a MOSFET can be augmented by increasing its size; however, large MOSFETs are more difficult to manufacture and may result in excessive heat buildup. Id. Using multiple MOSFETs arranged in parallel reduces thermal buildup. Id. ¶ 14. The Specification teaches that “differences in a local temperature . . . of each of the paralleled MOSFETs can cause even virtually identical MOSFETs to conduct different amounts of currents for a given gate voltage.” Id. ¶ 15. The Specification teaches a method of controlling the relative switching time of a first MOSFET in a group of paralleled MOSFETs in order to control heat distribution. Id. ¶ 17. The first MOSFET can be controllably switched to control its junction temperature. Id. ¶ 18. A delay in switching the first MOSFET forces the second MOSFET initially to carry more of the load current, “such that the first MOSFET dissipates less energy (than otherwise) and the second MOSFET dissipates more energy (than otherwise).” Id. This results in the temperatures of the first and second MOSFETs being “urged towards a common temperature.” Id. Claims 1 and 14 are illustrative of the subject matter on appeal and are reproduced below with certain limitations bolded for emphasis: 1. An apparatus, comprising: a first power switching circuit coupled to receive a power switching control signal and arranged to activate a first Appeal 2020-002470 Application 15/960,537 3 power switch in response to the power switching control signal; and a second power switching circuit coupled to receive the power switching control signal, arranged to activate a second power switch in response to the power switching control signal, and arranged to determine a first power switching delay in response to a temperature indication of the second switch and in response to a combined temperature indication of the first and second power switches, wherein the second power switching circuit is arranged to activate the second power switch at a first delayed time after the activation of the first power switch, and wherein the first delayed time follows the activation of the first power switch by the determined first power switching delay. 14. The apparatus of claim 1, comprising the first and second power switches. Appeal Br. 9, 13 (Claims App.) (emphasis added). REJECTIONS The Examiner maintains the following rejections: 1. Claim 14 is rejected under 35 U.S.C. § 112(d) as being of improper dependent form. Final Office Action dated Sept. 25, 2018 (“Final Act.”) 2–3. 2. Claims 1–20 are rejected under 35 U.S.C. § 102(a)(1) as being anticipated by Lewis et al. (U.S. 2006/0061339 A1, published Mar. 23, 2006) (“Lewis”). Id. at 3–9. DISCUSSION Rejection 1. The Examiner rejects claim 14 as being of improper dependent form. Id. at 2–3. The Examiner determines that claim 14 fails to further limit the subject matter of the claim upon which it depends, or that it Appeal 2020-002470 Application 15/960,537 4 fails to include all the limitations of the claim upon which it depends. Id. at 2. The Examiner determines that “the first and second power switches” of claim 14 are already recited in claim 1. Id. On review, Appellant argues that “first power switch” and “second power switch” of claim 1 are not positively recited limitations. Appeal Br. 5. Appellant further argues that “first and second power switches” of claim 14 are positively recited. As a result, Appellant argues, claim 14 further limits claim 1. In the Answer, the Examiner construes claim 14 as taking antecedent basis from the power switch limitations of claim 1. That is, claim 14 includes the “first power switch” and “second power switch” of claim 1 (by dependency) as well as the recited “first and second power switches” of claim 14. Thus, Appellant’s construction would lead to essentially similar limitations being construed as limiting as recited in claim 14 but not in the portion of claim 14 incorporated from claim 1 by dependency. In the alternative, the “first power switch” and “second power switch” limitations of claim 1 would be construed as either limiting or nonlimiting in two different claims. This is contrary to law. “The principle that the same phrase in different claims of the same patent should have the same meaning is a strong one, overcome only if ‘it is clear” that the same phrase has different meanings in different claims.’” In re Varma, 816 F.3d 1352, 1363 (Fed. Cir. 2016; VirnetX Inc. v. Apple Inc., 792 F. App'x 796, 810 (Fed. Cir. 2019) (non-precedential) (rev’g claim construction giving phrase different meanings when used as a noun (“domain name service system”) and adjectival phrase (“domain name service”) in same claim). Appeal 2020-002470 Application 15/960,537 5 Further, the first and second power switches of claim 1 appear to be positively recited. Claim terms may be nonlimiting where they “merely express a purpose” or “state an intended result of the claimed method.” Bristol-Myers Squibb Co. v. Ben Venue Labs., Inc., 246 F.3d 1368, 1374–75 (Fed. Cir. 2001). Here, “a second power switching circuit . . . arranged to activate a first power switch” is more than an intended result. It is structural in nature. Accordingly, we determine that Appellant has not shown error in the rejection of claim 14 for improper dependency. Rejection 2. The Examiner rejects claim 1–20 as anticipated by Lewis. Final Act. 3–9. In support of the rejection, the Examiner relies, in part, on Figure 4 of Lewis, reproduced below. Id. at 3. Appeal 2020-002470 Application 15/960,537 6 FIG. 4 illustrates a schematic of a voltage regulator 400. Lewis ¶ 23. Lewis teaches that temperature transducers 440 and 442 send signals representing the temperatures of field effect transistors (FETS) 410 and 408 to current balance controller 444. Id. Lewis further teaches that current balance controller 444 compares the temperatures and determines whether FETs 410 or 408 are close to a temperature that will damage the circuit components. Id. If, for example, the temperature in FET 410 is determined to be at a critical level or set point, current balance controller 444 may cause current 416 to increase and current 414 to decrease in order to achieve the same current 418 to load 412 while lessening the burden on the first phase of voltage regulator 400. Id. ¶ 26. The Examiner finds that FET 410 satisfies the first power switching circuit limitation and FET 408 satisfies the second power switching circuit limitation. Final Act. 3. The Examiner further finds that FET 408 is “arranged to determine a first power switching delay in response to a temperature indication of the second switch and in response to a combined temperature indication of the first and second power switches (Figure 3).” Id. The Examiner further finds that “the second power switching circuit [FET 408] is arranged to activate the second power switch at a first delayed time after the activation of the first power switch.” Id. Appellant argues claim 1 as a representative claim. Appeal Br. 7. Accordingly, claims 2–20 will stand or fall with claim 1. See 37 C.F.R. § 41.37(c)(1)(iv) (regarding representative claims). Appellant construes claim 1 to require that the first and second power switching circuits are each coupled to receive the same “power switching control signal.” Appeal Br. 6. Appellant argues that Lewis teaches a Appeal 2020-002470 Application 15/960,537 7 multiphase voltage regulator that includes two separate switching control signals for activating two different power switches. Id. Accordingly, Appellant concludes, the “second power switching circuit” of Lewis (FET 408) is not “arranged to activate a second power switch in response to the power switching control signal” as required by claim 1. Id. at 7. That is, Appellant argues that Lewis’ FETs 408 and 410 are activated in response to separate power switching control signals while the claim requires activation by the same control signal. In the Answer, the Examiner briefly determines that Appellant’s argument is not persuasive because “Lewis teaches the second power switching circuit is arranged to activate the second power switch at a first delayed time after the activation of the first power switch (312, 314 of Figure 3 via the output from 444 of Figure 4[)].” Examiner’s Answer dated Dec. 2, 2019 (“Ans.”) 4 (citing Lewis ¶¶ 22, 26). Figure 3, cited by the Examiner, is reproduced below. Appeal 2020-002470 Application 15/960,537 8 Figure 3 of Lewis illustrates representative steps taken to measure the FETs’ temperature, compare such temperature to a critical temperature or a set point, and adjust current load as needed. Lewis ¶ 22. If the FET temperature is within safe operating limits, step 312 requires a delay before repeating the temperature readings. Id. If the FET temperature is equal to or greater than the set point or critical point, then the system steers current from the hotter phase to the cooler phase (step 310). Id. The system then “delays in step 314 for a period and then restarts the reading of temperatures in step 302.” Id. In its Reply Brief, Appellant argues that Figures 3 and 4 of Lewis show only that the delay scheme is implemented individually at the power FET level relative to the two individual control signals. Reply Brief dated Jan. 29, 2020 (“Reply Br.”) 3. We find Appellant’s argument to be persuasive. The Examiner does not clearly identify the power switching control signal of claim 1. Figure 4 of Lewis depicts a multiphase voltage regulator with two power switching control signals leading to the FETs. Lewis permits these signals to differ in strength. Lewis ¶¶ 23, 24. Nor is the Examiner’s reasoning regarding Figure 3 persuasive. The Examiner relies on Figure 3 as teaching that “the second power switching circuit is arranged to activate the second power switch at a first delayed time after the activation of the first power switch.” Ans. 4. The delay shown in Figure 3, however, is the delay between temperature readings of the FETs. It does not directly pertain to activation. The Examiner does not clearly show how this delay relates to the claims. Accordingly, we determine that Appellant has shown error with regard to the rejection of claims 1–20 as anticipated by Lewis. Appeal 2020-002470 Application 15/960,537 9 CONCLUSION The Examiner’s rejection of claim 14 for improper dependency is affirmed. The Examiner’s rejection of claims 1–20 as anticipated by Lewis is reversed. In summary: Claim(s) Rejected 35 U.S.C. § Reference(s)/Basis Affirmed Reversed 14 112(d) Improper dependency 14 1–20 102(a)(1) Lewis 1–20 Overall Outcome 14 1–13, 15–20 No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a). AFFIRMED IN PART