Texas Instruments IncorporatedDownload PDFPatent Trials and Appeals BoardDec 2, 20202020004251 (P.T.A.B. Dec. 2, 2020) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 14/530,266 10/31/2014 David M. Thompson TI-74088 2866 23494 7590 12/02/2020 TEXAS INSTRUMENTS INCORPORATED P O BOX 655474, MS 3999 DALLAS, TX 75265 EXAMINER IRADUKUNDA, HERVE ART UNIT PAPER NUMBER 2185 NOTIFICATION DATE DELIVERY MODE 12/02/2020 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): uspto@ti.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte DAVID M. THOMPSON, TIMOTHY ANDERSON, JOSEPH ZBICIAK, ABHIJEET A. CHACHAD, KAI CHIRCA, and MATTHEW D. PIERSON Appeal 2020-004251 Application 14/530,266 Technology Center 2100 Before DEBRA K. STEPHENS, CARL W. WHITEHEAD, JR., and ADAM J. PYONIN, Administrative Patent Judges. PYONIN, Administrative Patent Judge. DECISION ON APPEAL Pursuant to 35 U.S.C. § 134(a), Appellant appeals from the Examiner’s rejection.1 We have jurisdiction under 35 U.S.C. § 6(b). We AFFIRM IN PART. 1 Herein, “Appellant” refers to “applicant” as defined in 37 C.F.R. § 1.42(a). Appellant identifies the real party in interest as Texas Instruments Incorporated. Appeal Br. 2. Appeal 2020-004251 Application 14/530,266 2 STATEMENT OF THE CASE Introduction The Application relates to “digital data processing and more specifically data busses between multiple CPU cores.” Spec. 1:2–4. Claims 1–4, 6–17, and 19–21 are pending; claims 1 and 15 are independent. Appeal Br. 15–18. Claims 1 and 15 are reproduced below for reference (emphases added: 1. A processing device comprising: a bus; and a bus agent coupled to the bus and including: an attribute channel connected to an attribute subset of signal lines of the bus to transmit bus transaction attribute information via the attribute subset of the signal lines and the bus transaction attribute information includes a first bus agent identifier (ID) signal including a field that indicates a unique value identifying the bus agent; a data channel connected to a data subset of the signal lines of the bus that is separate from the attribute subset of the signal lines to transmit data via the data subset of the signal lines; and a write response channel connected to a write response subset of the signal lines that is separate from both the attribute subset and the data subset of the signal lines to transmit write response information via the write response subset of the signal lines, wherein the write response information includes first write response signal containing a transaction ID corresponding to a transaction previously initiated on an attribute channel of a different bus agent and a second write response signal that is a second bus agent ID signal having a field that indicates a unique value identifying the different bus agent, wherein the first write response signal is transmitted on a first signal line of the write response subset of signal lines and the second write response signal is transmitted on a second signal line of the write response subset of signal lines. Appeal 2020-004251 Application 14/530,266 3 15. An integrated circuit comprising: a first bus agent; a second bus agent; and a bus comprising a set of signal lines extending between the first bus agent and the second bus agent, the signal lines communicatively coupling the first bus agent and the second bus agent; wherein the first bus agent comprises: a first attribute channel to transmit first bus transaction attribute information to the second bus agent via a first subset of the signal lines, wherein the first bus transaction attribute information includes a first signal that is a bus agent identifier (ID) signal including a field having a plurality of bits that indicate a unique identifying value for the first bus agent and a second signal that is a transaction ID signal including a field having a plurality of bits that indicate a unique identifying value for a bus transaction indicated by the first bus transaction attribute information, wherein the first attribute channel is connected to the first subset of the signal lines, wherein the bus agent ID signal is transmitted using a first signal line of the first subset of the signal lines and the transaction ID signal is transmitted using a second signal line of the first subset of signal lines; a first data channel to transmit first data to the second bus agent via a second subset of the signal lines, wherein the first data channel is connected to the second subset of the signal lines, the second subset of the signal lines being separate from the first subset of the signal lines; and a first write response channel to transmit first write response information to the second bus agent via a third subset of the signal lines, wherein the first write response channel is connected to the third subset of the signal lines, the third subset of the signal lines being separate from both the first and second subsets of the signal lines, and wherein the first write response channel includes an identifier corresponding to a transaction previously initiated on a second attribute channel of the second bus agent. Appeal 2020-004251 Application 14/530,266 4 References and Rejections The Examiner relies on the following prior art: Name Reference Date Rowlands US 7,076,586 B1 July 11, 2006 Belhadj US 7,782,805 B1 Aug. 24, 2010 Nygreen US 7,911,952 B1 Mar. 22, 2011 Kwon US 2012/0159037 A1 June 21, 2012 Maji US 2013/0268705 A1 Oct. 10, 2013 Peripheral Component Interconnect (PCI) Local Bus Specification, Revision 2.2, December 18, 1998 (hereinafter “PCI Local Bus) Claims 1–4, 6–12, 14–17, 20, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Nygreen, Rowlands, and Kwon. Final Act. 6. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Nygreen, Rowlands, Kwon, and PCI Local Bus. Final Act. 23. Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Nygreen, Rowlands, Kwon, Maji, and Belhadj. Final Act. 25. ANALYSIS We have reviewed the Examiner’s rejections in light of Appellant’s arguments. Arguments Appellant could have made but chose not to make are deemed to be waived. See 37 C.F.R. § 41.37(c)(1)(iv). Independent Claim 1 Appellant argues the Examiner’s rejection is in error, because “it fails to provide a motivation to combine Nygreen and Rowlands that applies to the bus configuration described in Nygreen.” Appeal Br. 5. Appellant explains that “[t]here simply is no motivation to modify Nygreen to include Appeal 2020-004251 Application 14/530,266 5 Rowlands’s transaction ID ‘to enable determining which agent is permitted to use the bus at any given time’ (Final Office Action, p. 8),” “because the single-device-to-single-device busses of Nygreen do not perform bus arbitration analogous to that of busses that interconnect multiple devices such as the busses of Rowlands.” Reply Br. 3; Appeal Br. 7. We disagree with Appellant that the Examiner erred and adopt as our own the findings and reasons set forth by the Examiner, to the extent consistent with our analysis below. We add the following primarily for emphasis. First, Appellant fails to provide sufficient evidence or technical reasoning to persuade us that one of ordinary skill, in light of the cited references, would limit Nygreen’s bus teachings to only allow for “coupl[ing] two devices.” Contra Reply Br. 2. Nygreen teaches communications among various interfaces and controllers, including “an interface between a processor core, memory devices, and other components . . . . us[ing] a credit-based flow control with sustained bus signals.” Nygreen 5:1–15. Rowlands teaches a “bus is a shared resource among the agents, and thus a mechanism for determining which agent is permitted to 30 use the bus at any given time is needed,” so that “[e]ach agent is assigned a different agent identifier.” Rowlands 1:29–31, 3:44–45. We agree with the Examiner that one of ordinary skill would apply Rowlands’ “bus agent identifier” teachings to Nygreen’s teachings of “communicat[ing] with multiple components via various bus agents,” to enable determining the appropriate agent. Final Act. 8; Ans. 4; Nygreen Fig. 4; and Rowlands Fig. 1. The Examiner’s analysis is reasonable, particularly in light of Rowlands’ teachings of it being well known to use a bus to Appeal 2020-004251 Application 14/530,266 6 connect multiple devices. See Rowlands 1:29–31; 3:1–2 (“System 10 may include a bus 24 for interconnecting the various components of system 10.”) (emphasis omitted). In contrast, Appellant has not persuaded us that using Rowlands’ identifiers, in the processing device of Nygreen, was more than the predictable use of prior art elements in view of one of ordinary skill. See KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007) (“[A] court must ask whether the improvement is more than the predictable use of prior art elements according to their established functions.”). Thus, we determine the Examiner has articulated reasoning with a rational underpinning as to why an ordinarily skilled artisan would have been motivated to combine the teachings of Nygreen and Rowlands. Second, Appellant’s arguments are unpersuasive for not being commensurate with the scope of claim 1. Appellant’s arguments focus on “devices,” whereas claim 1 recites “agent[s].” Appeal Br. 6. Appellant does not present analysis or identify disclosure in the Specification to show that the claimed agents are limited to devices. See, e.g., Appeal Br. 2 (“Examples of the present disclosure include devices and circuits with busses for communicating between agents of the device and/or circuit.”) (emphasis added). Thus, for this additional reason, Appellant does not persuade us the Examiner errs in finding the combination of cited references teaches the disputed limitations. We sustain the Examiner’s obviousness rejection of independent claim 1, and the rejections of the dependent claims not separately argued. Appeal 2020-004251 Application 14/530,266 7 Independent Claim 15 Appellant argues the Examiner’s rejection is in error, because “[t]he combination of Nygreen, Rowlands, and Kwon does not teach or suggest at least the recited write response channel because the write response channel transmissions of Nygreen and Kwon travel in a direction opposite to that recited.” Appeal Br. 9. Specifically, Appellant asserts claim 15 recites “Kwon’s . . . signal is transmitted in the same direction as the write response of Nygreen,” and “is transmitted in a direction (from the [receiving] interface to the [initiating] interface) that is opposite of the direction of the attribute information and the data (from the [initiating] interface to the [receiving] interface).” Id. at 10. We find Appellant’s argument to be persuasive. Claim 15 recites the first bus agent is configured to transmit each of “first bus transaction attribute information,” “first data,” and “first write response information” to the second bus agent. Thus, each of these signals are to be transmitted in the same direction. The Examiner, however, finds the limitations are taught by the cited references because “[a]s shown in Fig. 17 of the instant application, the [recited] write response channel may go in either direction.” Ans. 5. Such finding, although described in the Specification, is inconsistent with the language of the claims. “[L]imitations are not to be read into the claims from the [S]pecification.” In re Van Geuns, 988 F.2d 1181, 1184, (Fed. Cir. 1993). The Examiner has failed to establish—nor do we see in the record before us—that the cited art teaches or suggests a “first bus agent” configured to transmit “first write response information to the second bus agent” as required by the claim. See Reply Br. 3 (emphasis added). Appeal 2020-004251 Application 14/530,266 8 Accordingly, we are persuaded the Examiner’s obviousness rejection of independent claim 15 is in error. We do not sustain the Examiner’s rejection of independent claim 15, or the rejection of the claims dependent thereon. DECISION SUMMARY Claims Rejected 35 U.S.C. § Reference(s)/Basis Affirmed Reversed 1–4, 6–12, 14–17, 20, 21 103 Nygreen, Rowlands, Kwon 1–4, 6–12, 14 15–17, 20, 21 13 103 Nygreen, Rowlands, Kwon, PCI Local Bus 13 19 103 Nygreen, Rowlands, Kwon, Maji, Belhadj 19 Overall Outcome 1–4, 6–14 15–17, 19– 21 No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED IN PART Copy with citationCopy as parenthetical citation