Stilian Pandev

Patent Trials and Appeals Board

Aug 5, 2020

13286079 - (D) (P.T.A.B. Aug. 5, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/286,079 10/31/2011 Stilian Pandev 8536.P015 6026
81088 7590 08/05/2020
WOMBLE BOND DICKINSON (US) LLP / FIJI
Attn: IP Docketing
P.O. Box 7037
Atlanta, GA 30357-0037
EXAMINER
BROCK, ROBERT S
ART UNIT PAPER NUMBER
2128
NOTIFICATION DATE DELIVERY MODE
08/05/2020 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
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PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte STILIAN PANDEV
Appeal 2019-000565
Application 13/286,079
Technology Center 2100
Before DENISE M. POTHIER, LINZY T. MCCARTNEY, and
JAMES W. DEJMEK, Administrative Patent Judges.
POTHIER, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
Pursuant to 35 U.S.C. § 134(a), Appellant1,2 appeals from the
Examiner’s decision to reject claims 37–45, 47–57, and 59–64. Appeal
Br. 3. We have jurisdiction under 35 U.S.C. § 6(b). We AFFIRM.

1 We use the word Appellant to refer to “applicant” as defined in 37 C.F.R.
§ 1.42(a) (2016). Appellant identifies the real party in interest as KLA
Tencor Corp. Appeal Br. 3.
2 Throughout this opinion, we refer to the Final Action (Final Act.) mailed
February 8, 2017, the Appeal Brief (Appeal Br.) filed November 7, 2017,
and the Examiner’s Answer (Ans.) mailed March 13, 2018. No Reply Brief
was filed.
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CLAIMED SUBJECT MATTER
The claims are directed to “[p]rocess variation-based model
optimization for metrology.” Spec., Abstract; id. ¶ 1. “In one particular
embodiment, the model parameters are constrained only within the process
variation space, reducing the overall time to results.” Id. ¶ 29.
Claim 37 is reproduced below:
37. A method comprising:
determining a first model of a repeating structure on a
semiconductor substrate or wafer, the first model being based
on a first set of parameters, the repeating structure being
fabricated by application of certain processes;
generating a set of process variations data for the
repeating structure representing variations in the first set of
parameters for the first model of the repeating structure,
wherein the set of process variations data describes a subset of
outcomes that is limited to shapes or features of the structure
that can result from the processes that are applied to fabricate
the structure;
modifying, based on the determined set of process
variations data, the first model of the structure to generate a
second model of the structure, the second model of the structure
being based on a second set of parameters different from the
first set of parameters, wherein modifying the first model of the
structure to generate the second model of the structure includes
reducing the degrees of freedom of the first set of parameters
based on the set of process variations data; and
providing a simulated spectrum derived from the second
model of the structure;
wherein modifying the first model of the structure based
on the set of process variations data includes sampling a data
space that is defined by the set of process variations data.

Appeal Br. 17 (Claims App.) (emphasis added).

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REFERENCES
The prior art relied upon by the Examiner is:
Name Reference Date
Balasubramanian US 2004/0017575 A1 Jan. 29, 2004
Niu US 2005/0256687 A1 Nov. 17, 2005
Cramer US 7,460,237 B1 Dec. 2, 2008

ANTICIPATION REJECTION OVER BALASUBRAMANIAN
We have reviewed the Examiner’s rejection in light of Appellant’s
arguments presented in this appeal. Arguments which Appellant could have
made, but did not make in the Brief are deemed to be waived. See 37 C.F.R.
§ 41.37(c)(1)(iv). Appellant argues claims 37–42, 44, 47–54, 56, and 59–64
as a group. Appeal Br. 12–15. We select claim 37 as representative. See
37 C.F.R. § 41.37(c)(1)(iv).
Claim 37 has been rejected under pre-AIA 35 U.S.C. 102(b) as being
anticipated by Balasubramanian. Final Act. 2–5. For the specifically recited
step of:
generating a set of process variations data for the repeating
structure representing variations in the first set of parameters
for the first model of the repeating structure, wherein the set of
process variations data describes a subset of outcomes that is
limited to shapes or features of the structure that can result from
the processes that are applied to fabricate the structure

(“the ‘generating’ step”), the Examiner relies on Balasubramanian. Id. at 3
(citing Balasubramanian ¶¶ 51, 75, 85–87, 93, 101, and 108).
Appellant argues Balasubramanian does not teach the “generating”
step or the recited “modifying, based on the determined set of process
variations data, the first model of the structure to generate a second model of
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the structure” in claim 37. Appeal Br. 12. Appellant asserts
Balasubramanian’s nominal values and confidence intervals (e.g., ranges of
geometric parameters) are not “limited to shapes and features of the
[repeating] structure [on a semiconductor substrate or wafer] that can result
from the processes that are applied to fabricate the structure” as claim 37
recites. Id. at 13–14 (citing Balasubramanian ¶¶ 51, 75, 85–87, 93, 108).

ISSUE
Under 35 U.S.C. § 102, has the Examiner erred in rejecting claim 37
by finding that “the [generated] set of process variations data describes a
subset of outcomes that is limited to shapes and features of the structure that
can result from the processes that are applied to fabricate the [repeating]
structure [on a semiconductor substrate or wafer]”?
ANALYSIS
On the record before us, we are unpersuaded the Examiner has erred.
Except as noted, we adopt as our own the findings and reasons set forth in
the rejections from which the appeal is taken and in the Examiner’s Answer.
During examination of a patent application, a claim is given its
broadest reasonable construction “in light of the specification as it would be
interpreted by one of ordinary skill in the art.” In re Am. Acad. of Sci. Tech
Ctr., 367 F.3d 1359, 1364 (Fed. Cir. 2004) (citation omitted). The exact
phrase “limited to shapes or features of the structure that can result from the
processes that are applied to fabricate the structure” in claim 37 does not
appear in the disclosure. However, when addressing “possible re-
parameterization” for modeling, the Specification states, “realistically there
is only a subset of options for the overall shape and detailed features of the
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structure” resulting from a semiconductor fabrication process (e.g., etching).
Spec. ¶ 33. The Specification provides a “non-limiting example” where the
model focuses on a parameter subset that includes “structure height (HT)
202, structure width (204), top critical dimension (TCD) 206 and bottom
critical dimension (BCD) 208 . . . as possible parameters.” Id. ¶ 34.
When addressing “a set of process variations data” for the repeating
structure, the Specification further discusses “variations ranges for bottom
critical dimension (CD), top CD of the structure, middle CD or sidewall
angle, or a combination thereof.” Id. ¶ 48; see Appeal Br. 4 (mapping Spec.
¶ 48 as support for this limitation). Additionally, the Specification discusses
“plots 902 and 904 of possible process ranges which correspond to plots 906
and 908 . . . in accordance with an embodiment of the present invention[,]”
stating “there is no need to include samples outside of the range defined by
the dashed lines” in Figure 9 “for modeling.” Spec. ¶ 54, Fig. 9; see also
Ans. 5 (quoting Spec. ¶ 54). Notably, although the accompanying disclosure
does not describe how the “possible process ranges which correspond to
plots 906 and 908” are arrived at (see Spec. ¶¶ 54–55), Figure 9 shows
“Bivariate Fit” for different dimensions having a possible process range that
includes a wider area (e.g., region between dashed lines in the upper left
graph) than the measured results (e.g., points in the upper left graph). See
id., Fig. 9.
Based on the foregoing, the broadest reasonable interpretation of the
recited “set of process variations data [that] describes a subset of outcomes,”
which are “limited to shapes and features of the structure that can results the
processes that are applied to the fabricate the structure” in claim 37 includes
possible “variations ranges” for the structure’s height, width, top, middle, or
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bottom CD, sidewall angle, or a combination of these types that can result
from semiconductor fabrication processes, including range data beyond
actually measured results.
Turning to the rejection, we agree with the Examiner that
Balasubramanian’s nominal values and confidence intervals reasonably map
to the disputed “set of process variations data [that] describes a subset of
outcomes that is limited to shapes and features of the structure that can result
from the [certain] processes that are applied to fabricate the [repeating]
structure [on a semiconductor substrate or wafer]” based on the above
interpretation of this phrase. Final Act. 3 (citing Balasubramanian ¶¶ 51, 75,
85–87, 93, 101, and 108); see Ans. 4–5. Balasubramanian teaches obtaining
nominal values and ranges (e.g., confidence interval) of geometric
parameters (e.g., a set of variations data) related to a wafer structure from
the fabrication process, including a top width or top CD may have a nominal
value of 200 nm and a range of 120 to 280 nm. Balasubramanian ¶¶ 71, 75,
Fig. 4. Accordingly, Balasubramanian teaches the recited “generating a set
of process variations data for the repeating structure representing variations
in a first set of parameters” (e.g., variations in top width or top CD)
consistent with disclosure.
Moreover, Balasubramanian’s nominal “value and ranges are typically
obtained from historical or test data for the fabrication process” (id. ¶ 75
(emphases added)), disclosing scenarios (e.g., the typical scenario) where the
nominal values and their ranges are structural features that resulted from
fabrication. Thus, Balasubramanian discloses scenarios where the acquired
nominal value and ranges are limited to features that can result from certain
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processes applied to fabricate a wafer structure. See id.3 We also agree with
the Examiner that Balasubramanian’s teachings related to the nominal value
and confidence interval have similarities to the disclosed “PROCESS
RANGE” shown in Figure 9 of the Specification, where the “solid lines” are
“analogous to nominal values” and the “dashed lines” are “analogous to
confidence intervals.” Compare Balasubramanian ¶¶ 45, 51, 56, 75, with
Spec. ¶ 54, Fig. 9; see Ans. 5 (comparing Balasubramanian with Spec. ¶ 54).
We therefore disagree with Appellant that Balasubramanian’s nominal
values and ranges “do not regard determinations of possible outcomes”
(Appeal Br. 9) and “may not be a value that can result with a particular
fabrication process” (id. at 14). See also Ans. 3 (discussing
Balasubramanian ¶ 75 and addressing Appellant’s argument). Also and
notably, claim 37 does not recite the “set of process variations data” are
“from a particular fabrication process” as argued (Appeal Br. 14) but rather
“from the [certain] processes that applied to fabricate the structure” (e.g.,
multiple, but unidentified certain processes). Id. at 17 (Claim App.) We
further agree with the Examiner that the recitations in claim 37 do not
preclude excluding nominal values and ranges that can occur as the result of
a semiconductor fabrication process. See Ans. 6–7.
Based on the foregoing, Balasubramanian discloses the disputed “set
of process variations data describes a subset of outcomes that is limited to

3 The Examiner and Appellant discuss further examples in Balasubramanian
of ranges that are values that can occur from the fabrication processes. See
Ans. 7–8 (citing Balasubramanian ¶¶ 37, 48, 54, 59, Fig. 4B); Appeal Br. 10
(stating Balasubramanian determines its confidence interval “from a given
set of sample input data representing actual measurements of a wafer
structure) (citing Balasubramanian ¶¶ 85–87).
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shapes and features of the structure that can result from the processes that
are applied to fabricate the [repeating] structure [on a semiconductor
substrate or wafer]” in claim 37.4
As for the disputed “modifying, based on the determined set of
process variations data, the first model of the structure to generate a second
model of the structure” recited in claim 37 (Appeal Br. 12, 14) and “wherein
modifying the first model of the structure based on the set of process
variations data includes sampling a data space that is defined by the set of
process variations data” (id. at 14–15), Appellant does not separately argue
these features. See id. at 12, 14, 15. At best, Appellant merely asserts these
limitations are not taught by Balasubramanian by quoting and/or bolding
claim language related to the “set of process variations data” feature. See id.
We are not persuaded for the reasons previously discussed.
For the foregoing reasons, Appellant has not persuaded us of error in
the rejection of independent claim 37 and claims 38–42, 44, 47–54, 56, and
59–64, which are not argued separately.

4 Although we determine Balasubramanian discloses all the disputed
limitations in claim 37, we add that Balasubramanian’s teachings further
suggest to an ordinarily skilled artisan situations where its nominal values
and ranges are “limited to shapes or features of the structure that can result
from the processes that are applied to fabricate the structure” as claim 37
recites in light of the Specification and as the phrase would be interpreted by
one of ordinary skill in the art as previously addressed. See
Balasubramanian ¶¶ 10, 75–76, 108–109.
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OBVIOUSNESS REJECTION OVER
BALASUBRAMANIAN AND CRAMER
Claims 43 and 55 are rejected under pre-AIA 35 U.S.C. § 103(a) as
being unpatentable over Balasubramanian and Cramer. Final Act. 11–12.
The Examiner relies on Balasubramanian to teach some of the limitations in
claims 43 and 55, turning to Cramer in combination with Balasubramanian
to teach that “the second set of parameters includes parameters that are non-
geometric and non-material.” Final Act. 11–12 (citing Balasubramanian
¶¶ 55, 57, 90–93; Cramer 10:5–47).
Appellant does not dispute Cramer teaches the above limitations
found in claims 43 and 55. Nor does Appellant assert one skilled in the art
would not combine Cramer with Balasubramanian. See Appeal Br. 15.
Rather, Appellant argues that “[t]he Patent Office does not describe how
reducing the spectra data teaching of Cramer would be implemented in the
cited modifying step of Balasubramanian,” and the rejection should be
withdrawn. Id. (emphasis added). This argument is unavailing.
Notably,
The test for obviousness is not whether the features of a
secondary reference may be bodily incorporated into the
structure of the primary reference; nor is it that the claimed
invention must be expressly suggested in any one or all of the
references. Rather, the test is what the combined teachings of
the references would have suggested to those of ordinary skill
in the art.

In re Keller, 642 F.2d 413, 425 (CCPA 1981). The Examiner has explained
adequately what the combined teachings of Balasubramanian and Cramer
suggest to those skilled in the art. The rejection states Cramer teaches using
a reduce amount of data during an iterative procedure, like
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Balasubramanian’s modeling process, which modifies its first model with a
second model of a structure (Final Act. 12 (citing Cramer 10:5–47)), and
that combining this technique with Balasubramanian would have predictably
yielded optimized range data with the least number of simulation variables
and the highest accuracy. See id.; see also Ans. 9–10 (further explaining
that Cramer teaches a technique to reduce the data amount in a subsequent
iterative procedure that can be applied to Balasubramanian’s model
modification process). On this record, we thus disagree that the obviousness
rejection should be withdrawn.
Accordingly, Appellant has not persuaded us of error in the rejection
of claim 43 and 55.

REMAINING OBVIOUSNESS REJECTION
Lastly, claims 45 and 57 are rejected under pre-AIA 35 U.S.C.
§103(a) as being unpatentable over Balasubramanian and Niu. Final
Act. 12–13. In requesting this rejection be withdrawn, Appellant relies on
“the reasons stated with respect to claims 37 and 49” and further contends
Niu does not cure the purported deficiencies of Balasubramanian. Appeal
Br. 16. We are not persuaded for reasons previously discussed.

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DECISION SUMMARY
In summary:
Claims
Rejected
35 U.S.C.
§
Reference(s)/Basis Affirmed Reversed
37–42, 44,
47–54, 56,
59–64
102(b) Balasubramanian 37–42, 44,
47–54, 56,
59–64

43, 55 103(a) Balasubramanian,
Cramer
43, 55
45, 57 103(a) Balasubramanian,
Niu
45, 57
Overall
Outcome
37–45, 47–
57, 59–64

TIME PERIOD FOR RESPONSE
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv).
AFFIRMED