Raytheon Company

Patent Trials and Appeals BoardMar 30, 2020

15201905 - (D) (P.T.A.B. Mar. 30, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 15/201,905 07/05/2016 Istvan Rodriguez RTN2-353PUS/16-8150- US-NP 3947 51503 7590 03/30/2020 RAYTHEON COMPANY c/o DALY, CROWLEY, MOFFORD & DURKEE, LLP ONE UNIVERSITY AVENUE SUITE 201B WESTWOOD, MA 02090 EXAMINER KIELIN, ERIK J ART UNIT PAPER NUMBER 2814 NOTIFICATION DATE DELIVERY MODE 03/30/2020 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): amk@dc-m.com docketing@dc-m.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte ISTVAN RODRIGUEZ, CHRISTOPHER M. LAIGHTON, and ALAN J. BIELUNIS Appeal 2019-003559 Application 15/201,905 Technology Center 2800 Before ADRIENE LEPIANE HANLON, JAMES C. HOUSEL, and GEORGE C. BEST, Administrative Patent Judges. HOUSEL, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the Examiner’s decision to reject claims 1–11 under 35 U.S.C. § 103 as 1 We use the word Appellant to refer to “applicant” as defined in 37 C.F.R. § 1.42(a). Appellant identifies the real party in interest as Raytheon Company. Appeal Brief (“Appeal Br.”) filed November 30, 2018, p. 1. Appeal 2019-003559 Application 15/201,905 2 unpatentable over AAPA2 in view of Adlerstein,3 Hauenstein,4 Takada,5 and Mooney.67 We have jurisdiction under 35 U.S.C. § 6(b). We AFFIRM.8 CLAIMED SUBJECT MATTER The invention is directed to high thermal loads generated in Monolithic Microwave Integrated Circuits (“MMIC”). Spec. ¶ 2. Appellant discloses a microwave amplifier having a field effect transistor (“FET”) formed on an upper surface of a substrate and a de-Q’ing section connected to the FET. Id. ¶ 8. More particularly, Appellant discloses an embodiment of the microwave amplifier wherein the FET source is connected to a ground plane conductor disposed on a bottom surface of the substrate through an electrically conductive via passing through the substrate and the FET drain connected to a drain voltage bus through a choke. Id. ¶ 9. The amplifier’s de-Q’ing section includes a de-Q’ing resistive via passing through the substrate and a de-Q’ing capacitor having first and second dielectrically separated plates, one of which is connected to the ground plane conductor 2 Appellant’s Admitted Prior Art (“AAPA”), corresponding to Figures 2A– 2C and Specification (“Spec.”) ¶¶ 6 and 7, filed July 5, 2016. 3 Adlerstein, US 5,126,701, issued June 30, 1992. 4 Hauenstein, US 2007/0138651 A1, published June 21, 2007. 5 Takada, JP 08097367 A, published April 12, 1996. The Examiner relies, without objection, on an English-language machine translation of this reference. We, likewise, rely on this translation document in our Decision which we refer to as “Takada.” 6 Mooney et al., US 2013/0021115 A1, published January 24, 2013 (“Mooney”). 7 Examiner’s Answer (“Ans.”) dated February 6, 2019, pp. 4–16. 8 Our Decision additionally refers to the Reply Brief (“Reply Br.”) filed April 3, 2019. Appeal 2019-003559 Application 15/201,905 3 through the de-Q’ing resistive via and the other of which is connected to the drain voltage bus. Id. The resistive via may comprise either a solid or a hollow resistive material and may be disposed under the capacitor. Id. ¶¶ 45, 46. Claim 1, reproduced below from the Claims Appendix to the Appeal Brief, is illustrative of the claimed subject matter: 1. A microwave amplifier, comprising: a substrate; a field effect transistor having a source, drain and gate formed on an upper surface of the substrate, a first one of the source and drain being connected to a ground plane conductor disposed on a bottom surface of the substrate through an via passing through the substrate; a choke connected to a second one of the source and drain; a de-Q’ing section coupled to the field effect transistor through the choke, comprising; a de-Q’ing resistor disposed on walls of the via and passing through the substrate; a de-Q’ing capacitor having a first plate thereof connected to the choke and a second plate thereof disposed on the upper surface of the substrate connected to the ground plane conductor through the de-Q’ing resistor; wherein the first plate is dielectrically separated from the second plate, and wherein the de-Q’ing resistor is disposed under, and connected to, the second plate of the de-Q’ing capacitor, the de-Q’ing resistor comprising a resistive material disposed on walls of the via and passing through the substrate between the second plate of the de-Q’ing capacitor and the ground plane conductor. Independent claim 3 recites a microwave amplifier similar to that of claim 1, wherein the de-Q’ing resistor passes between the second plate of the de-Q’ing capacitor and a ground plane conductor disposed on a bottom Appeal 2019-003559 Application 15/201,905 4 surface of the substrate, with a second end of the resistor being connected to the ground plane conductor. Independent claim 9 recites a microwave amplifier similar to that of claim 1, wherein the de-Q’ing resistor has a resistance to suppress resonances between the choke and the de-Q’ing capacitor. OPINION After review of the Examiner’s and Appellant’s opposing positions and the appeal record before us, we determine that Appellant’s arguments are insufficient to identify reversible error in the Examiner’s obviousness rejection. See In re Jung, 637 F.3d 1356, 1365 (Fed. Cir. 2011) (explaining that appellant has the burden of identifying reversible error in a rejection). Indeed, we determine that a preponderance of the evidence supports the Examiner’s findings of fact, conclusions of law, and rebuttals to arguments with respect to the prima facie case of obviousness, which we adopt as our own. Accordingly, we affirm the stated rejection. We offer the following for emphasis only. For purposes of this appeal, to the extent that the claims on appeal are separately argued, we address them separately consistent with 37 C.F.R. § 41.37(c)(1)(vi). Independent Claims 1, 3, and 9 Appellant does not substantively argue claim 3 apart from claim 1, and presents substantively similar arguments for claims 1 and 9. Compare Appeal Br. 5–7 and id. at 9 and 10. Therefore, we select claim 1 as representative in our opinion below, wherein claims 3 and 9 stand or fall with claim 1. Appeal 2019-003559 Application 15/201,905 5 The Examiner rejects claims 1–11 under 35 U.S.C. § 103 as unpatentable over AAPA in view of Adlerstein, Hauenstein, Takada, and Mooney. The Examiner’s Answer sets forth a complete statement of this rejection including the Examiner’s findings and reasons for concluding that the subject matter of claim 1 would have been obvious. Ans. 4–11. Appellant argues that a conductive via does not inherently function as a resistor, and Hauenstein, in particular, teaches that conductive material in a via has to be configured in a specific manner to function as a resistor. Appeal Br. 6. Appellant urges that Mooney connects the bottom plate of a capacitor on the top of a substrate directly to ground on the bottom of the substrate via a ground via, whereas the upper plate is connected to a resistor. Id. at 7. Thus, Appellant contends that Mooney’s conductive via is not configured as, and teaches away from, a resistor. Id. at 6. Appellant also asserts that Mooney fails to teach or suggest configuring the via with a resistance to suppress resonances between the choke and the de-Q’ing capacitor. Id. Appellant further argues that none of Hauenstein, Takada, and Mooney alone or in combination recognize the advantage of locating the capacitor over the via such that the via may be formed as the de-Q’ing resistor. Appeal Br. 7. Appellant’s arguments are not persuasive of reversible error. Initially, although we agree the Examiner’s finding that any conductive material inherently possesses a resistance, we cannot agree with the Examiner that this finding means that all conductive vias are resistors or comprise resistive material. We recognize that conductors inherently possess a resistance, albeit generally small, and resistors inherently conduct electricity. What distinguishes conductors and resistors is, as Hauenstein describes, whether Appeal 2019-003559 Application 15/201,905 6 they are configured primarily to conduct current with negligible resistance or to resist or limit current. Though we find that the Examiner’s finding that all conductive vias are resistors or comprise resistive material is erroneous, this error is harmless in this case. The Examiner finds that Takada teaches that a via may be formed as a resistor through the substrate of an MMIC in order to increase integration and to reduce the space taken by passive elements. Ans. 9. The Examiner concludes that it would have been obvious to have moved the AAPA’s de-Q’ing resistor into the via in order to increase integration and reduce the space taken by the resistor on the substrate as taught by Takada with a reasonable expectation of success. Appellant fails to dispute or otherwise address the Examiner’s finding and obviousness conclusion regarding Takada. In addition, although Appellant contends that Mooney teaches away from a resistor via, we note that the Examiner’s rejection does not depend on Mooney for this feature as discussed above. As the Examiner finds (Ans. 11), Mooney teaches a de-Q’ing circuit including a resistor, inductor, and capacitor, wherein the lower plate of the capacitor is disposed directly over a via connecting to a ground plane conductor. Appellant does not dispute or otherwise address this finding. The Examiner concludes that it would have been obvious to form the lower plate of the AAPA’s de-Q’ing capacitor directly over the resistive via of the AAPA de-Q’ing resistor as modified in view of Takada, as Mooney teaches, in order to save additional space on the MMIC substrate. Id. To the extent that Appellant’s argument that Mooney teaches away from a resistor via implies that Mooney teaches away from a combination Appeal 2019-003559 Application 15/201,905 7 with Takada as set forth in the rejection, this argument is not persuasive. “A reference may be said to teach away when a person of ordinary skill, upon reading the reference, would be discouraged from following the path set out in the reference, or would be led in a direction divergent from the path that was taken by the applicant.” In re Gurley, 27 F.3d 551, 553 (Fed. Cir. 1994). “A reference does not teach away, however, if it merely expresses a general preference for an alternative invention but does not ‘criticize, discredit, or otherwise discourage’ investigation into the invention claimed.” DePuy Spine, Inc. v. Medtronic Sofamor Danek, Inc., 567 F.3d 1314, 1327 (Fed. Cir. 2009) (citing In re Fulton, 391 F.3d 1195, 1201 (Fed. Cir. 2004)). Here, Appellant does not direct our attention to any teaching in Mooney, nor do we find any, criticizing, discrediting, or otherwise discouraging the use of Takada’s resistor via in combination with Mooney’s placement of the capacitor directly over the via in the AAPA MMIC to increase integration and reduce the space occupied by these devices on the substrate. We also are not persuaded by Appellant’s assertion that Mooney fails to teach or suggest configuring the via with a resistance to suppress resonances between the choke and the de-Q’ing capacitor. In this regard, we note that the AAPA teaches that the known de-Q’ing resistor “is used to suppress or de-Q resonances that may be create[d] between the choke and the bypass capacitor.” Spec. ¶ 7. Thus, it is not relevant that Mooney does not teach this feature. Further, Appellant fails to address Takada and, therefore, fails to explain why modifying the AAPA MMIC in view of Takada so as to provide the de-Q’ing resistor as a via connecting the capacitor to the ground plane conductor would not have been obvious. Appeal 2019-003559 Application 15/201,905 8 Accordingly, we sustain the Examiner’s obviousness rejection of claims 1, 3, and 9. Claims 2, 4, and 11 Claims 2 and 4 depend from claims 1 and 3, respectively, and further require that the resistive material of the via has a hollow region therein. Claim 11 depends from claim 9, and further requires that portions of the resistive material of the via are separated by a gap. Appellant asserts that the hollow region or hole in the via “allows for expansion of the resistive material 34’ as such material absorbs microwave power and as the absorbed power is conducted away to the SiC substrate 16.” Appeal Br. 8. Appellant argues that none of the applied references teach or suggest providing a hollow resistive via that is capable of expansion to absorb microwave power. Id. Appellant contends that because Mooney’s via is not a resistor, it is improper to rely on Mooney’s teaching of a hollow via to modify the AAPA de-Q’ing resistor. Id. at 8–9. These arguments are not persuasive of reversible error. Although it appears that the Examiner relied, at least in part, on Mooney’s teaching that the via may be hollow, such does not amount to reversible error in the rejection even though we agree with Appellant that Mooney does not teach a resistor via. As explained above, Takada clearly teaches a resistor via in a MMIC. Takada, like Mooney, also teaches that this via may have a hollow region or portions separated by a gap. Takada Fig. 2; Mooney Fig. 3B. Appellant fails to address Takada and, therefore, fails to explain why it would not have been obvious to form a resistor via with a hollow region as taught in Takada, as a known configuration for vias, as further evidenced by Mooney, in the AAPA MMIC, with a reasonable expectation of success. Appeal 2019-003559 Application 15/201,905 9 Accordingly, we sustain the Examiner’s obviousness rejection of claims 2, 4, and 11. Claims 5–8 and 10 Appellant merely repeats the limitation of each of these claims, but does not identify reversible error in or otherwise argue the rejection of these claims. Appeal Br. 10, 11. A mere recitation of the claim limitations is not an argument for separate patentability within the meaning of 37 C.F.R. § 41.37(c)(1)(iv) and does not merit separation consideration. See In re Lovin, 652 F.3d 1349, 1356–57 (Fed. Cir. 2011). Moreover, with regard to claims 5–8, we note Appellant refers to paragraph 7 in discussing these claims, which the Examiner finds, without dispute, is a portion of Appellant’s admitted prior art. See Ans. 5 and 14. Accordingly, we sustain the Examiner’s obviousness rejection of claims 5–8 and 10. CONCLUSION Upon consideration of the record, and for the reasons given above and in the Examiner’s Answer, the decision of the Examiner rejecting claims 1– 11 under 35 U.S.C. § 103 as unpatentable over AAPA in view of Adlerstein, Hauenstein, Takada, and Mooney is affirmed. DECISION SUMMARY In summary: Claims Rejected 35 U.S.C. § Basis/Reference(s) Affirmed Reversed 1–11 103 AAPA, Adlerstein, Hauenstein, Takada, Mooney 1–11 Appeal 2019-003559 Application 15/201,905 10 TIME PERIOD FOR RESPONSE No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED