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Patent Trials and Appeals Board

Dec 2, 2019

15062030 - (D) (P.T.A.B. Dec. 2, 2019)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/062,030 03/04/2016 Vincent Cedric Colnot 81649506US03 1932
65913 7590 12/02/2019
Intellectual Property and Licensing
NXP B.V.
411 East Plumeria Drive, MS41
SAN JOSE, CA 95134
EXAMINER
SHEIKH, ASFAND M
ART UNIT PAPER NUMBER
3627
NOTIFICATION DATE DELIVERY MODE
12/02/2019 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
ip.department.us@nxp.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________________

Ex parte VINCENT CEDRIC COLNOT and
XAVIER KERDREUX
____________________

Appeal 2019-000871
Application 15/062,030
Technology Center 3600
____________________

Before JOSEPH L. DIXON, BETH Z. SHAW, and
ALEX S. YAP, Administrative Patent Judges.

YAP, Administrative Patent Judge.

DECISION ON APPEAL
Appellant appeals under 35 U.S.C. § 134(a) from the Examiner’s
Final rejection of claims 1, 3–20.1 (Final Act. 5 (Final Office Action, mailed
April 6, 2018, “Final Act.”).) We have jurisdiction under 35 U.S.C. § 6(b).
We AFFIRM.

1 We use the word “Appellant” to refer to “applicant” as defined in 37
C.F.R. § 1.42.
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STATEMENT OF THE CASE
Introduction
According to the Specification, Appellant’s invention “relates to a
corresponding method for facilitating a transaction and to a corresponding
computer program product.” (Spec. 1 (Specification filed March 4, 2016,
“Spec.”).) Claim 1 is illustrative, and is reproduced below (with minor
reformatting):
1. A security device configured to enhance security of an
external transaction device during a transaction, the
security device comprising:
a first host processor;
a communication controller; and
a secure element, wherein said communication
controller is communicatively coupled to the first
host processor and to the secure element, and
configured to establish a communication with the
external transaction device, and
operate, based upon a determination that the
external transaction device contains at least one
payment application, in a secure mode of operation
in which the communication controller is
configured to inhibit the host processor from
performing transactions with said external
transaction device, and block select-application
commands directed to the external transaction
device and originating from the first host processor,
thereby inhibiting the first host processor from
performing the transactions with said external
transaction device while allowing the secure
element to perform the transactions with the
external transaction device.

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Prior Art and Rejections on Appeal
The following table lists the prior art relied upon by the Examiner in
rejecting the claims on appeal:
Name Reference Date
Werner et al. (“Werner”) US 2008/0155257 Al June 26, 2008
Avanch et al. (“Avanch”) US 2013/0111219 Al May 2, 2013
Buer et al. (“Buer”) US 2015/0007335 Al January 1, 2015

Claims 1, 3–4, 6, 8, 9, 11–17, 19, and 20 stand rejected under 35
U.S.C. § 103 as being unpatentable over Buer and Avanch. (See Final Act.
15–22.)
Claim 7 stands rejected under 35 U.S.C. § 103as being unpatentable
over Buer, Avanch, and Werner. (See Final Act. 22.)
Claims 10 and 18 stand rejected under 35 U.S.C. § 103 as being
unpatentable over Buer, Avanch, and Examiner’s Official Notice. (See Final
Act. 23–24.)2

ANALYSIS
We have reviewed the Examiner’s rejection in light of Appellant’s
arguments that the Examiner has erred. We are not persuaded the Examiner

2 The Examiner withdraws the 35 U.S.C. § 101 rejection of claims 1 and 3–
20. (Ans. 3.)
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erred in rejecting the claims under § 103 for the following reasons and for
the reasons identified in the Final Rejection and Answer.
Claim 1
The Examiner finds that “Buer discloses a security device configured
to enhance security of an external transaction device during a transaction.
(Final Act. 15.) The Examiner further finds that:
Buer fails to explicitly disclose . . . communication
controller is configured to inhibit the at least one host processor
from performing transactions with said external transaction
device . . . , and block select-application commands directed to
the external transaction device and originating from the first host
processor, thereby inhibiting the first host processor from
performing the transactions with said external transaction device.
However, in an analogous art, Avanch teaches . . . [a]
controller inhibits a host [component] from performing
transactions with said [display] device (Avanch, FIG. 1 – display
controller and [0024]-[0025] – The illustrated hardware flag is
invisible to host applications and may be used to instruct
decision logic such as a control multiplexer to ignore a host
application input that would otherwise enable host applications
to use decryption bypass logic to bypass the decryption module .
. .
(Final Act. 17.) Appellant, however, contends that “the Examiner
construction is unreasonable and contradicts Fig. 1 of Avanch [because t]he
system-on-chip (SoC) subsystem 12 of Avanch has ‘non-secure output data’
24[; i]t does not include either the secure element 16 or secure output data
18.” (Appeal Br. 12; Reply 2–3.) We are not persuaded by Appellant’s
contentions. Figure 1 of Avanch is reproduced below.
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Figure 1 “is a block diagram of an example of a platform having a secure
path for output data associated with a trusted service.” (Avanch ¶ 6.) Figure
1 shows that both Secure and Non-Secure Output Data, respectively, are
routed through the Display Controller. We agree with the Examiner that
“while in secure output mode, no applications in the host OS or the host OS
kernel can bypass the decryption logic[, in the Display Controller,] and send
unauthorized data to a platform display” and a person of ordinary skill in
the art would be able to use the “existing SoC platform components to
establish a secure path between a secure element and a display controller.”
(Avanch ¶ 30; Ans. 3–5.) Therefore, even though the system in Avanch
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accepts non-secure output data, such data would be blocked from the display
by the display controller while in secure more.
Claim 3
Claim 3 recites, in part, “wherein, in the secure mode of operation, the
communication controller is further configured to enter into a payment mode
when the external transaction device contains said payment application, and
to block said select-application commands only when the communication
controller is operating in the payment mode.”
The Examiner finds that:
Buer discloses wherein, in the secure mode of operation,
the commination controller is further configured to enter into
payment mode when the external transaction device contains said
payment application (FIG. 1 and FIG. 3 and [0022] – [0023]
and [0038]).
Avanch teaches . . . to block said select-application
commands only when the . . . controller is operating in the
[secure output] mode . . . In addition, techniques can leverage
existing SoC platform components to establish a secure path
between a secure element and a display controller. Moreover,
these techniques may be agnostic to both the host OS stack as
well as the user).
(Final Act. 18–19.) Appellant contends that “the Office Action cited various
paragraph numbers from Buer without any explanation. The Examiner
further cited Avanch for a ‘secure output mode,’ but failed to address the
recited entry into the payment mode.” (Appeal Br. 14; Reply Br. 3.) We
disagree and agree with the Examiner that “Buer [] disclose[s] a payment
mode, see ¶ [0021] – sending a payment and ¶ [0023] represents the secure
mode of operation.” It would have been obvious to a person of ordinary
skill in the art that because Buer discloses a payment mode, it would teach
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entry into the payment mode. We further agree with the Examiner’s finding
that:
Avanch, in ¶ [0018], states the requesting application may
reside . . . on platform. Thus, as reasonably constructed, in FIG.
1 the SoC ‘12’ houses a host application in which “display
controller” will “block” select-application commands directed
towards the external device (i.e., ensure that while in secure
output mode, no applications in the host OS or the host OS kernel
can bypass the decryption logic, ¶ [00301]. Thus, as interpreted,
a host processor is inhibited from perform secure output (i.e.,
transaction) as the secure element performs such a transaction,
FIG. 1 – “26.” Thus the secure mode of operation in Buer can
be combined with the interpretation of blocking as taught by
Avanch[.]
(Ans. 5–6.) Therefore, the combination of Buer and Avanch teaches and
suggests the limitation at issue.
Claim 5
Claim 5 recites, in part, “wherein the communication controller is
further configured to operate in the secure mode of operation until the point-
of-sale application is deactivated.” The Examiner finds that Figure 3 of
Avanch teaches the limitation at issue. Appellant contends that Figure 3 “of
Avanch depicts ‘[H]ost application requests trusted service to exit secure
output mode’ as step 70. Thus, Avanch exits a secure output mode based
upon a request from a host application rather than conditionally after the
point-of-sale application is deactivated.” (Appeal Br. 15.) We agree with
the Examiner that Figure 3 of Avanch “depicts a loop [Steps 68  46  54
 64  66  68] that will continue based on further secure output
required” by the application. (Ans. 6.) Therefore, a person of ordinary skill
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in the art would understand that it is “configured to operate in the secure
mode of operation until . . . application is deactivated.” (Id.)
Claim 6
Claim 6 recites, in part, “wherein the communication controller is
further configured to verify, in the secure mode of operation, whether the
point-of-sale application has been selected by the first host processor before
the secure element performs a transaction with the external transaction
device.” The Examiner finds that Figure 3 and paragraph 21 of Avanch
teach that the “controller is further configured to verify, in the secure mode
of operation, whether the . . . application has been selected by the first host
[component] before the secure element performs a ‘transaction’ with the ...
device.” Appellant contends that the “Examiner neglected to address the
recited requirement that this verification must occur before the secure
element performs a transaction” nor does Avanch “verify whether a point-
of-sale application has been selected by the first host processor.” (Appeal
Br. 16; Reply Br. 4.)
We agree with the Examiner that “Avanch, in [Figure] 3, depicts the
[a]pplication will wait for the SeOD to be ready [and] that the trusted service
may identify the request . . . to enforce an access control policy. Thus, []
Avanch’s enforcement of an access control policy” (Ans. 6) while it waits in
secure mode teaches the limitation at issue. Appellant does not respond to
the Examiner’s argument persuasively or explain why the cited portions in
Avanch do not teach or suggest the claimed selection.
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Claim 19
Claim 19 recites, in part, “wherein the security device comprises a
further security element comprising a second host processor and the
communication controller is configured to block select-application
commands sent by both the first host processor and the second host
processor.” The Examiner finds that Avanch teaches north complex and
south complex components that correspond to the first host processor and
the second host processor. (Final Act. 21; see Avanch Fig 3, ¶ 16.)
Appellant disagrees and argues that “Avanch’s north complex component 50
and south complex component 52 cannot be reasonably interpreted as
equivalent to the first host processor and the second host processor because
Avanch’s south complex component 52 is secure while Buer’s [sic] north
complex component is unsecure.” (Appeal Br. 17.)
We are not persuaded by Appellant’s argument because Avanch
teaches the use of two complexes, and we agree with the Examiner that
using both complexes (i.e., host processors) in a secure setting is an obvious
predictable variation of known elements. (Ans. 7.) “The combination of
familiar elements according to known methods is likely to be obvious when
it does no more than yield predictable results.” KSR Int’l Co. v. Teleflex
Inc., 550 U.S. 398, 416 (2007). “If a person of ordinary skill can implement
a predictable variation, § 103 likely bars its patentability.” Id. at
417. Avanch teaches the use of multiple complexes (i.e., host processors) in
both secure and unsecure settings. The ordinarily-skilled artisan, being “a
person of ordinary creativity, not an automaton,” would be able to
implement this predictable variation. Because Appellant has not
demonstrated that the proposed combination would have been “uniquely
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challenging or difficult for one of ordinary skill in the art,” the proposed
modification would have been well within the purview of the ordinarily
skilled artisan. Leapfrog Enters., Inc. v. Fisher-Price, Inc., 485 F.3d 1157,
1162 (Fed. Cir. 2007) (citing KSR, 550 U.S. at 418).
For the foregoing reasons, we sustain the Examiner’s rejection of
claims 1, 3, 5, 6, and 19, as well as independent claims 14 and 15, which
contain limitations similar to those at issue for independent claim 1 and are
not argued separately. 37 C.F.R. § 41.37(c)(1)(iv). We also sustain the
Examiner’s rejections of dependent claims 4, 7–13, 16–18, and 20, which
depend from claim 1 and are not argued separately. (Id.)

CONCLUSION

In summary:
Claim(s)
Rejected 35 U.S.C. § Basis Affirmed Reversed
1, 3–6, 8, 9, 11–
17, 19, and 20 103
Buer and
Avanch
1, 3–6, 8, 9,
11–17, 19, and
20

7 103
Buer,
Avanch,
and
Werner
7
10 and 18 103
Buer,
Avanch,
and
Examiner’s
Official
Notice
10 and 18
Overall
Outcome 1 and 3–20

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DECISION
We affirm the Examiner’s rejection of claims 1 and 3–20 under 35
U.S.C. § 103.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv).

AFFIRMED