MURATA MANUFACTURING CO., LTD.

Patent Trials and Appeals BoardMay 10, 2021

2020006573 (P.T.A.B. May. 10, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 15/661,739 07/27/2017 Eiji ISO 002000-000372 6229 78198 7590 05/10/2021 Studebaker & Brackett PC 8255 Greensboro Drive Suite 300 Tysons, VA 22102 EXAMINER CARLEY, JEFFREY T. ART UNIT PAPER NUMBER 3729 NOTIFICATION DATE DELIVERY MODE 05/10/2021 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): info@sbpatentlaw.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte EIJI ISO, SHINICHIRO IZUMI, YOSHIFUMI MAKI, HIROTSUGU TOMIOKA, and TSUYOSHI KAWADA Appeal 2020-006573 Application 15/661,739 Technology Center 3700 Before GEORGE R. HOSKINS, BRANDON J. WARNER, and MICHAEL L. WOODS, Administrative Patent Judges. WOODS, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the Examiner’s decision to reject claims 1–12, 14–16, and 25–28. See Appeal Br. 3–13. We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE. 1 We use the word Appellant to refer to “applicant” as defined in 37 C.F.R. § 1.42(a). Appellant identifies the real party in interest as Murata Manufacturing Co., Ltd. Appeal Br. 2. Appeal 2020-006573 Application 15/661,739 2 CLAIMED SUBJECT MATTER The application is titled “Manufacturing Method for Electronic Component and Electronic Component.” Spec. 1. Claim 1 is the sole independent claim. See Appeal Br. 14–16 (Claims App.). Below, we reproduce claim 1, with emphases added to limitations addressed in this Decision: 1. A manufacturing method for a discrete electronic component, comprising: forming an insulating layer on an outer electrode body of the discrete electronic component so as to cover the outer electrode body, the outer electrode body being formed on a single chip element which constitutes the discrete electronic component; and removing the insulating layer located in a predetermined region of the outer electrode body of the discrete electronic component so as to expose the predetermined region by applying laser light to the insulating layer in the predetermined region, the insulating layer having a higher absorption coefficient for the laser light than that of a material constituting a surface of the outer electrode body, wherein the predetermined region of the outer electrode body is a region of the outer electrode body having the insulating material removed and where the outer electrode body of the discrete electronic component is configured to be bonded to a mounting subject directly or via a plated layer. Id. at 14 (emphases added). Appeal 2020-006573 Application 15/661,739 3 REFERENCES The prior art relied upon by the Examiner is: Name Reference Date Inagaki US Patent No. 6,876,554 B1 Apr. 5, 2005 Hattori US Patent Pub. No. 2009/0201624 A1 Aug. 13, 2009 Zenzai US Patent Pub. No. 2013/0107421 A1 May 2, 2013 Morita US Patent Pub. No. 2015/0036264 A1 Feb. 5, 2015 REJECTIONS The following rejections are before us on appeal: (1) Claims 1–12, 14–16, and 25–28 stand rejected under 35 U.S.C. § 112(a) for failing to comply with the written description requirement. Final Act. 2. (2) Claims 1–12, 14–16, and 25–28 stand rejected under 35 U.S.C. § 112(b) as being indefinite. Final Act. 4. (3) Claims 1–3, 5, 6, 14–16, and 25–28 stand rejected under 35 U.S.C. § 103 as obvious over Inagaki. Final Act. 6; see also Ans. 3 (withdrawing the alternate rejection in which these claims were rejected as anticipated by Inagaki under 35 U.S.C. § 102(a)(1)). (4) Claims 1–3, 5, 6, 14–16, and 25–28 stand rejected under 35 U.S.C. § 103 as obvious over Inagaki in view of Hattori. Final Act. 9. (5) Claims 4 and 7 stand rejected under 35 U.S.C. § 103 as obvious over Inagaki in view of Zenzai. Final Act. 11. (6) Claims 8–10 stand rejected under 35 U.S.C. § 103 as obvious over Inagaki in view of Morita. Final Act. 12. Appeal 2020-006573 Application 15/661,739 4 (7) Claims 11 and 12 stand rejected under 35 U.S.C. § 103 as obvious over Inagaki in view of Morita and Zenzai. Final Act. 13. OPINION I. Written Description Rejection The Examiner rejects claims 1–12, 14–16, and 25–28 for failing to comply with the written description requirement. Final Act. 2. The issue is whether the Specification provides written description support for the recited discrete electronic component. Under 35 U.S.C. § 112(a), the Specification must provide “a written description of the” claimed invention. The written description requires a “subjective inquiry about what the inventor possessed” as would be understood by an artisan of ordinary skill. Ariad Pharms., Inc. v. Eli Lilly & Co., 598 F.3d 1336, 1366 (Fed. Cir. 2010) (en banc) “A claim will not be invalidated on section 112 grounds simply because the embodiments of the specification do not contain examples explicitly covering the full scope of the claim language.” LizardTech, Inc. v. Earth Res. Mapping, Inc., 424 F.3d 1336, 1345 (Fed. Cir. 2005) (citing Union Oil Co. v. Atl. Richfield Co., 208 F.3d 989, 997 (Fed. Cir. 2000)). Rather, the “patent specification is written for a person of skill in the art, and such a person comes to the patent with the knowledge of what has come before.” LizardTech, 424 F.3d at 1345 (citing In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995)). In the present case, the Examiner notes that the word “discrete” is not used in the original disclosure. Final Act. 3. The Examiner explains, “Simply because some of the figures show one component, does not provide support for narrowing the scope of the disclosed invention by requiring that only one component be worked upon at a time.” Id. at 3–4 (emphasis Appeal 2020-006573 Application 15/661,739 5 added). The Examiner further explains, “The actual 112(a) rejection is directed to the fact that there was not originally disclosed a method of manufacturing a discrete electronic component, one at a time.” Ans. 16 (emphasis omitted, emphasis added). In response, Appellant contends that the claims do “not recite ‘one at a time’ and never has.” Reply Br. 2. Appellant submits that the original disclosure provides the requisite support for manufacturing a discrete electronic component, citing in part paragraphs 97 and 100–104 of the Specification. Appeal Br. 4, 6. Appellant explains that these paragraphs “unequivocally demonstrate that in the manufacturing method, discrete (i.e., individual) electronic components are covered with an insulating layer.” Id. at 6. We agree with Appellant that the rejection is premised on an erroneous interpretation of claim 1, and that the Specification provides sufficient support for the claimed limitation. Claim 1 recites a “manufacturing method for a discrete electronic component.” Appeal Br. 14 (Claims App.). The claim does not recite language that requires the electronic component to be manufactured “one at a time,” as the Examiner understands. See Final Act. 3–4; see also Ans. 16. Simply describing the component as “discrete” does not impart a requirement that only one component be manufactured at a time. Rather, dictionary evidence supports Appellant’s position that a skilled artisan would have understood that a “discrete electronic component” is “[a]n elementary electronic device constructed as a single unit” that is designed to be soldered to a printed circuit. Appeal Br. 11 (quoting technical definition of “discrete component” at https://www.pcmag.com/ Appeal 2020-006573 Application 15/661,739 6 encyclopedia/term/discrete-component); see also id. (quoting Nicolas Patin, Discrete Component (Ch. 2.3.1.), in 1 Power Electronics Applied to Industrial Systems and Transports (2015) (“Discrete components contain a single component (or two components in the case of transistors with antiparallel diodes) in a simple package, usually designed to be soldered to a printed circuit.”) (emphasis omitted)). Even if the Specification does not use the term “discrete,” as the Examiner points out (Final Act. 3), we find that a skilled artisan would have understood that the figures provide support for manufacturing “discrete” electronic components. For example, Figures 1A– 1D, 2A–2D, 3A, 3B, 4A–4D, 5A, 5B, and 6 of Appellant’s Specification depict a discrete electronic component in the form of an inductor. See Spec. ¶ 79 (“[The illustrated] embodiments will be described by taking a multilayer inductor as an example of an electronic component.”). For the foregoing reasons, Appellant has identified sufficient evidence showing the Specification would have reasonably conveyed to a skilled artisan that the inventor had possession of the claimed invention at the time the application was filed. As such, we reverse the Examiner’s rejection of claims 1–12, 14–16, and 25–28 for failing to comply with the written description requirement. Appeal 2020-006573 Application 15/661,739 7 II. Indefinite Rejection The Examiner rejects claims 1–12, 14–16, and 25–28 as being indefinite. Final Act. 4. A claim is properly rejected as indefinite if, after applying the broadest reasonable interpretation in light of the specification, the metes and bounds of a claim are not clear because the claim contains words or phrases whose meaning is unclear. In re Packard, 751 F.3d 1307, 1310 (Fed. Cir. 2014) (per curiam); see also Ex parte McAward, Appeal No. 2015-006416, 2017 WL 3669566, at *5 (PTAB Aug. 25, 2017) (precedential) (adopting the approach for assessing indefiniteness approved by the Federal Circuit in Packard). In rejecting the claims, the Examiner explains, referring to independent claim 1: (1) The preamble recites a method for manufacturing a “discrete electronic component, [yet the steps are] performed on ‘the discrete electronic component’. . . . How can one possibly make a product that is already made?” Final Act. 4. (2) The claim recites the step of “‘the outer electrode body of the discrete electronic component is configured to be bonded to a mounting subject directly or via a plated layer’. . . . What does one do to a component to configure it to bond directly or indirectly?” Id. at 5. We disagree with the Examiner that this language renders the claims indefinite. As to the Examiner’s first point of indefiniteness, we do not find the meaning of “forming an insulating layer on . . . the discrete electronic component”—or any of the other recited steps—unclear simply because the preamble of the claim recites a “manufacturing method for a discrete Appeal 2020-006573 Application 15/661,739 8 electronic component.” Appeal Br. 14 (Claims App.). We agree with Appellant’s argument that performing steps on the “discrete electronic component . . . does not change the fact that the discrete electronic component both before and after the coating are both still a discrete electronic component.” Appeal Br. 8. In other words, a skilled artisan would have understood that the claimed method of making a final discrete electronic component may include steps that modify an initial pre-existing discrete electronic component. As to the Examiner’s second point of indefiniteness, we agree with Appellant that the “fact that the claim does not spell out any number of possible configurations for how to bond the predetermined region to the mounting subject does not render the claim indefinite.” Reply Br. 6. For example, a skilled artisan reviewing the claims and the Specification would have understood that the electronic component may be mounted to a circuit substrate using solder. See, e.g., Spec. ¶ 3 (“A surface-mounting electronic component, such as a multi[-]layer ceramic capacitor, is mounted on a circuit substrate, which is a mounting subject”); see also, e.g., id. ¶ 17 (“This configuration makes it possible to increase the reliability of bonding the electronic component to a mounting subject by using solder.”). The fact that the claims do not explicitly limit how the electronic component is configured to be mounted by bonding does not render the claims indefinite. For the foregoing reasons, we reverse the Examiner’s rejection of claims 1–12, 14–16, and 25–28 as being indefinite. Appeal 2020-006573 Application 15/661,739 9 III. Prior Art Rejections The Examiner rejects claims 1–12, 14–16, and 25–28 as being unpatentable over combinations of references. See Final Act. 6–14. Claim 1 is the sole independent claim. In rejecting dependent claims 2–12, 14–16, and 25–28, the Examiner relies on, and adds to, the same initial findings and reasoning relied upon in rejecting independent claim 1. See id. Specifically, the Examiner relies primarily on Inagaki for disclosing several of the features of independent claim 1. See id. at 6–7. The issue is whether the Examiner erred in rejecting independent claim 1 as unpatentable over Inagaki. A. Examiner’s Rejection of Independent Claim 1 In rejecting independent claim 1, the Examiner finds that Inagaki discloses the majority of the claimed features, citing in part Inagaki’s Figure 2D. Final Act. 6–7. We reproduce Inagaki’s Figures 1A–1D and 2A–2D, below: Appeal 2020-006573 Application 15/661,739 10 Figures 1A–1D (above left) and Figures 2A–2D (above right) collectively depict “a process for manufacturing a printed circuit board.” See Inagaki 17:36–40 (emphasis added). These figures depict the circuit board manufacturing process beginning with Figure 1A and progressing to Figure 2D. See id. at 22:48–23:45. Inagaki describes chip capacitors 20 placed on core substrate 30 with adhesive material 34 (id. at 22:62–67, Figure 1D) and that resin layer 36 is subsequently placed in the space between capacitors 20 in cavity 32 (id. at 23:14–20, Figure 2B). Insulating layer 40 is then applied onto the structure (id. at 23:28–30, Figure 2C) after which openings 48 are formed in insulating layer 40 by a laser or light (id. at 23:28–43, Figure 2D). The Examiner finds that one of chip capacitors 20 satisfies the claimed “discrete electronic component” and that insulating layer 40 is removed at “predetermined region” 48, and further the “outer electrode body of the discrete electronic component is configured to be bonded to a Appeal 2020-006573 Application 15/661,739 11 mounting subject directly or via a plated layer.” Final Act. 6–7 (citing Inagaki Figs. 1D–2D, 2:51–67, 2:1–42). B. Analysis Appellant argues that the Examiner erred because claim 1 recites a method for manufacturing a discrete electronic component, and Inagaki discloses a method for manufacturing a printed circuit board. See Appeal Br. 10–11. Appellant’s argument is persuasive. As explained previously, a skilled artisan would have understood that a “discrete electronic component” is a single circuit element, such as a resistor, capacitor, or inductor, whereas a printed circuit board comprises a plurality of discrete electronic components. See supra p.6; see also Appeal Br. 11 (citations omitted). Although we agree with the Examiner that each of Inagaki’s chip capacitors 20 is a “discrete electronic component” (see Final Act. 6), Inagaki does not disclose manufacturing chip capacitors 20 that would satisfy the claimed limitations. For example, claim 1 requires that an insulating layer be formed on the discrete electronic component, then removed at a “predetermined region . . . where the . . . discrete electronic component is configured to be bonded to a mounting subject.” Appeal Br. 14 (Claims App.). Although Inagaki discloses its insulating layer 40 as being removed to expose part of capacitor 20 at openings 48, the Examiner does not explain how this exposed “predetermined region . . . is configured to be bonded to a mounting subject,” as required by the claims. See Final Act. 6–7. Indeed, Inagaki discloses that its chip capacitors 20 are “mounted” to substrate 30 via adhesive 34 before insulating layer 40 is applied (see Inagaki 22:62–67, Appeal 2020-006573 Application 15/661,739 12 Figures 1A–2D), whereas the apparent order of the claimed steps requires the insulating layer to be formed and removed prior to being “bonded to a mounting subject.” See Mantech Envt’l Corp. v. Hudson Envt’l Servs., Inc., 152 F.3d 1368, 1376 (Fed. Cir. 1998) (determining “that the sequential nature of the claim steps is apparent from the plain meaning of the claim language”). Because we do not see how Inagaki’s “predetermined region” 48 is “where the . . . discrete electronic component is configured to be bonded to a mounting subject” as required by independent claim 1, we reverse the rejection of claim 1. We also reverse the rejections of dependent claims 2– 12, 14–16, and 25–28—which inherit the same rejection infirmities—as unpatentable over Inagaki and the other cited references. CONCLUSION We reverse the Examiner’s rejections of claims 1–12, 14–16, and 25– 28. Appeal 2020-006573 Application 15/661,739 13 DECISION SUMMARY In summary: Claim(s) Rejected 35 U.S.C. § Reference(s)/ Basis Affirmed Reversed 1–12, 14–16, 25–28 112(a) Written Description 1–12, 14–16, 25–28 1–12, 14–16, 25–28 112(b) Indefiniteness 1–12, 14–16, 25–28 1–3, 5, 6, 14–16, 25–28 103 Inagaki 1–3, 5, 6, 14–16, 25–28 1–3, 5, 6, 14–16, 25–28 103 Inagaki, Hattori 1–3, 5, 6, 14–16, 25–28 4, 7 103 Inagaki, Zenzai 4, 7 8–10 103 Inagaki, Morita 8–10 11, 12 103 Inagaki, Morita, Zenzai 11, 12 Overall Outcome 1–12, 14–16, 25–28 REVERSED