Ming Huei. Lien et al.

Patent Trials and Appeals BoardJan 7, 2020

13419835 - (D) (P.T.A.B. Jan. 7, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 13/419,835 03/14/2012 Ming Huei LIEN P20111449US00/1085.969 1079 54657 7590 01/07/2020 DUANE MORRIS LLP (TSMC) IP DEPARTMENT 30 SOUTH 17TH STREET PHILADELPHIA, PA 19103-4196 EXAMINER CHEN, KEATH T ART UNIT PAPER NUMBER 1716 MAIL DATE DELIVERY MODE 01/07/2020 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ Ex parte MING HUEI LIEN, CHIA-HO CHEN, SHU-FEN WU, CHIH-TSUNG LEE, and YOU-HUA CHOU Appeal 2019-001957 Application 13/419,835 Technology Center 1700 ____________ Before ROMULO H. DELMENDO, BEVERLY A. FRANKLIN, and SHELDON M. MCGEE, Administrative Patent Judges. DELMENDO, Administrative Patent Judge. DECISION ON APPEAL The Appellant1 appeals under 35 U.S.C. § 134(a) from the Primary Examiner’s final decision to reject claims 10–16, 18, and 20–26.2 We have jurisdiction under 35 U.S.C. § 6(b). We affirm. 1 We use the word “Appellant” to refer to “applicant” as defined in 37 C.F.R. § 1.42. The Appellant identifies “Taiwan Semiconductor Manufacturing Co., Ltd.” as the real party in interest (Appeal Brief filed October 12, 2018 (“Appeal Br.”) at 3). 2 See Appeal Br. 13–26; Final Office Action entered April 13, 2018 (“Final Act.”) at 2–19; Examiner’s Answer entered November 7, 2018 (“Ans.”) at 3–15. Appeal 2019-001957 Application 13/419,835 2 I. BACKGROUND The subject matter on appeal relates to a method for operating a semiconductor manufacturing apparatus provided with a valve assembly for loading and unloading substrates into and out of the apparatus and for carrying out a purge operation (Specification filed March 14, 2012 (“Spec.”) ¶ 1; Abstract). Figure 1 (annotated) is illustrative and is reproduced from the Drawings filed March 14, 2012, as follows: Figure 1 above illustrates a method of operating an apparatus in which a wafer 12 is loaded into a deposition process chamber 2 with side walls 4 through an aperture 22 provided by a valve assembly 50 (Fig. 2) including, inter alia, a door 24 in an open position, delivery lines 60 (Fig. 2) for supplying inert purge gas 28, and exhaust lines 32 and then placed on a stage 16 for processing using ionized gas represented by arrows 18, wherein a pump 36 including exhaust line 42 pumps process chamber 2 (Spec. ¶¶ 15– Appeal 2019-001957 Application 13/419,835 3 17). The Specification states that when the processing operation is concluded, the purging of the valve assembly may continue at a lower rate than that used during processing (id. ¶ 22). Representative claim 10 is reproduced from the Claims Appendix to the Appeal Brief, as follows: 10. A method for operating a semiconductor manufacturing apparatus, said method comprising: providing a process chamber [2] having an interior [14] and a sidewall [4] with an aperture [22] therethrough; providing a valve assembly [50] including a door [24] that forms a detachable seal with said sidewall [4] to close said aperture [22], wherein said door [24] contacts an outer surface of said sidewall [4] to form the detachable seal with said sidewall [4]; operating said apparatus by carrying out a substrate processing operation within said process chamber [2]; exhausting a process gas from said process chamber by a first exhaust line [42] directly connected to said interior [14] of the process chamber [2]; cleaning said apparatus by carrying out a cleaning operation of a stage within said process chamber [2], while no wafer [12] is on the stage [16]; delivering an inert purge gas [28] to said valve assembly [50] during said substrate processing operation and said cleaning operation; and exhausting said inert purge gas [28] from said valve assembly [50] at a same time as said substrate processing operation is performed and a same time said cleaning operation is performed, via a second exhaust line [32] directly connected to said valve assembly [50], wherein the exhausting is performed using a single pump [36] directly connected to the first and second exhaust lines [42, 32], wherein the inert purge gas [28] is provided at a first flow rate when the door [24] of the valve assembly [50] is closed and a second flow rate when the door [24] of the valve assembly [50] is open, wherein the second flow rate is less than the first flow rate; Appeal 2019-001957 Application 13/419,835 4 unloading a processed substrate from said process chamber [2] while exhausting said inert purge gas [28] at said second flow rate. (Claims Appendix (emphasis and bracketed reference numerals added)). II. REJECTIONS ON APPEAL The claims stand rejected under pre-AIA 35 U.S.C. § 103(a), as follows: A. Claims 10–16, 18, and 20–26 as unpatentable over Shigeoka et al.3 (“Shigeoka”), Lorimer,4 Kawasaki,5 Ramm,6 and Garnache;7 and, alternatively, B. Claims 10–16, 18, and 20–26 as unpatentable over Shigeoka, Komino,8 Kawasaki, Ramm, and Garnache. (Ans. 3–15; Final Act. 2–19). III. DISCUSSION 1. Grouping of Claims With respect to Rejection A, the Appellant’s arguments focus on claim 10 (Appeal Br. 13–23). With respect to Rejection B, the Appellant’s arguments refer to the same reasons offered against Rejection A, adding only that Komino does not cure the alleged deficiencies in the Examiner’s 3 JP 2004-288982, published October 14, 2004. We cite to the machine- generated English language translation of record. 4 US 5,363,872, issued November 15, 1994. 5 US 2009/0190009 A1, published July 30, 2009. 6 US 2003/0021895 A1, published Jan. 30, 2003. 7 US 3,603,284, issued Sept. 7, 1971. 8 JP 7-147247, published June 6, 1995. Appeal 2019-001957 Application 13/419,835 5 reasoning provided for Rejection A (id. at 23–25). Therefore, consistent with 37 C.F.R. § 41.37(c)(1)(iv), we confine our discussion to claim 10. That discussion controls the outcome for both rejections and all claims on appeal. 2. The Examiner’s Position The Examiner finds that Shigeoka describes a method for processing a semiconductor wafer including many of the limitations recited in claim 10 but acknowledges several differences between the claimed method and Shigeoka’s method (Ans. 3–5; Final Act. 2–7). In resolving these differences, the Examiner relies on the teachings found in Lorimer, Kawasaki, Ramm, and Garnache and provides reasons in support of a conclusion that a person having ordinary skill in the art would have combined the references in the manner claimed by the Appellant (Ans. 5–7; Final Act. 7–11). Regarding the disputed claim limitations highlighted in reproduced claim 10 above, the Examiner relies primarily on the combined teachings found in Shigeoka and Garnache (Ans. 7; Final Act. 10–11). In this regard, the Examiner points out that “the critical issue is . . . whether the secondary reference [Garnache]’s teaching of nominal flow of inert gas during substrate loading means a very small flow rate” (Ans. 11)—i.e., whether “a person of ordinary skill in the art would have understood that ‘nominal’ [as disclosed in Garnache] refers to a very small flow rate during loading (chamber is open) relative to the flow rate during purging (chamber is closed)” (id. at 12). In support, the Examiner relies on a dictionary definition of the term “nominal” (id. at 7). Appeal 2019-001957 Application 13/419,835 6 3. The Appellant’s Contentions The Appellant does not specifically dispute the Examiner’s factual findings regarding the scope and content of Shigeoka, Lorimer, Kawasaki, or Ramm (Appeal Br. 13–23). Rather, the Appellant’s principal argument is that “the Examiner has misinterpreted the teachings of Garnache” because “contrary to the Examiner’s assertion, a person having ordinary skill in the art would not have understood the term ‘nominal’ [as disclosed in Garnache] to mean ‘very small’ as used in the context of Garnache” and that “Garnache fails to differentiate the ‘nominal’ flow rate from any other flow rate such that a person having ordinary skill in the art would have understood the nominal flow rate to be less than a first flow rate provided when the door of a valve assembly is closed” (id. at 14). According to the Appellant, the definition “very small” for “nominal” is only applicable in the context of a price or charge and, therefore, is not relevant in interpreting Garnache (id. at 15). The Appellant urges that, instead, the term “nominal” is being used in Garnache to indicate that the “flow rate did not ‘necessarily correspond exactly to the real value’ of the desirable flow rate” (id. (relying on an alternative definition)). 4. Opinion For the reasons given by the Examiner and below, the Appellant’s arguments fail to identify reversible error in the Examiner’s rejection. In re Jung, 637 F.3d 1356, 1365 (Fed. Cir. 2011). Shigeoka describes an atomic layer deposition (ALD) method using a processing unit in which raw gas is supplied to a heated substrate under decompression (Shigeoka ¶ 2). Specifically, Shigeoka’s Figure 1 is reproduced, as follows: Appeal 2019-001957 Application 13/419,835 7 Shigeoka’s Figure 1 above depicts a processing unit in which a gate valve 16 is attached to a side wall of a treatment container 2, wherein the gate valve 16 may be opened to allow insertion/removal of a wafer W (not shown in Fig. 1) or closed (Shigeoka ¶¶ 23, 26). According to Shigeoka, raw gas and purge gas may be supplied from gas supply device 8 to the internal space S in which the wafer is placed, and a turbo-molecular pump 10 and dry pump 14 are used for exhaust (id. ¶¶ 23–25). Shigeoka also discloses a local ventilation mechanism by which gate space G is exhausted using dry pump 14 without passing the exhaust gas through treatment space S (id. ¶ 45). As Appeal 2019-001957 Application 13/419,835 8 the Examiner finds (Ans. 5), Shigeoka does not disclose, inter alia, the disputed limitations highlighted in reproduced claim 10 above. Garnache discloses a method for operating a vapor deposition reactor in which substrates 30 are loaded onto a graphite susceptor 28 while a bottom plate 16 is in a lowered position such as to allow a “nominal flow of inert gas . . . in order to maintain chamber 18 in a relatively clean condition” and “[b]ottom plate 16 is raised in order to close reactor 10 for the deposition process” (Garnache col. 4, ll. 37–43 (emphasis added); Abstract; Fig. 1). Garnache further teaches that “[c]hamber 18 is then purged for about one minute by an inert gas, preferably argon, which is maintained at any desirable flow rate which will [e]nsure adequate purging” and “[d]ue to the high cost of argon, it is acceptable to utilize a purge rate of about one- tenth that of the reactant gases to be referred to later” (id. at col. 4, ll. 44–48 (emphases added)). Given the collective teachings found in Shigeoka and Garnache, we share the Examiner’s conclusion that a person having ordinary skill in the art would have been prompted to combine these references in the manner claimed by the Appellant—i.e., to provide a “nominal” purge rate that is at a relatively low rate when Shigeoka’s gate valve 16 is open (for loading the wafers) than that compared to when the gate valve 16 is closed to “[e]nsure adequate purging”—in order to effect a clean deposition chamber efficiently without wasting costly inert purge gas such as argon, as suggested by Garnache. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007) (“[I]f a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the Appeal 2019-001957 Application 13/419,835 9 same way, using the technique is obvious unless its actual application is beyond his or her skill.”). We find no persuasive merit in the Appellant’s argument that the Examiner’s proffered definition of the term “nominal” in Garnache as “very small” is erroneous because that definition applies only in the context of a price or charge (Appeal Br. 14–15). Consistent with the Examiner’s position, the term “nominal” may mean “TRIFLING, INSIGNIFICANT” such as in “his involvement was nominal” (See https://www.merriam- webster.com/dictionary/nominal). Thus, the Appellant is incorrect that “nominal” cannot mean a “very small” (or insignificant) amount in a context other than price or charge. In any event, Garnache would have suggested a lower purge rate while the chamber 18 is open (to accommodate loading of the wafers) because, as the Examiner explains (Ans. 13–14), Garnache teaches that the purge rate after the chamber is closed may be “any desirable flow rate which will [e]nsure adequate purging” (Garnache at col. 4, ll. 42–46 (emphasis added)). Such “any desirable flow rate” would include at least the “nominal” flow rate or a flow rate slightly higher than the “nominal” flow rate, the latter of which would meet claim 10’s relationship between the “first flow rate” and the “second flow rate.” In re Aller, 220 F.2d 454, 456 (CCPA 1955) (“[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.”). The Appellant also argues that “[n]one of the additionally cited references are cited for disclosing ‘unloading a processed substrate from said process chamber while exhausting said inert purge gas at said second flow Appeal 2019-001957 Application 13/419,835 10 rate[]’” (Appeal Br. 19). But, as the Examiner explains (Ans. 13), “[a] person of ordinary skill [in the art] would not have wasted argon when the chamber is opened.” Therefore, a person having ordinary skill in the art would have unloaded Shigeoka’s treated wafers at a relatively lower purge—i.e., at a “nominal” flow rate—to minimize argon waste. In re Preda, 401 F.2d 825, 826 (CCPA 1968) (“[I]n considering the disclosure of a reference, it is proper to take into account not only specific teachings of the reference but also the inferences which one skilled in the art would reasonably be expected to draw therefrom.”). The Appellant argues that the Examiner’s rejection lacks an articulated reason with some rational underpinning to support a conclusion that a person having ordinary skill in the art would have combined Shigeoka with Garnache in the manner claimed by the Appellant (Appeal Br. 20). That is incorrect (see Ans. 7, 12–14). For the reasons well-stated by the Examiner and above, we uphold the Examiner’s rejections. IV. CONCLUSION In summary: Claims Rejected 35 U.S.C. § Reference(s)/ Basis Affirmed Reversed 10–16, 18, 20–26 103(a) Shigeoka, Lorimer, Kawasaki, Ramm, Garnache 10–16, 18, 20–26 10–16, 18, 20–26 103(a) Shigeoka, Komino, Kawasaki, Ramm, Garnache 10–16, 18, 20–26 Overall Outcome 10–16, 18, 20–26 Appeal 2019-001957 Application 13/419,835 11 No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a). AFFIRMED