Jonathan Haswell

Patent Trials and Appeals Board

Apr 14, 2021

2019006190 (P.T.A.B. Apr. 14, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/485,810 05/31/2012 Jonathan M. Haswell CA2373 1096
124328 7590 04/14/2021
Sughrue Mion/SSI
2000 Pennsylvania Avenue NW
Washington, DC 20006
EXAMINER
AHMED, ENAM
ART UNIT PAPER NUMBER
2112
NOTIFICATION DATE DELIVERY MODE
04/14/2021 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
PPROCESSING@SUGHRUE.COM
sughrue@sughrue.com
uspto@sughrue.com
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte JONATHAN M. HASWELL

____________

Appeal 2019-006190
Application 13/485,810
Technology Center 2100
____________

Before JOHN A. EVANS, JUSTIN BUSCH, and
JOHN P. PINKERTON, Administrative Patent Judges.

EVANS, Administrative Patent Judge.

DECISION ON APPEAL
STATEMENT OF THE CASE
Jurisdiction
Appellant1 seeks our review under 35 U.S.C. § 134(a) of the
Examiner’s final rejection of Claims 1–21, which are all of the pending
claims. Appeal Br. 2. We have jurisdiction under 35 U.S.C. § 6(b).

1 We use the word “Appellant” to refer to “applicant” as defined in
37 C.F.R. § 1.42 (2017). Appellant states the real party in interest is
SAMSUNG ELECTRONICS CO. LTD. Appeal Br. 2.
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We REVERSE.2
Summary of the Invention
The claims relate to an enhanced, computer-implemented checksum
system that detects several types of data corruption including bit or byte
flipping or reordering. See, e.g., Spec., Title, ¶¶ 1, 12–14, 28, 31.
Invention
Claims 1, 8, and 15 are independent. Appeal Br. 5–6. An
understanding of the invention can be derived from a reading of Claim 1,
which is reproduced below.
1. A method of generating a checksum for a data
object including multiple data units, comprising:
for each of the data units:
obtaining a corresponding address of the data unit;
and
rotating the data unit based on said corresponding
address of the data unit by bit shifting the data unit to
generate a rotated data unit; and
generating the checksum for the data object based on said
rotated data units.
Appeal Br. 17, Claims App.

2 Rather than reiterate the arguments of Appellant and the Examiner, we
refer to the Appeal Brief (filed November 5, 2018, “Appeal Br.”), the Reply
Brief (filed August 16, 2019, “Reply Brief”), the Examiner’s Answer
(mailed July 11, 2019, “Ans.”), the Final Action (mailed June 14, 2018,
“Final Act.”), and the Specification (filed May 31, 2012, “Spec.”) for their
respective details.
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References
Name Publication Number Date
Narad US 2004/0143655 A1 July 22, 2004
Levy US 9,372,870 B1 June 21, 2016
Ioffe US 8,290,918 B1 Oct. 16, 2012
Rejections3
Claims Rejected 35 U.S.C. § References/Basis
1–21 101 Ineligible Subject Matter. Final Act. 4–7.
1, 2, 4, 5, 8, 9, 11, 12,
15, 16, 18, 194 103(a) Narad, Levy. Id. at 7–11.
3, 10, 17 103(a) Narad, Levy, Ioffe. Id. at 11.

ANALYSIS
We have reviewed the rejections of Claims 1–21 in light of
Appellant’s arguments that the Examiner erred. We consider Appellant’s
arguments as they are presented in the Appeal Brief and the Reply Brief.

3 The Application was examined under the pre-AIA first to invent
provisions. See, e.g., Final Act. 7.
4 The Final Office Action states that “Claims 1-21 are rejected under 35
U.S.C. 103(a) as being unpatentable over Narad . . . in view of Levy.” Final
Act. 7. The body of this rejection, however, includes findings only for
claims 1, 2, 4, 5, 8, 9, 11, 12, 15, 16, 18, and 19. See id. Accordingly, we
consider only claims 1, 2, 4, 5, 8, 9, 11, 12, 15, 16, 18, and 19 to stand
rejected under pre-AIA 35 U.S.C. § 103(a) as unpatentable over the
combination of Narad and Levy. We treat this irregularity in the record to
be a clerical or typographical error.
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CLAIMS 1–21: INELIGIBLE SUBJECT MATTER
Appellant argues the merits of the claims as a group with reference to
the limitations of independent Claim 1. See Appeal Br. 7–11. Independent
Claim 8 (system) and independent Claim 15 (computer program product)
recite substantially similar limitations. See Appeal Br. 19, 21–22, Claims
App. Therefore, we decide the appeal of the § 101 rejection on the basis of
illustrative Claim 1 and refer to the rejected claims collectively herein as
“the claims.” See 37 C.F.R. § 41.37(c)(1)(iv); In re King, 801 F.2d 1324,
1325 (Fed. Cir. 1986).
We reviewed the record de novo,5 in light of legal precedent and
recent policy guidance on patent subject matter eligibility.6 Based upon our
review of the record, we determine that Claim 1 is not “directed to” an
abstract idea because it recites additional elements that integrate the recited
abstract idea into a practical application. Accordingly, for the specific
reasons discussed below, we reverse the Examiner’s § 101 rejection of
Claims 1–21.
35 U.S.C. § 101
Section 101 provides that a patent may be obtained for “any new and

5 See SiRF Tech., Inc. v. Int’l Trade Comm’n, 601 F.3d 1319, 1331 (Fed. Cir.
2010) (“Whether a claim is drawn to patent-eligible subject matter is an
issue of law that we review de novo.”).
6 See 2019 Revised Patent Subject Matter Eligibility Guidance, 84 Fed.
Reg. 50 (Jan. 7, 2019) (“Revised Guidance, 84 Fed. Reg.”). “All USPTO
personnel are, as a matter of internal agency management, expected to
follow the guidance.” Revised Guidance, 84 Fed. Reg. 51; see also USPTO,
October 2019 Patent Eligibility Guidance Update 1 (Oct. 17, 2019) (“Oct.
2019 Update”), https://www.uspto.gov/sites/default/files/
documents/peg_oct_2019_update.pdf.
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useful process, machine, manufacture, or composition of matter, or any new
and useful improvement thereof.” 35 U.S.C. § 101. The Supreme Court has
long recognized, however, that § 101 implicitly excludes “[l]aws of nature,
natural phenomena, and abstract ideas” from the realm of patent-eligible
subject matter, as monopolization of these “‘basic tools of scientific and
technological work’” would stifle the very innovation that the patent system
aims to promote. Alice Corp. v. CLS Bank Int’l, 573 U.S. 208, 216 (2014)
(quoting Ass’n for Molecular Pathology v. Myriad Genetics, Inc., 569 U.S.
576, 589 (2013)); see also Mayo Collaborative Servs. v. Prometheus Labs.,
Inc., 566 U.S. 66, 72–78 (2012); Diamond v. Diehr, 450 U.S. 175, 185
(1981).
Under the mandatory Revised Guidance, we reconsider whether
Appellant’s claims recite:
1. any judicial exceptions, including certain groupings of abstract ideas
(i.e., mathematical concepts, certain methods of organizing human
activity such as a fundamental economic practice, or mental
processes),7 and
2. additional elements that integrate the judicial exception into a
practical application (see MPEP § 2106.05(a)–(c), (e)–(h)).
Only if a claim (1) recites a judicial exception and (2) does not
integrate that exception into a practical application, do we then determine
the claim is “directed to” an abstract idea and reach the issue of whether the

7 Revised Guidance, 84 Fed. Reg. 52. For an extensive listing of
“mathematical concepts,” “certain methods of organizing human activity,”
and “mental processes” that have been identified as abstract ideas, see
Revised Guidance at page 52, notes 12–15.
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claim:
3. adds a specific limitation beyond the judicial exception that is not
“well-understood, routine, conventional” in the field (see MPEP
§ 2106.05(d)); or
4. simply appends well-understood, routine, conventional activities
previously known to the industry, specified at a high level of
generality, to the judicial exception.
§ 101 Analysis
Claim 1 recites:
1. A method of generating a checksum for a data
object including multiple data units, comprising:
for each of the data units:
obtaining a corresponding address of the data unit;
and
rotating the data unit based on said corresponding
address of the data unit by bit shifting the data unit to
generate a rotated data unit; and
generating the checksum for the data object based on said
rotated data units.
Appeal Br. 17, Claims App.
The Examiner finds Claim 1 is “directed to the abstract idea of an
algorithm for calculating parameters indicating an abnormal condition and
manipulating information through mathematical correlations.” Final Act. 5.
According to the Examiner “[t]he claim . . . recites the steps of obtaining a
corresponding address of a data unit and rotating the data unit based on said
correlating or corresponding address of the data unit, by for example, bit
shifting the data unit to generate a rotated data unit,” which is similar to the
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court-identified abstract ideas in Digitech8 and In re Grams.9 Id.
We agree with the Examiner’s findings to the extent that Claim 1
recites an abstract idea. Claim 1 can be described as reciting the underlying
concepts of obtaining data, organizing and manipulating the data, and
performing evaluation or mathematical calculations based on the organized
and manipulated data. Accordingly, Claim 1 recites an abstract idea in
either the mathematical concepts or mental processes grouping. See Revised
Guidance, 84 Fed. Reg. 52. Consistent with the Examiner’s findings, the
claim recites an underlying concept similar to court-identified abstract ideas,
such as Digitech’s “process of organizing information through mathematical
correlations” and Grams’s process of “perform[ing] . . . tests . . . to obtain
data for . . . parameters . . . .” and “analyz[ing] that data to ascertain the
existence and identity of an abnormality, and possible causes thereof.”
Digitech, 758 F.3d at 1350; Grams, 888 F.2d at 837, 840–41. Other similar
court-identified abstract ideas include an algorithm for converting binary
coded decimal to pure binary (Benson10) and a method of calculating the
difference between local and average data values (Abele11).
Nevertheless, we determine that Claim 1 is not “directed to” an
abstract idea because the claim recites additional elements that integrate the
recited abstract idea into a practical application. According to the Revised
Guidance, certain considerations may indicate that an additional element (or

8 Digitech Image Techs., LLC v. Elecs. for Imaging, Inc., 758 F.3d 1344
(Fed. Cir. 2014).
9 In re Grams, 888 F.2d 835 (Fed. Cir. 1989).
10 Gottschalk v. Benson, 409 U.S. 63, 67–68 (1972).
11 In re Abele, 684 F.2d 902, 908–910 (CCPA 1982), abrogated by In re
Bilski, 545 F.3d 943 (Fed. Cir. 2008).
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combination of elements) has integrated the exception into a practical
application. These include:
An additional element [that] reflects an improvement in
the functioning of a computer, or an improvement to other
technology or technical field; . . .
an additional element [that] implements a judicial
exception with, or uses a judicial exception in conjunction with,
a particular machine or manufacture that is integral to the claim;
. . . [and]
an additional element [that] applies or uses the judicial
exception in some other meaningful way beyond generally
linking the use of the judicial exception to a particular
technological environment, such that the claim as a whole is
more than a drafting effort designed to monopolize the
exception.
Revised Guidance, 84 Fed. Reg. 55; see also id. at 55 nn.25, 27, 29. For the
reasons discussed below, we determine Claim 1 recites additional elements
that meet one or more of the above considerations and, thus, integrate the
recited abstract idea into a practical application.
As an initial matter, the Examiner’s findings for this part of the § 101
analysis are not persuasive because they lack adequate supporting evidence.
In particular, the Examiner finds the additional elements of the claims
“amount[] to no more than: (i) mere instructions to implement the idea on a
computer, and/or (ii) recitation of generic computer structure that serves to
perform generic computer functions that are known,” and when “[v]iewed as
a whole . . . do not provide meaningful limitation(s) to transform the abstract
idea into a patent eligible application of the abstract idea such that the
claim(s) amounts to significantly more than the abstract idea itself.” Final
Act. 5–6. In support of this position, the Examiner asserts that various claim
features—such as obtaining an address of the data unit, rotating the data unit
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based on the address, bit shifting, using a hash function, and generating a
checksum—do not amount to “significantly more” than an abstract idea
because each is either “known,” a “common practice,” “widely used,”
“basic,” or “an obvious modification, which can easily be implemented or
configured.” Id. In addition, the Examiner states that “even if . . . the
checksum may be used for detecting re-ordering of bytes, this does not
amount to significantly more, in the sense that it must be shown that there is
a clear improvement in the technology, or a need in the art which provides
improvements over existing applications that use checksums.” Id. at 6. The
Examiner further states that “using checksums to detect re-ordering of bits or
errors does not necessarily amount to significantly more, as there are many
applications which use many different kind of checksums, which can be
standard or enhanced checksums,” and, “[t]hus, the additional step of
generating the checksum for the data object based on said rotated data units,
does not improve the functionality of a computer, nor does it improve a
technology.” Id. The Examiner, however, presents no persuasive evidence
to support any of the above findings. Therefore, the Examiner’s findings do
not demonstrate that the additional elements of Claim 1 fail to integrate the
recited abstract idea into a practical application.
In contrast, Appellant argues the claims are not “directed to” an
abstract idea, but instead “are focused on generating a checksum for data
units that have been rotated by bit shifting based on the data unit addresses”
and, thus, “are directed to a solution to a problem specifically arising in the
context of computer technology, namely, that of checksum generation.”
Appeal Br. 9. In support of its position, Appellant cites the Specification’s
description of “an enhanced checksum system . . . capable of detecting
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reordering of bytes of data which does not require a large number of
processor cycles.” Id. (citing Spec. ¶¶ 13–14). Appellant asserts “the claims
cannot reasonably be interpreted as being directed to any alleged abstract
idea” because “bit shifting a data unit according to the address of that data
unit can be performed in no other context, and would serve no purpose in
any other context.” Id. at 9–10 (emphasis omitted). Appellant therefore
argues that “[t]he focus of the claims is clearly on the improvement of the
computer itself.” Id. at 10.
We agree with Appellant that Claim 1’s checksum process requires
the use of a computer and, moreover, is necessarily rooted in computer
technology in order to overcome a problem specifically arising in the realm
of computer systems. As described in the Specification, conventional
computing systems regularly use checksum algorithms for detecting data
that has been modified or corrupted during storage or transmission. Spec.
¶ 2. Appellant’s invention builds upon such conventional computing
systems by providing an “enhanced” checksum system that “protect[s]
against cases where blocks of data are reordered,” such that the “re-ordering
of bytes of data can be detected, not just modifications to the bytes.” Spec.
¶¶ 12 (“[T]he present invention provides an enhanced checksum system
wherein the data is not directly exclusively ORed, rather the address of the
byte, from the start of the data, is fed into a simple hash function . . . . to
provide protection against cases where blocks of data are reordered.”), 13.
The Specification further describes that “an information processing system
comprising a computer system [is] useful for implementing . . . the present
invention,” and that Appellant’s “checksum process is useful with a file
system or a storage system which maintains a checksum of the entire
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contents of a file” because it “provides protection from” “the most common
error in a file system”—“returning the wrong blocks or blocks out of
order”—“whereas a simple XOR checksum does not.” Id. ¶¶ 29–31. These
descriptions show that the focus of Appellant’s disclosed invention is an
algorithm whose functionality is intended to be applied in a computer system
in order to improve the computer’s functionality with enhanced data security
or integrity. This is consistent with the language of Claim 1, which recites,
“for each data unit,” “obtaining a corresponding address of the data unit,”
“rotating the data unit” based on the address, and “generating the checksum”
based on the rotated data unit. In other words, the recited process depends
on the “address of the data unit.” And given a plain reading of the claim in
view of the Specification, this “address” refers to a physical address in
computer memory that Appellant’s checksum system uses to find each
respective data unit and apply thereto the “enhanced” checksum method as
recited and described. See, e.g., Spec. ¶ 18 (“[T]he address comprises the
data unit offset from the start of the data block in a file, memory or storage
in an information technology system.”).
Claim 1 also recites a specific technique—“rotating the data unit . . .
by bit shifting the data unit” before being fed into an XOR operation for
generating the checksum—to solve a technological problem arising in
computing technology: detecting reordering types of data corruption in
addition to simple bit or byte errors. Put another way, the claims are
directed to a non-abstract improvement in an existing technological process
(detecting data modification or corruption using a checksum algorithm).
The claim therefore recites a specific implementation of varying the way
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checksums are generated that improves the ability of existing checksum
systems to detect unauthorized or undesirable changes in data.
Similarly, in Koninklijke,12 the Federal Circuit found eligible a device
for providing a variable error checking function because the claims were
“directed to a non-abstract improvement in an existing technological process
(i.e., error checking in data transmissions)” and “recite[d] a specific
implementation of varying the way check data is generated that improves the
ability of prior art error detection systems to detect systematic errors.”
Koninklijke, 942 F.3d at 1350–51. Likewise, in SRI,13 the Federal Circuit
found eligible claims directed to “a specific technique—using a plurality of
network monitors that each analyze specific types of data on the network
and integrating reports from the monitors—to solve a technological problem
arising in computer networks: identifying hackers or potential intruders into
the network.” SRI, 930 F.3d at 1303. And, in Ancora,14 the Federal Circuit
upheld claims that used a modifiable portion of a computer’s BIOS memory
to prevent running software on an unauthorized computer. Ancora, 908 F.3d
at 1345. The Court noted that “[i]mproving security . . . can be a
non-abstract computer-functionality improvement if done by a specific
technique that departs from earlier approaches to solve a specific computer
problem”—that is, controlling the unauthorized use of software. Id. at 1348.

12 Koninklijke KPN N.V. v. Gemalto M2M GmbH, 942 F.3d 1143 (Fed. Cir.
2019).
13 SRI Int’l, Inc. v. Cisco Sys., Inc., 930 F.3d 1295 (Fed. Cir. 2019), cert.
denied, 140 S. Ct. 1108 (2020).
14 Ancora Techs., Inc. v. HTC Am., Inc., 908 F.3d 1343 (Fed. Cir. 2018), as
amended (Nov. 20, 2018).

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We therefore conclude that Appellant’s claims are not “directed to” an
abstract idea because the claims recite additional limitations that integrate
the recited judicial exception into a practical application. Because we
conclude the claims are “not directed to” an abstract idea, we need not reach
the remaining steps of the Revised Guidance § 101 analysis.
We also note that the Examiner’s Answer does not respond to
Appellant’s § 101 arguments, nor does it expressly withdraw the § 101
rejection or otherwise discuss the rejection beyond making a blanket
statement that “[e]very ground of rejection set forth in the Office action
dated 3/12/18 from which the appeal is taken is being maintained.” Ans. 3.
Accordingly, the Examiner’s Answer has not followed the MPEP, by failing
to either expressly withdraw the rejection or provide the mandatory
statement of reasons why the examiner disagrees with Appellant’s Appeal
Brief arguments. See MPEP 1207.02(A)(2) (“The examiner’s answer should
include . . . [a] statement of whether the examiner disagrees with each of the
arguments of appellant in the brief with respect to the issues presented and
an explanation of the reasons for disagreement with any such argument.”).
For the foregoing reasons, we decline to sustain the Examiner’s
rejection of Claims 1–21 under 35 U.S.C. § 101.
CLAIMS 1–5, 8–12, and 15–19:
OBVIOUSNESS BASED AT LEAST ON NARAD AND LEVY
Independent Claim 1 recites, in relevant part, “rotating the data unit
based on said corresponding address of the data unit by bit shifting the data
unit to generate a rotated data unit.” Independent Claims 8 and 15 recite a
commensurate limitation. In rejecting Claims 1, 8, and 15, the Examiner
finds various disclosures of Levy teach or suggest this limitation. Final Act.
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8–9 (citing Levy, Fig. 7A (item 703), 6:59–63, 10:14–37, 11:35–37, 22:16–
25, 22:33–39); Ans. 3–5; see also Final Act. 2–4 (additionally citing Levy
6:64–7:5, 42:36–53). In particular, the Examiner finds that,
based on (figure 7A) [of Levy], the Storage System 702[] stores
the input symbols, and each Storage System uses its own
assigned unique sequence number y and the Input Block
number 703 . . . is input to the Rotational Algorithm which can
perform bit scrambling or shifting or some form of symbol
manipulation, to compute checksum on a symbol segment
based on the selected input symbol segment, and finally store
the data to a storage medium 112.
Ans. 4 (citing Levy, Fig. 7A, 22:16–25, 22:33–35). The Examiner further
finds that:
“it is clear that the data [in Levy] is Reed-Solomon encoded,
and then scrambled which entails rotation of the symbols, such
as the input and the checksum symbol segments, thus, to one of
ordinary skill in the art, rotating of symbols such as input and
checksum symbol segments, can also include or consist of bit
shifting.”
Id. (citing Levy 6:59–63). The Examiner next finds that Levy’s computation
of a decoder matrix for producing a codeword that can correct data
transmission errors may include bit manipulation, which shows that “bit
shifting or bit manipulation within a matrix is general or common practice,
and . . . that bit manipulation of the symbols within the matrix can be done.”
Id. at 4–5 (citing Levy 10:14–37). The Examiner lastly points to Levy’s
disclosure of how its system handles a failure of a Multicast Burst Protocol
(MBP) exchange of data packets among peers, and in particular, that Codec
dispersal matrices and the Rotation are recomputed and the Burst is
reinitiated. Id. at 5 (citing Levy 42:36–53). The Examiner then concludes
that “it is obvious that recomputing the Codec dispersal matrices, the
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Rotation and peer sequence would entail some form of scrambling or
shifting of bits, as matrices are involved, and it is very well known that
matrices within a matrix are shifted.” Id.
Appellant disputes the Examiner’s findings and argues that neither
Levy nor Narad, alone or in combination, teaches or suggests “rotating the
data unit based on said corresponding address of the data unit by bit shifting
the data unit to generate a rotated data unit.” Appeal Br. 12–15; Reply Br.
4–10. Importantly, Appellant makes the following arguments. First, the
Rotational Algorithm disclosed by Levy, including the disclosed scrambling
or “rotation of the input and checksum symbol segments” does not
correspond to “bit shifting the data unit,” but rather “refers to the distributed
storage of individual segments of a block across Storage Systems, along
with that block’s checksum.” Reply Br. 6. Second, Levy’s “Input Block
number Bx is not an address[:] [i]nstead, [it] is merely a value used by the
Storage System to determine whether to perform a checksum on a segment
within the block.” Appeal Br. 13. Third, “the process of Levy cannot
reasonably be interpreted as ‘generating the checksum for the data object
based on said rotated data units’” because “the Reed-Solomon encoding
disclosed by Levy is performed upon the entire block before any alleged
rotation has occurred.” Id. at 7. Fourth, “[t]he described Reed-Solomon
encoder does not perform bit shifting,” but “[i]nstead, it merely computes a
checksum of an input symbol according to a known process and outputs a
codeword which is defined as the input symbol concatenated with the
checksum.” Id. at 8. Fifth, Levy’s “‘bit manipulation’ cannot reasonably be
interpreted as corresponding to the claimed ‘bit shifting’” because “[b]its
may be manipulated in any number of ways, and Levy does not disclose or
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suggest the use of any particular method of bit manipulation, let alone bit
shifting.” Id. at 9. Sixth, “[t]he mere fact that ‘matrices are involved’ in
[Levy’s] computation, or the alleged fact that ‘it is very well known that
matrices within a matrix are shifted’ as asserted by the Examiner, certainly
does not require any form of bit shifting, let alone the claimed ‘rotating’”
limitation. Id. at 10. And seventh, “none of the Examiner’s assertions made
in the Examiner’s Answer address the claim feature ‘rotating the data unit
based on said corresponding address of the data unit.’” Id.
We are persuaded of Examiner error. Levy’s rotational algorithm
involves storing block segments of checksum symbols and input symbol
segments in a particular rotational sequence. See, e.g., Levy at 22:16–25,
22:33–39, Fig. 7A. Contrary to the Examiner’s findings, Levy is silent as to
whether any “bit shifting” occurs within those block segments. And the
Examiner does not present any persuasive evidence that Levy’s rotational
sequencing of block segments suggests moving or shifting a bit from one
location to another. Levy’s disclosure of “bit manipulation” as part of
computing a matrix within a Reed-Solomon encoder implementation also
falls short. See Levy 10:14–37. Although “bit shifting” may be a type of
“bit manipulation,” as Appellant argues, there are many different ways to
manipulate bits. Moreover, the cited portion of Levy does little more than
state the phrase “bit manipulation.” Id. at 10:34–37. This alone is not
enough to show “bit shifting” as claimed. Levy’s description of “[c]ontent
that has been . . . scrambled” also fails to teach “bit shifting” because Levy
refers to this feature as the “rotation of the input and checksum symbol
segments”—that is, Levy’s rotational algorithm—which we have already
determined to be deficient. Id. at 6:59–61. Nor does the Examiner present
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any persuasive evidence that the mere mention of the word “scrambled” in
Levy discloses or suggests shifting an existing sequence of bits. In addition,
as Appellant argues, even if the Examiner were correct that “matrices within
a matrix are shifted” when recomputed as part of Levy’s Burst operation, it
is unclear how this corresponds to “bit shifting,” let alone the “rotating”
limitation in full. We also agree with Appellant that none of the cited
disclosures of Levy disclose or even suggest rotating a data unit “based on
said corresponding address of the data unit.”
For the foregoing reasons, we are persuaded that the Examiner erred
in finding Levy teaches or suggests “rotating the data unit based on said
corresponding address of the data unit by bit shifting the data unit to
generate a rotated data unit,” as recited. Nor does the Examiner cite Narad
as teaching or suggesting the argued limitation, or provide an obviousness
rationale that cures the rejection’s deficiencies. We decline to resort to
speculation to fill the gaps in the Examiner’s rejection. See Ex parte
Braeken, 54 USPQ2d 1110, 1112 (BPAI 1999).
Therefore, we decline to sustain the Examiner’s § 103(a) rejection of
Claims 1, 8, and 15 over Narad and Levy. Dependent Claims 2, 4, 5, 9, 11,
12, 16, 18, and 19 include a commensurate limitation via their ultimate
dependency from Claim 1, 8, or 15, and the Examiner does not make another
finding or reasoning that cures the above deficiencies. See Final Act. 9–11;
Ans. 3–5. Accordingly, we decline to sustain the Examiner’s § 103(a)
rejections of dependent Claims 2, 4, 5, 9, 11, 12, 16, 18, and 19 over Narad
and Levy.
We also decline to sustain the Examiner’s § 103(a) rejection of
Claims 3, 10, and 17 over Narad, Levy, and Ioffe. These claims include a
Appeal 2019-006190
Application 13/485,810

18
commensurate limitation via their ultimate dependency from Claim 1, 8, or
15, and the Examiner does not make another finding (for example, in Ioffe)
or reasoning that cures the above deficiencies. Final Act. 9, 11.
DECISION SUMMARY

Claim(s)
Rejected 35 U.S.C. § Reference(s)/Basis Affirmed Reversed
1–21 101 Eligibility 1–21
1, 2, 4, 5, 8,
9, 11, 12, 15,
16, 18, 19
103(a) Narad, Levy
1, 2, 4, 5, 8,
9, 11, 12, 15,
16, 18, 19
3, 10, 17 103(a) Narad, Levy, Ioffe 3, 10, 17
Overall 1–21

REVERSED