Facebook Technologies, LLC

Patent Trials and Appeals BoardJun 28, 2021

2020001846 (P.T.A.B. Jun. 28, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 15/458,832 03/14/2017 Ilias Pappas 31718-34807/US 6240 87851 7590 06/28/2021 Facebook/Fenwick Silicon Valley Center 801 California Street Mountain View, CA 94041 EXAMINER FLORES, ROBERTO W ART UNIT PAPER NUMBER 2621 NOTIFICATION DATE DELIVERY MODE 06/28/2021 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): fwfacebookpatents@fenwick.com ptoc@fenwick.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte ILIAS PAPPAS, SEAN LORD, YU-HSUAN LI, and ALEXANDER VICTOR HENZEN Appeal 2020-001846 Application 15/458,832 Technology Center 2600 Before ROBERT E. NAPPI, ELENI MANTIS MERCADER, and BETH Z. SHAW, Administrative Patent Judges. MANTIS MERCADER, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the Examiner’s decision to reject claims 1–13 and 15–19. See Final Act. 1. We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE. 1 We use the term “Appellant” to refer to “applicant” as defined in 37 C.F.R. § 1.42 (2018). Appellant identifies the real party in interest as Facebook Technologies, LLC of Menlo Park, California. Appeal Br. 2. Appeal 2020-001846 Application 15/458,832 2 CLAIMED SUBJECT MATTER The claimed invention is directed to “a stepped waveform with multiple intermedia voltage levels is applied to pixels, during both analog and/or digital subs frames, both to reduce power and to smooth transition from the perspective of a viewer.” Spec. 4, ll. 3–5. Figure 8(b) is reproduced below. Figure 8(b) illustrates a stepping pulse having decreasing voltage levels from a second intermediate voltage level followed by increasing voltage levels to the second intermediate voltage level. Fig. 8(b). Claim 1, reproduced below, is illustrative of the claimed subject matter: 1. A display, comprising: a matrix comprising a plurality of rows divided into a plurality of columns of cells, each cell including a light emitting device; a scan driver providing a plurality of scan line signals to respective rows of the matrix, Appeal 2020-001846 Application 15/458,832 3 each for selecting a respective row of the matrix to be programmed with pixel values; a data driver providing a plurality of variable level data signals to respective columns of the matrix, each for programming a respective pixel within a selected row of the matrix with a pixel value; and a pulse driver providing a plurality of driving signals to respective rows of the matrix, each driving signal comprising a sequence of driving pulses enabling the cells to emit light according to their programmed pixel values during respective subframes of successive frames to be displayed, wherein each driving pulse of the sequence of driving pulses comprises a stepped pulse with multiple intermediate voltage levels, the stepped pulse including increasing voltage levels from a first intermediate voltage level followed by decreasing voltage levels to the first intermediate voltage level or decreasing voltage levels from a second intermediate voltage level followed by increasing voltage levels to the second intermediate voltage level; wherein the data driver is configured to provide the variable level data signals to respective pixels within a selected row of the matrix during a limited number of sub-frames of a frame, variable data levels of the variable level data signals each being defined by a programmed gray-level value of a plurality of bits of a pixel value for the frame, and wherein the data driver is configured to provide data signals to the respective pixels within the selected row of the matrix during a remaining number of sub-frames of the frame, data levels of the data signals each being defined by a programmed value of a single bit of the pixel value for the frame, and wherein each stepped pulse of the sequence of driving pulses corresponds with the limited number of sub-frames of the frame or a sub- frame of the remaining number of sub-frames of the frame. Appeal 2020-001846 Application 15/458,832 4 REFERENCES The prior art relied upon by the Examiner is: Name Reference Date Shieh US 5,748,160 May 5, 1998 Yamada US 5,990,629 Nov. 23, 1999 Ozaki US 2006/0181490 A1 Aug. 17, 2006 Buckley US 2015/0015616 A1 Jan. 15, 2015 Choi KR 2005/0122688 A Dec. 29, 2005 Sung WO 2009/082056 A1 July 2, 2009 REJECTIONS Claims 1–6, 8–12, and 15–18 are rejected under 35 U.S.C. § 103 as being unpatentable over Sung in view of Buckley, Choi and further in view of Shieh. Final Act. 5. Claim 7 is rejected under 35 U.S.C. § 103 as being unpatentable over Sung, Buckley, Choi, and Shieh as applied to claim 1 above, and further in view of Ozaki. Final Act. 13. Claim 13 is rejected under 35 U.S.C. § 103 as being unpatentable over Sung, Buckley, Choi, and Shieh as applied to claim 1 above, and further in view of Yamada. Final Act. 13. Claim 19 is rejected under 35 U.S.C. § 103 as being unpatentable over Sung in view of Buckley and further in view of Choi. Final Act. 2. OPINION Claims 1–13 and 15–18 Claim 1 recites stepped pulse with multiple intermediate voltage levels, the stepped pulse including increasing voltage levels from a first intermediate voltage level followed by decreasing voltage levels to the first intermediate voltage level or decreasing voltage levels from a second intermediate voltage level followed by Appeal 2020-001846 Application 15/458,832 5 increasing voltage levels to the second intermediate voltage level. See claim 1 (emphasis added). Appellant argues that Figure 4 of Choi shows waveforms of scan line signals S1 to Sn provided by a scan driver. Appeal Br. 8, (citing Choi, p. 5, para. 6). Figure 4 of Choi is reproduced below: Figure 4 of Choi shows each of the scan lines S1 through Sn having a high voltage level, a single intermediate voltage level, and a low voltage level. Appellant argues that the “cited scan line signal S1, as well as each of the other scan line signals S2 through Sn, includes a pulse having a high voltage level, a single intermediate voltage level, and a low voltage level.” Id. 2 As such, Appellant argues that each of the S1 to Sn signals of Choi does not correspond to a “stepped pulse with multiple intermediate voltage levels,” as recited in claim 1 (emphasis added and omitted). Id. The Examiner modifies Choi’s Figure 4 (shown in Ans. 4) to an annotated Figure 4 as reproduced below: 2 The Appeal Brief lacks page numbering but we address page numbering by counting pages. Appeal 2020-001846 Application 15/458,832 6 Annotated Figure 4 of Choi indicates two intermediate levels L2, one for the descending part and one for the ascending part of the scan signal S1. The Examiner states that claim 1 recites “the stepped pulse including increasing voltage levels from a first intermediate voltage level followed by decreasing voltage levels to the first intermediate voltage level or decreasing voltage levels from a second intermediate voltage level followed by increasing voltage levels to the second intermediate voltage level.” Ans. 5. The Examiner finds that claim 1 does not recite the intermediate levels of the stepped pulse are different. Id. The Examiner finds that “[a]s annotated above, Choi teaches multiple intermediate levels at L2.” Id. The Examiner concludes that “the levels at L2 annotated above correspond to the multiple intermediate voltage levels” because the claim does not recite that the levels are different. Id. Appellant in its Reply argues that “[a]lthough the pulse of Choi reaches the intermediate voltage level at L2 twice, once on the way down and once on the way up, the pulse of Choi only has a single intermediate voltage level at L2.” Reply Br. 2. Appellant argues that Choi fails to teach or suggest “a stepped pulse with ‘multiple intermediate voltage levels,” as Appeal 2020-001846 Application 15/458,832 7 recited in claim 1. Id. Appellant argues that the recitation of “‘a stepped pulse with multiple intermediate voltage levels’ in the claim 1 is further clarified by the recitation of ‘the stepped pulse including . . . decreasing voltage levels from a second intermediate voltage level followed by increasing voltage levels to the second intermediate voltage level.’” Id. Appellant argues that “[a]s recited in claim 1, the stepped pulse includes decreasing voltage levels from the second intermediate voltage level followed by increasing voltage levels to the second intermediate voltage level.” Reply Br. 2–3. We agree with Appellant’s argument. The Examiner’s annotated Figure 4 of Choi does not teach or suggest a stepped pulse that includes decreasing voltage levels from the second intermediate voltage level followed by increasing voltage levels to the second intermediate voltage level as required by claim 1. Nor do we agree with the Examiner’s further finding that if L2 is 2 volts and L1 is 1 volt, then Choi teaches decreasing voltage levels (there are multiple voltage levels between 2 volts and 1 volts such as 1.1, 1.3, 1.5, 1.8 and 2 volts) from 2 volts to 1 volt followed by increasing from 1 volt to 2 volts. Ans. 5. Appellant argues, and we agree, that “the voltages between L2 and L1 in Choi discussed by the Examiner in the Answer are voltages between voltage levels of the pulse of Choi, and are not the voltage levels of the pulse.” Reply Br. 3. We agree with Appellant that the “pulse of Choi reaches only a high voltage level, the intermediate voltage level at L2, and the low voltage level at L1.” Id. To interpret the increasing or decreasing voltages within each level as constituting levels themselves would ignore the meaning of the term level. Appeal 2020-001846 Application 15/458,832 8 Accordingly, we are constrained by the record to reverse the Examiner’s rejections of claim 1 and for the same reasons the rejections of claims 2–13 and 15–18 because the additional cited references do not cure the deficiencies discussed above. Claim 19 Appellant argues that claim 19 also recites the same disputed limitation as discussed above with respect to claim 1. Appeal Br. 10–11. The Examiner relies on the same findings as those with respect to claim 1. Ans. 7. Accordingly, we also reverse the Examiner’s rejection of claim 19 for the same reasons. CONCLUSION The Examiner’s decision to reject claims 1–13 and 15–19 is REVERSED. Appeal 2020-001846 Application 15/458,832 9 DECISION SUMMARY In summary: Claims Rejected 35 U.S. C. § Reference (s)/Basis Affirmed Reversed 1–13, 15– 18 103 Sung, Buckley, Choi, Shieh, Yamada 1–13, 15–18 19 103 Sung, Buckley, Choi 19 Overall Outcome 1–13, 15–19 REVERSED