Ex Parte Sundaram et al

Patent Trial and Appeal Board

Dec 3, 2012

11644474 (P.T.A.B. Dec. 3, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/644,474 12/21/2006 Rajesh Sundaram P25071 6558
45209 7590 12/03/2012
Mission/BSTZ
BLAKELY SOKOLOFF TAYLOR & ZAFMAN
1279 Oakmead Parkway
Sunnyvale, CA 94085-4040
EXAMINER
WONG, TITUS
ART UNIT PAPER NUMBER
2184
MAIL DATE DELIVERY MODE
12/03/2012 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD

____________

Ex parte RAJESH SUNDARAM, RODNEY R. ROZMAN, and
SANJAY S. TALREJA
____________

Appeal 2011-006211
Application 11/644,474
Technology Center 2100
____________

Before JAMES R. HUGHES, ERIC S. FRAHM, and
GREGORY J. GONSALVES, Administrative Patent Judges.

GONSALVES, Administrative Patent Judge.

DECISION ON APPEAL

Appeal 2011-006211
Application 11/644,474

2
STATEMENT OF THE CASE
Appellants appeal under 35 U.S.C. § 134(a) from the final rejection of
claims 1-4 and 7-14 (App. Br. 3). We have jurisdiction under 35 U.S.C.
§ 6(b).
We affirm.
The Invention
Exemplary Claim 1 follows:
1. An apparatus, comprising:

a first non-volatile memory device having a set of
input/output signal (I/O) pins and a control signal pin to
connect to a bus to receive data, the first non-volatile
memory device to

in response to an asserted signal on the
control pin, transition from a non-operational low
power mode to an operational mode,

in response to transitioning to the
operational mode, determine whether data included
on the I/O signal pins identifies the first non-
volatile memory device,

in response to determining the data included
on the I/O signal pins does not identify the first
non-volatile memory device, return to the non-
operational low power mode upon deassertion of
the signal on the control pin, and

in response to determining the data included
on the I/O signal pins does identify the first non-
volatile memory device, perform an operation
indicated by the data included on the I/O signal
pins,
Appeal 2011-006211
Application 11/644,474

3
the data received by the first non-volatile memory
device from the bus to be received by a second non-
volatile memory device, the second non-volatile memory
device separately selectable from the first non-volatile
memory device.

Claims 1, 2, 4, and 7-14 stand rejected under 35 U.S.C. § 102(b) as
being anticipated by Estakhri (U.S. Patent No. 5,818,350) (Ans. 3-6).
Claim 3 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Estakhri in view of Higuchi (U.S. Patent Pub. No.
2002/0120820 A1) (Ans. 6-7).

FACTUAL FINDINGS
We adopt the Examiner’s factual findings as set forth in the Answer
(Ans. 3, et seq.).

ISSUE
Appellants’ responses to the Examiner’s positions present the
following issue:
Did the Examiner err in finding that Estakhri discloses that a first
non-volatile memory device, “in response to determining the data included
on the I/O signal pins does not identify the first non-volatile memory device,
return to the non-operational low power mode upon deassertion of the
signal on the control pin,” (emphasis added) as recited in independent claim
1 and as similarly recited in independent claims 7 and 12?
Appeal 2011-006211
Application 11/644,474

4

ANALYSIS
Appellants contend that claims 1, 7, and 12 are not anticipated
because Estakhri does not disclose the claim element emphasized above
(App. Br. 9). In support of their contention, Appellants argue that Estakhri
does not disclose “a mode of operation, but merely an instance when a
device may happen to meet the conditions of not operating and not
consuming as much power as another device” (id. at 10). In addition,
“Appellants point out that just because a device is not operating on a task
does not necessarily mean that it is in a ‘low power state’ as speculated by
the Examiner” (id. at 12).
But we conclude that the disputed limitation of returning a memory
device to a non-operational low power mode when the input data does not
identify the memory device is a statement of intended use or purpose
regarding the recited memory device in independent apparatus claim 1 and
system claim 12. “An ] intended use or purpose usually will not limit the
scope of the claim because such statements usually do no more than define a
context in which the invention operates.” Boehringer Ingelheim Vetmedica,
Inc. v. Schering-Plough Corp., 320 F.3d 1339, 1345 (Fed.Cir. 2003). Here,
the disputed functional limitations are not positively recited as actually being
performed (see claims 1 and 12).
Even if we arguendo accord the disputed limitation weight in claims 1
and 12, we nevertheless conclude that the Examiner did not err in rejecting
claims 1 and 12 as anticipated because we agree with the Examiner that
Estakhri discloses the disputed limitation. We also conclude that the
Examiner did not err in rejecting independent method claim 7 for the same
Appeal 2011-006211
Application 11/644,474

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reason. In particular, Estakhri discloses that only the memory device having
an identifier that matches the identifier placed onto a data bus becomes
operational:
To select a particular device, the controller first places the
appropriate predetermined value onto the data bus. In each of
the memory devices 160-164, that value is compared to the
value stored in the respective registers 170-174 in the
comparators 180-184. For the desired memory device, the
output of the comparator will be a logical ‘1’. Then the
controller 150 provides a chip select signal 300 to all the flip
flops 190-194. Only the flip flop 190-194 in the desired
memory device 160-164 when the output of the appropriate
comparator 180-184 is high will be able to provide a chip select
signal to its respective memory device 160-164.
(Estakhri, col. 5, ll. 5-16 (emphasis omitted)). That is, the memory devices
that do not match the identifier on the data bus will not be selected to be
operational. Accordingly, we will sustain the Examiner’s rejection of
independent claim 1, 7, and 12 as well as the claims dependent therefrom
because Appellants did not set forth any separate patentability arguments for
the dependent claims (see App. Br. 13-14). See 37 C.F.R. § 41.37(c)(1)(iv).

DECISION
We affirm the Examiner’s decision rejecting claims 1, 2, 4, and 7-14
as being anticipated under 35 U.S.C. § 102(b) and claim 3 as being
unpatentable under 35 U.S.C. § 103(a).
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED
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