Ex Parte Stott et al

Patent Trial and Appeal BoardMar 5, 2019

15250685 (P.T.A.B. Mar. 5, 2019)

UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE FIRST NAMED INVENTOR 15/250,685 08/29/2016 Bret G. Stott 44429 7590 03/07/2019 Peninsula Patent Group 5061 Crail Way El Dorado Hills, CA 95762 UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. RBS2.P053C2 5308 EXAMINER HAILEGIORGIS, FITWI Y ART UNIT PAPER NUMBER 2632 NOTIFICATION DATE DELIVERY MODE 03/07/2019 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): lkreisman@peninsulaiplaw.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte BRET G. STOTT, CRAIGE. HAMPEL, and FREDERICK A. WARE Appeal2018-006582 1 Application 15/250,685 Technology Center 2600 Before ELENI MANTIS MERCADER, NORMAN H. BEAMER, and ADAM J. PYONIN, Administrative Patent Judges. PYONIN, Administrative Patent Judge. DECISION ON APPEAL This is a decision on appeal under 35 U.S.C. Â§ 134(a) from the Examiner's Final Rejection of claims 2-21. App. Br. 3. We have jurisdiction under 35 U.S.C. Â§ 6(b). We affirm. 1 Rambus, Inc. is identified as the real party in interest. App. Br. 3. Appeal2018-006582 Application 15/250,685 STATEMENT OF THE CASE Appellants' disclosure relates to a "signaling system that adaptively compensates for phase errors between data signals and corresponding sample-timing signals." Spec. ,r 6. Claims 2, 9, and 16 are independent; claim 2 is reproduced below for reference (with emphasis added): 2. An integrated circuit (IC) memory controller, comprising: a timing signal pin to receive a timing signal; a first data pin to receive first data and having first sampling circuitry; a second data pin to receive second data and having second sampling circuitry; a timing controller coupled to the timing signal pin, the first data pin and the second data pin, the timing controller operative during a runtime operation mode to detect a first phase difference between a phase of the timing signal and a phase of the first data, and adjust the phase of the first data to a first calibrated phase based on the first phase difference, and detect a second phase difference between the phase of the timing signal and a phase of the second data, and adjust the phase of the second data to a second calibrated phase based on the second phase difference; the timing controller to detect the first phase difference and the second phase difference in a sequence; wherein the first sampling circuitry samples the first data based on the first calibrated phase; and wherein the second sampling circuitry samples the second data based on the second calibrated phase. The Examiner's Rejection Claims 2-21 stand rejected under 35 U.S.C. Â§ I03(a) as being unpatentable over Lee (US 2004/0187046 Al; Sept. 23, 2004) and Jakobs (US 2005/0094462 Al; May 5, 2005). Final Act. 3. 2 Appeal2018-006582 Application 15/250,685 ANALYSIS We have reviewed the Examiner's rejection in light of Appellants' arguments. We have considered in this Decision only those arguments Appellants actually raised in the Briefs. Any other arguments Appellants could have made but chose not to make are deemed waived. See 37 C.F.R. Â§ 4I.37(c)(l)(iv). We are not persuaded the Examiner erred; we adopt the Examiner's findings and conclusions as our own, and we add the following for emphasis. Appellants argue the Examiner erred in finding that claim 2' s "'run- time mode' may be interpreted, under the broadest reasonable interpretation standard, to include initialization or start-up circuitry and/or procedures" because "Applicant's specification contrasts the difference between run- time' and 'initial synchronization['] or 'initialization."' App. Br. 13 (citing Spec. ,r 53). Appellants contend the Examiner has failed to "provide 'an interpretation that corresponds with what and how the inventor describes [the] invention in the specification."' App. Br. 14, quoting In re Smith International, Inc., 871 F.3d 1375, 1383 (Fed. Cir. 2017). We are not persuaded of error. The Examiner finds, and we agree, that "Lee teaches the "run-time" mode of operation, even though Lee did not explicitly mention the term 'run-time' mode of operation," as "Lee teaches continuous calibration data paths which Examiner interpreted as the run-time mode of operation." Ans. 10, citing Lee ,r,r 5, 38, 40, 54; see also In re Gleave, 560 F.3d 1331, 1334 (Fed. Cir. 2009) ("the reference need not satisfy an ipsissimis verbis test"). We also agree that "when a device 'starts- up' or 'reset', the device is 'running,"' within the meaning of the claims. Ans. 10. That is, the particularly claimed "mode" is taught or suggested by Lee's mode of operation in which calibration occurs. See Final Act. 2-3. 3 Appeal2018-006582 Application 15/250,685 We are not persuaded that the Examiner's interpretation of the claimed "runtime operation mode" is in conflict with the claimed usage of "runtime" ( or run-time) in light of the disclosure. The disclosure fails to provide a definition for run-time mode; however, the disclosure discusses different modes of operation in which the calibration mode is different from the conventional operating mode: Accordingly, the memory controller may read the non- volatile storage device to determine whether the memory subsystem or some subset of the memory devices therein include circuitry to support adaptive timing calibration and, if so, operate the memory system in an adaptive timing calibration mode instead of a conventional operating mode. Spec. ,r 45 ( emphasis added); see also Advisory Act. 2. Based on the record before us, we disagree with Appellants' argument that [a]s those skilled in the art understand, an initialization, start-up or reset procedure for a memory device involves setting key parameters to an "initial" value. Those initial values are generally determined, and stored in registers, during calibration operations carried out prior to run-time operation. Reply. Br. 6 (emphasis added). Rather, we agree with the Examiner that those skilled in the art recognize that "run-time" is a broad term that includes the execution operations taught by the cited references. See Ans. 10-11. Further, Appellants have not persuasively shown the Examiner errs in finding one of ordinary skill would modify Lee's teachings to "detect[] a first phase difference between a phase of the timing signal and a phase of the first data and similarly detect[] a second phase difference between the phase of the timing signal and the phase of the second data, as taught by Jakobs." Final Act. 8; Jakobs ,r 64, claim 1; see also In re Keller, 642 F.2d 413,425 4 Appeal2018-006582 Application 15/250,685 ( CCP A 19 81) ("The test for obviousness is not ... that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art.") Accordingly, we affirm the Examiner's rejection of independent claim 2, and independent claims 9 and 16 commensurate in scope and not argued separately, as well as all dependent claims. See App. Br. 15. DECISION The Examiner's decision rejecting claims 2-21 under 35 U.S.C. Â§ 103(a) is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. Â§ 1.136(a)(l)(iv). See 37 C.F.R. Â§ 41.50(Â±). AFFIRMED 5