Ex Parte Smith et al

Patent Trial and Appeal Board

Dec 26, 2012

10787624 (P.T.A.B. Dec. 26, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
10/787,624 02/26/2004 Carey W. Smith ITL.1098US (P18493) 5019
21906 7590 12/26/2012
TROP, PRUNER & HU, P.C.
1616 S. VOSS ROAD, SUITE 750
HOUSTON, TX 77057-2631
EXAMINER
MANOSKEY, JOSEPH D
ART UNIT PAPER NUMBER
2113
MAIL DATE DELIVERY MODE
12/26/2012 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________________

Ex parte CAREY W. SMITH and DAVID HINES
____________________

Appeal 2010-007610
Application 10/787,624
Technology Center 2100
____________________

Before CARL W. WHITEHEAD, JR., ERIC S. FRAHM, and
ANDREW J. DILLON, Administrative Patent Judges.

FRAHM, Administrative Patent Judge.

DECISION ON APPEAL

Appeal 2010-007610
Application 10/787,624

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STATEMENT OF CASE
Introduction
Appellants appeal under 35 U.S.C. § 134(a) from a final rejection of
claims 10, 14, 17-19, and 25. Claims 1-9, 11-13, 15, 16, 20-24, and 26-40
have been cancelled (App. Br. 5). We have jurisdiction under 35 U.S.C.
§ 6(b).
We affirm.
Exemplary Claim
Exemplary independent claim 10 under appeal, with emphasis added
to the disputed portion of the claim, reads as follows:
10. An article comprising a medium storing instructions that, if
executed, enable a processor-based system to:

obtain information from the processor-based system having a
processor that executes an operating system using a first thread by operating,
using said processor, a second thread that is independent of said first thread
to collect the information; and

report, from said second thread, said information over a network
while said operating system is non-functional.

Examiner’s Rejection
The Examiner rejected claims 10, 14, 17-19, and 25 as being
unpatentable under 35 U.S.C. § 103(a) over the combination of Baker (US
2004/0264285 A1), Jadon (US 7,293,197 B2), and Aguilar, Jr. (US
7,146,529 B2).1 Ans. 3-7.

1 Separate patentability is not argued for claims 14, 17-19, and 25 (see App.
Br. 10; Reply Br. 1-2). We select claim 10 as representative of the group of
claims rejected under § 103(a) (claims 10, 14, 17-19, and 25), pursuant to
our authority under 37 C.F.R. § 41.37(c)(1)(vii). See In re McDaniel, 293
F.3d 1379, 1383 (Fed. Cir. 2002) (“If the brief fails to meet either
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Appellants’ Contentions
With regard to claim 10, the only claim argued by Appellants,
Appellants argue the following:
(1) that none of the references teach “the concept of a second thread
that reports the fact that a first thread is non-functional over a network”
(App. Br. 10);
(2) Aguilar does not report failure of the first thread over the network,
but instead, stores operational data in a storage area for future analysis (App.
Br. 10);
(3) Aguilar, while teaching one thread monitoring another for failure,
does not teach the data from the monitoring thread is not [sent over a
network] (Reply Br. 1);
(4) Jadon does not use two different threads on the same system
(Reply Br. 1);
(5) Jadon teaches sending info from NVRAM of the good system that
is still functioning... or, i.e., Jadon does not send information from the failed
system to the network (Reply. Br. 2); and
(6) Aguilar and Jadon, if combined, do not teach offloading
information from the failed system to a separate operational system (Reply.
Br. 2).

requirement [of 37 CFR § 1.192(c)(7)], the Board is free to select a single
claim from each group of claims subject to a common ground of rejection as
representative of all claims in that group and to decide the appeal of that
rejection based solely on the selected representative claim.”). Accordingly,
our analysis herein will only address claim 10.

Appeal 2010-007610
Application 10/787,624

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Issue on Appeal
Based on Appellants’ arguments in the briefs (App. Br. 10; Reply Br.
1-2), the following issue presents itself:
Did the Examiner err in rejecting claims 10, 14, 17-19, and 25 as
being obvious because the combination of Baker, Jadon, and Aguilar, Jr.
fails to teach or suggest the limitations at issue in independent claims 10 and
19 of instructions that enable a processor to “report, from said second thread,
said information over a network while the operating system is non-
functional” (claims 10 and 19)?

ANALYSIS
We have reviewed the Examiner’s rejections in light of Appellants’
contentions in the Appeal Brief (App. Br. 10) and the Reply Brief (Reply Br.
1-2) that the Examiner has erred. We disagree with Appellants’ conclusions.
We concur with the conclusions reached by the Examiner, and we adopt as
our own (1) the findings and reasons set forth by the Examiner in the action
from which this appeal is taken, and (2) the reasons set forth by the
Examiner in the Examiner’s Answer in response to Appellants’ Appeal Brief
(Ans. 3-8). We highlight and amplify certain teachings and suggestions of
Jadon and Aguilar, Jr. as follows.
We agree with the Examiner’s findings with respect to the individual
references (see Ans. 3-8), and with the Examiner’s determination that it
would have been obvious to combine the references based on the rationale
set forth by the Examiner (Ans. 4-5 and 7). We note that each reference
cited by the Examiner must be read, not in isolation, but for what it fairly
teaches in combination with the prior art as a whole. See In re Merck & Co.,
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800 F.2d 1091, 1097 (Fed. Cir. 1986) (one cannot show non-obviousness by
attacking references individually where the rejections are based on
combinations of references).
Appellants make arguments with regard to claim 10 (App. Br. 10)
concerning the individual shortcomings in the teachings of each of the
applied references to Jadon and Aguilar, Jr. We have carefully reviewed
these arguments, however, and they are not convincing of the non-
obviousness of the claimed invention set forth in independent claims 10 and
19. For example, Appellants criticize Aguilar, Jr. for not teaching or
suggesting reporting a failure of a first thread over a network, and instead
teaching (col. 2, ll. 27-31) storing operational data in a storage area for
future analysis, when the Examiner has relied upon Jadon to teach or suggest
this feature (Ans. 4). Furthermore, Appellants criticize Jadon for not
teaching or suggesting two separate systems or two different threads that run
on the same system (Fig. 4), when the Examiner has relied upon Aguilar, Jr.
as teaching two different threads (a service thread and an operational thread)
where the operational thread is terminated while the operating system is non-
functional (Ans. 4). However, one cannot show non-obviousness by
attacking references individually when the rejection is based on a
combination of references. Merck, 800 F.2d at 1097.
We will sustain the rejection of claims 10, 14, 17-19, and 25 under §
103(a) over Baker, Jadon, and Aguilar for the following reasons:
First, Jadon and Aguilar teach “report, from said second thread, said
information over a network while said operating system is non-functional,”
as recited in claim 10, since Jadon teaches sending the information from the
failed server’s processor over a network (Jadon, col. 4, ll. 25-37; see Ans. 4
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and 8), and Aguilar teaches a service thread, which monitor the operational
thread that runs the operating system, operates even when the operating
system is not functioning (Aguilar, col. 1, ll. 55-64; see Ans. 4 and 8).
Second, claims 10 and 19 do not require reporting that a first thread is
non-functional, reporting to a separate operational system, or sending
information from the failed system. Claims 10 and 19 merely recite (i) first
and second threads, which is taught by Aguilar, Jr. (col. 1, ll. 57-64), and (ii)
reporting over a network while the operating system is non-functional,
which is disclosed by Jadon as storing data from fail-over memory controller
302 to a remote server system 350 through a network interface 313 and
network device/controller 312 when a host computer 301 fails and power is
lost (Fig. 4; col. 4, ll. 25-37).
Third, the arguments in the briefs (App. Br. 10; Reply Br. 1-2) attack
the references individually as opposed to appreciating the teachings as
combined.
In view of the foregoing, we conclude that the inventions recited in
claims 10, 14, 17-19, and 25 have not been shown to be patentably
distinguishable from the combined teachings of the applied prior art.

CONCLUSIONS
(1) The Examiner has not erred in determining that the combination
of Baker, Jadon, and Aguilar, Jr. teaches or suggests the article for storing
instructions and system including instructions that enable a processor to
“report, from said second thread, said information over a network while the
operating system is non-functional”, as set forth in claims 10 and 19.
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(2) The Examiner has not erred in rejecting claims 10, 14, 17-19, and
25 as being unpatentable under 35 U.S.C. § 103(a).

DECISION
The Examiner’s rejection of claims 10, 14, 17-19, and 25 under
35 U.S.C. § 103(a) is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

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