Ex Parte Schmit et al

Patent Trial and Appeal BoardFeb 26, 2019

13905770 (P.T.A.B. Feb. 26, 2019)

UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 13/905,770 05/30/2013 25310 7590 02/28/2019 VOLPE AND KOENIG, P.C. DEPT. AMD 30 SOUTH 17TH STREET-18TH FLOOR PHILADELPHIA, PA 19103 FIRST NAMED INVENTOR Michael L. Schmit UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. AMD-120878-US-NP 6107 EXAMINER OWENS, TSION B ART UNIT PAPER NUMBER 2487 NOTIFICATION DATE DELIVERY MODE 02/28/2019 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): eoffice@volpe-koenig.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte MICHAEL L. SCHMIT, RADHAKRISHNA GIDUTHURI, RAJY MEEY AKHAN RA WTHER, VICKY W. TSANG, and PAS SANT KAR UN ARA TNE Appeal2017-004086 Application 13/905,770 Technology Center 2400 Before DENISE M. POTHIER, JOHN D. HAMANN, and JASON M. REPKO, Administrative Patent Judges. POTHIER, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Appellants 1,2 appeal under 35 U.S.C. Â§ 134(a) from the Examiner's rejection of all pending claims 1, 4--8, 11-16, 18, and 20. Br. 3-8. An oral hearing was conducted on February 13, 2019. A transcript will be made of record in due course. 1 Throughout this opinion, we refer to the Final Action (Final Act.) mailed February 2, 2016, the Appeal Brief (Br.) filed August 22, 2016, and the Examiner's Answer (Ans.) mailed November 16, 2016. No Reply Brief was filed. 2 Appellants identify the real party in interest as Advanced Micro Devices, Inc. Br. 3. Appeal2017-004086 Application 13/905,770 We have jurisdiction under 35 U.S.C. Â§ 6(b). We reverse. We present a new ground of rejection. Invention Appellants' invention relates to video processing systems that selectively allocate computing resources ( e.g., CPU or GPU) to encode frames. Spec. ,r,r 6, 8. Different frame types ( e.g., I frame, P frame, and B frame) exist during processing, and the computing resources encode the frames based on the frame's type and the frame's referential relationship to other frames. Spec. ,r,r 6, 12, 30. For example, a CPU encodes I and P frames, and the P frames are encoded with one previous I or P frame as a reference. Spec. ,r,r 6, 8, 12, 32. Independent claim 1 exemplifies the claims at issue and reads as follows: 1. A method of encoding video comprising a plurality of frames, the method comprising: using a plurality of computing resources for encoding for various types of frames of the video where the frames are categorized based on a frame's referential relationship to other frames of the video and the frames are encoded based [on] frame type, wherein the types of frames include I frames that are intra-frame encoded with no other frames as a reference, P frames encoded with one previous I or P frame as a reference and B frames encoded with one previous and one future frame as references, wherein one or more central processing units (CPUs) perform encoding of I frames and P frames and a graphics processing unit (GPU) performs encoding of B frames. The Examiner relies on the following as evidence of unpatentability: Shen '617 US 2004/0190617 Al Sept. 30, 2004 2 Appeal2017-004086 Application 13/905,770 Shen '708 Casula Lewis US 2006/0056708 Al US 2013/0022102 Al US 8,542,732 B 1 The Re} ections3 Mar. 16, 2006 Jan.24,2013 Sept. 24, 2013 Claims 1, 6, 8, 12, and 16 are rejected under 35 U.S.C. Â§ I03(a) as unpatentable over Shen '708 and Shen '617. Final Act. 2--4. Claims 4, 5, 11, 13, and 20 are rejected under 35 U.S.C. Â§ I03(a) as unpatentable over Shen '708, Shen '617, and Lewis. Final Act. 4--5. Claims 7 and 15 are rejected under 35 U.S.C. Â§ I03(a) as unpatentable over Shen '708, Shen '617, Lewis, and Casula. Final Act. 5---6. THE OBVIOUSNESS REJECTION OVER SHEN '708 AND SHEN '617 Regarding independent claim 1, the Examiner finds that Shen '708 teaches claim 1 's first step of using computing resources to encode frame types, the frames being categorized based on the frame's referential relationship to other video frames. Final Act. 2-3 ( citing Shen '708 ,r,r 31, 39). The Examiner turns to Shen '617 in combination with Shen '708 to teach (1) the frame types are I, P, and B frames as recited and (2) a CPU encodes I and P frames and a GPU encodes B frames. Final Act. 3 ( citing Shen '617 ,r,r 14, 16-17, 36-37, 41--42). Among other arguments, Appellants assert Shen '617 relates to accelerating video decoding and is silent on "any video encoding operation." Br. 12; see also id. at 11-12 (citing Shen '617 i-fi-f 16-17, 36--42 and reproducing Shen '617, Fig. 3). 3 As discussed below, dependent claims 14 and 18 have not been rejected. 3 Appeal2017-004086 Application 13/905,770 ISSUE Has the Examiner erred in rejecting claim 1 under Â§ 103 as proposed? ANALYSIS Based on the record before us, we find error in the Examiner's rejection of independent claim 1. The Examiner relies on both Shen '708 and Shen '617 to teach encoding the specifically recited I, P, and B frames. Final Act. 2-3. Shen '708 teaches encoding all video frames, regardless of their type, by performing motion compensation (e.g., 204), discrete cosine transform (DCT) and quantization ( e.g., 206, 210), and variable length encoding (e.g., 208) using a CPU (e.g., 102) and motion estimation (e.g., 222,224) using a GPU (e.g., 121). See Shen '708 ,r,r 31, 39, cited in Final Act. 3; see also id., Fig. 2. But, the Examiner has not relied upon Shen '708 to teach or suggest the recited "one or more central processing units (CPUs) perform encoding of I frames and P frames and a graphics processing unit (GPU) performs encoding of B frames" in claim 1. Rather, the Examiner relies on Shen '617. See Final Act. 3 (stating "Shen ['708] doesn't explicitly disclose ... one or more central processing units (CPUs) perform encoding of I frames and P frames and a graphics processing unit (GPU) performs encoding of B frames."). Turning to Shen '61 7, this reference teaches decoding a video stream using both a CPU and GPU, where the CPU decodes each macro block ( e.g., step 306), which includes decoding all frames, and the GPU performs motion compensation processing on both P frames and B frames ( e.g., step 314) to accelerate video decoding. Shen '617 i-fi-f 9, 17, 37, 41--42, Fig. 3, cited in part in Final Act. 3. Appellants stress that Shen '617 relates to 4 Appeal2017-004086 Application 13/905,770 accelerating video decoding, not encoding as recited. Br. 11-12 (citing Shen '617, Fig. 3). Given the record before us, we are persuaded. In response to Appellants' argument that Shen '61 7 teaches decoding and not the recited encoding, the Examiner provides little explanation. See Ans. 7-8. The Examiner states Shen '617 teaches a CPU "encoding/decoding I frame[s] and P frame[s] where the CPU identif1ies] an encoded frame in the received encoded video bitstream" and a GPU "encoding/decoding wherein [the] GPU received data is associated with a P- frame or B-frame," and the "video decoding application directs [the] GPU to perform motion compensation processing." Ans. 8 (emphases added). Shen '617, however, focuses on accelerating a video decoding process, not video encoding, using a GPU. See Shen '617, Title. The "encoding/decoding" statement may be an attempt by the Examiner to imply that one skilled in the art would have understood encoding and decoding in Shen '617 behave in a mirror fashion, such that Shen '617's encoding process, including the CPU or the GPU performing specific encoding tasks (e.g., the GPU performing motion compensation on P and B frames) are the reverse of Shen '61 7' s decoding process. See Ans. 8. Yet, we find insufficient explanation or evidence to support the Examiner's position. See Final Act. 2-3; see also Ans. 7-8. Moreover, we are largely speculating as to the underlying meaning of the phrase "encoding/decoding" in the Examiner's Answer. Ans. 8. Based on the record, we are constrained to conclude the Examiner has not established a prima facie case of obviousness. For the foregoing reasons, Appellants have persuaded us of error in the rejection of (1) independent claim 1, (2) independent claims 8 and 16, which recite 5 Appeal2017-004086 Application 13/905,770 commensurate limitations, and (3) dependent claims 6 and 12 for similar reasons. THE REMAINING OBVIOUSNESS REJECTIONS Claims 4, 5, 11, 13, and 20 are rejected under 35 U.S.C. Â§ 103(a) as unpatentable over Shen '708, Shen '617, and Lewis. Final Act. 4--5. Claims 7 and 15 are rejected under 35 U.S.C. Â§ 103(a) as unpatentable over Shen '708, Shen '617, Lewis, and Casula. Id. at 5---6. The Examiner has not relied upon Lewis or Casula to teach or suggest the above-noted missing features. See id. at 4---6. For reasons previously presented, Appellants have persuaded us of error in the rejections of claims 4, 5, 7, 11, 13, 15, and 20. DEPENDENT CLAIMS 14 AND 18 Although claims 14 and 18 are listed as rejected in the Final Action (Final Act. 1, Box 7), claims 14 and 18 have not been addressed in any rejection (see id. at 2---6). Also, claim 20 has been rejected based on Shen '708, Shen '617, and Lewis (id. at 4--5) even though claim 18, from which claim 20 depends, is not rejected. We further note claim 18 depends from canceled claim 17 (Appeal Br. 20 (Claims App'x); see also Response Pursuant to 37 C.F.R. Â§ 1.111, p. 8, filed December 21, 2015) even though Appellants indicate this claim depends from claim 16 (Br. 8). If prosecution continues, these irregularities should be corrected where appropriate. 6 Appeal2017-004086 Application 13/905,770 NEW GROUND BASED ON SHEN '708 AND SHEN '617 Claims 1, 8, and 16 are newly rejected under 35 U.S.C. Â§ 103 based on Shen '708 and Shen '617. Shen '708 describes Figure 2 as a "process for encoding video signals into digital video data" by employing a CPU and GPU. Shen '708 ,r,r 7, 31, 38, Fig. 2. Specifically, Shen '708 encodes video frames (e.g., I-frames, P-frames, and B-frames) by performing motion compensation (e.g., 204), DCT and quantization (e.g., 206,210), and variable length encoding (e.g., 208) using a CPU (e.g., 102) and by performing motion estimation ( e.g., 222) using a GPU ( e.g., 121) to accelerate the video encoding process. See id. ,r,r 26, 31, 38--41, Fig. 2. Shen '708 also teaches or suggests each encoded video frame, such as video frame n in Figure 2, can be any of an I frame, a P frame, or a B frame. Id. ,r,r 31, 41, Fig. 2. Shen '708 thus teaches and suggests "[a] method of encoding video comprising a plurality of frames, the method comprising: using a plurality of computing resources" ( e.g., a CPU and a GPU) "for encoding various types of frames of the video" (i.e., I frames, P frames, and B frames) as claim 1 recites. Regarding the further limitation "wherein one or more central processing units (CPUs) perform encoding of I frames and P frames and a graphics processing unit (GPU) performs encoding of B frames," this limitation's breadth requires a CPU to perform encoding of I frames and P frames but does not exclude performing some parts of the encoding process on other frames (e.g., B frames); likewise, claim 1 's breadth requires a GPU to perform encoding of B frames but does not exclude it performing some parts of the encoding process on other frames (e.g., I frames and P frames). See Appeal Br. 15 (Claims App 'x). That is, claim 1 is not limited to its 7 Appeal2017-004086 Application 13/905,770 CPU ( s) performing the entire encoding process for the I frames and P frames and its GPU(s) performing the entire encoding process for B-frames. Id. This interpretation is also consistent with the Specification, which states "[ d]ifferent computing resources are used to partially or fully perform the encoding process of at least one type of frame than are used for at least one other type of frame." Spec. ,r 6 ( emphasis added). Thus, when interpreted in light of the Specification, claim 1 permits a computing resource (i.e., a CPU or GPU) to perform part of the encoding process on at least the specifically recited frame types (i.e., I frames, P frames, and B frames). Given this limitation's breadth in claim 1, Shen '708 teaches "one or more central processing units (CPUs) perform encoding of I frames and P frames and a graphics processing unit (GPU) performs encoding of B frames." That is, as noted above, Shen '708 teaches its CPU ( e.g., 102) performing part of the encoding process (e.g., steps 204,206,208,210) on all frames, including the recited I frames and P frames, and its GPU ( e.g., 121) performing part of the encoding process (e.g., step 222) on all frames, including the recited B frames. See Shen '708 ,r,r 26, 31, 38--41, Fig. 2. As such, Shen '708's CPU performs encoding on I frames and P frames and Shen '708's GPU performs encoding on B frames as broadly as recited. We therefore are not persuaded that Shen '708's GPU does not encode certain frame types or "the hybrid video encoder" (Br. 11) as argued. Id. at 9-11. As discussed above, Shen '708's GPU specifically performs motion estimation on frames. The Specification has not defined "encode" or "encoding," such that the recited "encoding" in claim 1 excludes motion estimation processing from being a form of encoding. See generally Spec. In fact, Shen '708 discloses the motion estimation process is part of the 8 Appeal2017-004086 Application 13/905,770 video encoding process. Shen '708 ,r,r 2, 7, 24, 26, Fig. 2. Also, a customary understanding of "encode" includes "to express a single character or a message in terms of a code" and "to represent data in symbolic form using a code or a coded character set such that reconversion to the original form is possible."4 The motion estimation process performed by Shen '708's GPU (e.g., step 222 in Figure 2) involves determining motion estimation data associated with a frame or expressing a frame symbolically as or using a code. Shen '708 ,r,r 39, 60, Fig. 2. We therefore determine Shen '708's GPU motion estimation processing involves "encoding" as claim 1 recites. Shen '708 even further teaches video frame n may be used as a reference frame for a subsequent B frame or P frame. Id. ,r 41. Shen '708 also teaches the video frames can be ( 1) an I frame, which stands for Intra frames, (2) a P frame, which stands for predicted frame, and (3) a B frame, which stands for bi-directional predicted frame. Id. ,r 31. These teachings at least suggest encoding of some of the frames are "based on a frame's referential relationship to other frames of the video and the frames are encoded based [on] frame type" as well as "P frames [are] encoded with one previous" frame "as a reference and B frames [are] encoded with one previous and one future frame as references" as claim 1 additionally recites. However, to extent the immediately above limitations are missing from Shen '708, Shen '617 teaches what is missing. Shen '617 explicitly teaches encoded I frames include all the data necessary to generate and render a complete image (i.e., "encoded with no other frames as a reference" 4 Encode, The Authoritative Dictionary of IEEE Standard Terms 379 (7th ed. 2000) (defs. 1 and 4). 9 Appeal2017-004086 Application 13/905,770 as recited), encoded P frames require data from a previous I frame or P frame, called a reference frame (i.e., "encoded with one previous I or P frame as a reference" as recited), and encoded B frames require data from both a previous reference I frame or P frame and a future reference I frame or P frame (i.e., "encoded with one previous and one future frame as references" as recited). Shen '617 ,r 16. Shen '617 illustrates that one skilled in the art knows to encode various frames "based on a frame's referential relationship to other frames of the video and the frames are encoded based [on] frame type" as recited in claim 1. When combining Shen '617 with Shen '708, the combination would predictably yield no more than "the types of frames include I frames that are intra-frame encoded with no other frames as a reference, P frames encoded with one previous I or P frame as a reference and B frames encoded with one previous and one future frame as references" as recited in claim 1. This combination also arranges known elements in Shen '708 and Shen '617 with the resulting CPU and GPU still performing their same encoding functions and yields no more than an ordinarily skilled artisan would expect from such an arrangement----encoding using both the CPU and GPU and encoding I frames with no other frames as a reference, encoding P frames with one previous I or P frame as a reference, and encoding B frames with one previous and one future frame as references as recited in claim 1. See KSR Int'! Co. v. Teleflex Inc., 550 U.S. 398, 416-17 (2007). Appellants assert that Shen '61 7 relates to accelerating video decoding, not encoding, and that Shen '617's GPU performs motion compensation on select frames. Br. 11-13 (citing Shen '617, Fig. 3). This argument is unavailing because, unlike the rejection proposed by the 10 Appeal2017-004086 Application 13/905,770 Examiner in the Final Action, the above rejection does not rely on Shen '617' s citations related to its decoding process. Regarding independent claim 8, Shen '708 discloses an apparatus ( e.g., 100) for encoding video comprising frames having many of its recited features as previously discussed. Shen '708 ,r,r 22-26, Figs. 1-2. Regarding claim 16, Shen '708 suggests a computer-readable storage medium having instruction for execution by a general purpose computer to manufacture an integrated chip. See Shen '708 ,r,r 24--26, 36. We refer above for more details regarding Shen '708 and Shen '617 as to claims 8 and 16 remaining recited features. We decline to reject every claim under our discretionary authority under 37 C.F.R. Â§ 4I.50(b), leaving the patentability determination of the remaining claims to the Examiner. Notably, no inference should be drawn from our failure to exercise our discretion with the remaining claims. See the Manual of Patent Examining Procedure (MPEP) Â§ 1213.02 (9th ed., Rev.08.2017, January 2018). DECISION We reverse the Examiner's rejections of claims 1, 4--8, 11-13, 15, 16, and 20 underÂ§ 103. Claims 14 and 18 were not rejected. We present a new ground of rejection for claims 1, 8, and 16. This decision contains a new ground of rejection pursuant to 37 C.F.R. Â§ 4I.50(b). Section 4I.50(b) provides "[a] new ground of rejection pursuant to this paragraph shall not be considered final for judicial review." Section 41. 5 O(b) also provides: 11 Appeal2017-004086 Application 13/905,770 When the Board enters such a non-final decision, the appellant, within two months from the date of the decision, must exercise one of the following two options with respect to the new ground of rejection to avoid termination of the appeal as to the rejected claims: ( 1) Reopen prosecution. Submit an appropriate amendment of the claims so rejected or new Evidence relating to the claims so rejected, or both, and have the matter reconsidered by the examiner, in which event the prosecution will be remanded to the examiner. The new ground of rejection is binding upon the examiner unless an amendment or new Evidence not previously of Record is made which, in the opinion of the examiner, overcomes the new ground of rejection designated in the decision. Should the examiner reject the claims, appellant may again appeal to the Board pursuant to this subpart. (2) Request rehearing. Request that the proceeding be reheard under Â§ 41.52 by the Board upon the same Record. The request for rehearing must address any new ground of rejection and state with particularity the points believed to have been misapprehended or overlooked in entering the new ground of rejection and also state all other grounds upon which rehearing is sought. Further guidance on responding to a new ground of rejection can be found in the MPEP Â§ 1214.01. REVERSED 37 C.F.R. Â§ 4I.50(b) 12