Ex Parte Riedlinger et al

Patent Trial and Appeal BoardNov 1, 2012

11593841 (P.T.A.B. Nov. 1, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ Ex parte REID J. RIEDLINGER, DOUGLAS JOHN CUTTER, and RICH MCGOWEN II ____________ Appeal 2010-005690 Application 11/593,841 Technology Center 2100 ____________ Before ST. JOHN COURTENAY III, CAROLYN D. THOMAS and CARL W. WHITEHEAD JR., Administrative Patent Judges. COURTENAY, Administrative Patent Judge. DECISION ON APPEAL Appeal 2010-005690 Application 11/593,841 2 STATEMENT OF THE CASE The Patent Examiner finally rejected claims 1-20. Appellants appeal therefrom under 35 U.S.C. § 134(a). We have jurisdiction under 35 U.S.C. § 6(b). We reverse. INVENTION Claim 1, reproduced below, is illustrative of the claimed subject matter: 1. A system for preventing processor errors, comprising: a processor core, the processor core configured to perform an architectural break in response to a detection of an event indicative of an imminent error in the processor core, the event being associated with a processing bug that effectuates the imminent error responsive to at least one predetermined operating point of the processor core; and a controller configured to adjust, in response to the detection, at least one of a clock signal and a power signal provided to the processor core during a time corresponding to the architectural break to prevent the processor core from exhibiting the at least one predetermined operating point such that the imminent error is prevented. (disputed limitations emphasized). REJECTIONS 1. Claims 1-4 and 13-15 stand rejected under 35 U.S.C. §103(a) as being unpatentable over the combination of McClendon (U.S. Pub. 2003/0074591 A1) and Kuramkote (U.S. Pub. 2006/0143515 A1). 2. Claims 5-7, 9-12, and 16-20 stand rejected under 35 U.S.C. 103(a) as being unpatentable over the combination of McClendon and Kuramkote, and Beebe (U.S. 6,101,610). 3. Claim 8 stands rejected under 35 U.S.C. 103(a) as being Appeal 2010-005690 Application 11/593,841 3 unpatentable over the combination of McClendon, Kuramkote, Beebe, and Lu (U.S. Pub. 2007/0005860 A1). CONTENTIONS Regarding claim 1, Appellants contend: With respect to [McClendon], and as articulated in the final Office Action, [McClendon] does not disclose an event associated with a processing bug, which effectuates an imminent error responsive to at least one predetermined operation point of the processor core. Further, [McClendon] does not involve performing an architectural break responsive to detection of such an event. With respect to Kuramkote, Kuramkote discloses the collection of information related to processing errors that have occurred. (App. Br. 5). Notably, the combination does not teach or suggest “a detection of an event indicative of an imminent error in the processor core, the event being associated with a processing bug.” (App. Br. 7). Regarding claim 13, Appellants contend: Notably, the combination does not teach or suggest “detecting an occurrence of an event … ”, “interrupting the executing in response to the detecting ... ”, and “adjusting, in response to the detecting . . . . ” (App. Br. 8). The Examiner disagrees: As disclose[d] in the general embodiment [McClendon] [¶0013- 0014] the system detects an issue (i.e. bug) with the system. In this case a fan or power supply failure which causes the system to overheat (i.e. event) and, as it is understood, will eventually cause the failure of the system. Appeal 2010-005690 Application 11/593,841 4 However, [McClendon] as noted does not disclose a processing bug. Kuramkote [¶0018-0019] teaches a system that includes architectural register and high level components that are able to determine processor errors (i.e. bugs) in the processing system. In this case as noted the error could be a bus interface error, and this error may be unarchitected, or implementation specific and the system is able determine the specific origin of the error. Furthermore, it is noted that an event is a sequential act based on a previous event, as stated the initial event (as proposed by claims “a bug”) causes the failure of a fan which in turn causes the CPU to overheat (as proposed by claims “an event”) which will eventually lead to the failure of the system (as proposed by claims “an imminent error”) it can be interpreted that a bug is a processing error that causes an element in the system to fail which will eventually lead to the failure of the whole system. Furthermore regarding appellant’s arguments that McClendon and Kuramkote fail to teach [“]detecting the occurrence of an event … ”, “interrupting the executing in response to the detecting ... ”, and “adjusting, in response to the detecting ... ” as stated in previous arguments [McClendon] clearly states the system detects the occurrence of an event and further proceeds to take action based on the event. Kuramkote teaches the procedure for error collecting and eventual handling of the error and performing updates or patches for upgrading the system [¶0053], it is further noted that claim 17 as argued by applicant is further rejected in view of BeeBe which defines a system which uses thermal sensors in the system to detect operation temperature and if a pre-selected trip point is reached indicating overheating maybe about to occur (See Abstract)[.] Thus, the methodology for detecting a processing error (bug) and the bug causing an event to occur which will eventually lead to a system failure and providing a system update to prevent the failure from occurring is clearly encompassed within [McClendon], Kuramkote and Beebe, such that [McClendon] is able to detect an error (albeit not processing error) and perform an action to prevent the system from failure, Kuramkote teaches that multiple types of error[s] can be detected such error can be processing errors and provide the Appeal 2010-005690 Application 11/593,841 5 system to perform an update “patch” in order to prevent the error from happening and Beebe which shows a system which uses thermal sensors in the system to detect operation temperature and if a pre-selected trip point is reached indicating overheating maybe about to occur and allows the administrator to perform an action in order to prevent the error from occurring. (Ans. 10-12). Appellants respond in the Reply Brief: As best understood, the Examiner’s argument rests on the contention that a processing bug (as recited in claim 1) can cause the failure of a fan (as disclosed in McClendon). However, none of the cited art (nor what would be well known to one of ordinary skill in the art) supports this argument. In claim 1, the event indicative of an imminent error in the processor core is associated with a processing bug. In contrast, Appellant’s representative respectfully submits that it is well known that fan failure, such as the fan failure disclosed in McClendon, is due to a mechanical failure (e.g., excessive dust in the fan, insulation breakdown, etc.). Nothing in McClendon teaches or suggests that a fan failure can occur as a result of a processing bug, in contrast to the event recited in claim 1. Moreover, the Examiner has failed to provide any other evidence that a processing bug can cause a fan failure. Appellant’s representative respectfully submits that in the absence of such evidence, a fan failure and a processing bug should be considered to be independent events that have no identifiable relationship. Accordingly, Appellant’s representative respectfully submits that the Examiner’s conclusion that a processing bug (as recited in claim 1) can cause the failure of a fan (as disclosed in McClendon) is outside the scope and content of the cited art, and therefore cannot be employed to sustain a legal conclusion of obviousness. Furthermore, Appellant’s representative respectfully submits that Kuramkote is limited to detecting hardware errors that have already occurred to determine a recovery action to be taken (See e.g., Kuramkote, Abstract). Accordingly, even if Appeal 2010-005690 Application 11/593,841 6 McClendon and Kuramkote were combined in the manner suggested by the Examiner, the resultant combination would only detect hardware errors that have already occurred, as disclosed by Kuramkote, and take the subsequent remedial measures disclosed in McClendon. In contrast, in claim 1, a controller adjusts (in response to detection of the event) at least one of a clock signal and a power signal provided to a processing core during a time corresponding to an architectural break to prevent the processing core from exhibiting at least one predetermined operating point such that the imminent error is prevented. That is, while claim 1 is directed to detecting potential imminent errors and preventing them, the purported combination of Kuramkote and McClendon would be limited to detecting an error that has already occurred and performing actions to remedy that error. Consequently, Appellant’s representative respectfully submits that the system recited in claim 1 is significantly outside the scope and content of McClendon taken in view of Kuramkote. Moreover, the Examiner has provided no evidence that the level of skill in the art would make up for these deficiencies of Kuramkote taken in view of McClendon. (Reply Br. 3-4, emphasis added). ANALYSIS Issue: Under § 103, did the Examiner err in finding that the cited references, either alone or in combination, would have taught or suggested a detection of an event indicative of an imminent error in the processor core, the event being associated with a processing bug that effectuates the imminent error, within the meaning of independent claim 1, and the commensurate language of independent claims 9, 13, and 17? For the reasons discussed below, we find the evidence supports Appellants’ position that “[n]otably, the combination [of McClendon and Kuramkote] does not teach or suggest ‘a detection of an event indicative of Appeal 2010-005690 Application 11/593,841 7 an imminent error in the processor core, the event being associated with a processing bug.’” (App. Br. 7, emphasis added). Notwithstanding the Examiner’s arguments to the contrary (Ans. 10- 12), we agree with Appellants that Kuramkote teaches detecting hardware “errors that have happened” (Kuramkote, para. [0023]) and is not directed to detection of an event indicative of an imminent error in the processor core, within the meaning of Appellants’ independent claims. (Reply Br. 4). We also agree with Appellants’ contention that “it is well known that fan failure, such as the fan failure disclosed in McClendon, is due to a mechanical failure (e.g., excessive dust in the fan, insulation breakdown, etc.). Nothing in McClendon teaches or suggests that a fan failure can occur as a result of a processing bug, in contrast to the event recited in claim 1.” (Reply. Br. 3). Therefore, on this record, we find the evidence supports the Appellants’ position regarding independent claims 1 and 13, and associated dependent claims 2-4, 14, and 15 that stand rejected over the combination of McClendon and Kuramkote. Accordingly, we reverse the first-stated rejection of claims 1-4 and 13-15 over McClendon and Kuramkote. Regarding the second-stated obviousness rejection (which relies on Beebe as a tertiary reference), we agree with the Examiner that “Beebe [] shows a system which uses thermal sensors in the system to detect operation temperature and if a pre-selected trip point is reached indicating overheating may be about to occur [Beebe] allows the administrator to perform an action in order to prevent the error from occurring.” (Ans. 12 ). In particular, we observe that Beebe teaches “the main processor board 12 may be placed in standby mode due to overheating” in response to Appeal 2010-005690 Application 11/593,841 8 thermal sensing “and the service processor 25 monitors the status and temperature of the main 25 processor 12 and reports it to the system administrator 18 during this standby mode.” (Beebe, col. 3, ll. 21-27). Although we agree that Beebe teaches or suggests detecting an event indicative of an imminent error in the processor core (i.e., an overheating thermal condition event in the main CPU housing – see abstract), we do not find, and the Examiner has not established, that Beebe teaches that the event (i.e., thermal overheating) is associated with a processing bug, which effectuates the imminent error, within the meaning of independent claims 9 and 17, and respective associated dependent claims. For essentially the same reasons argued by Appellants (App. Br. 5-7, 10; Reply Br. 3-4), we do not agree with the Examiner (Ans. 4, 11) that Kuramkote provides this teaching when incorporated in combination with McClendon and Beebe. As previously discussed above, we agree with Appellants that Kuramkote teaches detecting hardware “errors that have happened” (Kuramkote, para. [0023]; see also para. [0017]: “error collection routine 60 calls specialized modules 70 in response to hardware errors . . . .”). Nor does the Examiner establish that the Lu reference (relied upon in the rejection of dependent claim 8) overcomes the aforementioned deficiencies of the McClendon, Kuramkote, and Beebe references. (Ans. 10). On this record, for essentially the same reasons articulated by Appellants in the Briefs, as discussed above, we also reverse the Examiner’s second-stated obviousness rejection of claims 5-7, 9-12, and 16-20, and the third-stated obviousness rejection of dependent claim 8. Appeal 2010-005690 Application 11/593,841 9 DECISION The Examiner’s decision rejecting claims 1-20 under § 103(a) is reversed. REVERSED peb