Ex Parte Rajendran

Patent Trial and Appeal BoardNov 29, 2012

11255393 (P.T.A.B. Nov. 29, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 11/255,393 10/20/2005 Antonisamy Arokkia Rajendran IN920040031US1 (18753) 7215 7590 11/29/2012 Steven Fischman, Esq. Scully, Scott, Murphy & Presser 400 Garden City Plaza Garden City, NY 11530 EXAMINER TSENG, CHENG YUAN ART UNIT PAPER NUMBER 3992 MAIL DATE DELIVERY MODE 11/29/2012 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________________ Ex parte ANTONISAMY AROKKIA RAJENDRAN ____________________ Appeal 2010-005734 Application 11/255,393 Technology Center 3900 ____________________ Before MAHSHID D. SAADAT, DEBRA K. STEPHENS, and MICHAEL J. STRAUSS, Administrative Patent Judges. STRAUSS, Administrative Patent Judge. DECISION ON APPEAL Appeal 2010-005734 Application 11/255,393 2 STATEMENT OF CASE Appellant appeals under 35 U.S.C. § 134(a) from a final rejection of claims 1, 4-8, 10, 12-19, 21, and 23-27. Claims 2, 3, 9, 11, 20, and 22 are canceled. We have jurisdiction under 35 U.S.C. § 6(b). We reverse. The claims are directed to a method and system to allow logical partitions to access resources. Claim 1, reproduced below, is illustrative of the claimed subject matter: 1. A method of enabling a program running on a logical partition, of a logically partitioned data processing system, to directly access a group of resources in the data processing system, the data processing system including a hypervisor to manage access to said group of resources, and wherein a given address space is allocated to the logical partition, and each of the group of resources has a first, real address outside said given address space, the method comprising the steps of: for each of the group of resources, the hypervisor mapping the first, real address of the resource to a second, effective address for the resource in said given address space; the hypervisor sending to the logical partitions procedures for transforming the real addresses of the resources of the group of resources to the effective addresses for said resources; and said program, using one of the procedures from the hypervisor, transforming the first, real address of one of said resources to the second effective address for said one of the resources; and using said second, effective address to access directly said one of the resources without using the hypervisor. REFERENCES The prior art relied upon by the Examiner in rejecting the claims on appeal is: Appeal 2010-005734 Application 11/255,393 3 Errickson Tsujimura US 2005/0114555 A1 US 2005/0273546 A1 May 26, 2005 Dec. 8, 2005 REJECTION Claims 1, 4-8, 10, 12-19, 21, and 23-27 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Errickson and Tsujimura. Ans. 3. APPELLANT’S CONTENTION 1 Appellant contends that it would be improper to combine the pageable-storage mode of Errickson (disclosing hypervisor address translation and hypervisor intervention for all accesses to resources) with Errickson’s fixed-storage-mode (disclosing both address translation and access to resources without hypervisor involvement) because the modes are opposites and incompatible. Reply Br. 4. Therefore, Appellant contends the combination does not teach or suggest the invention. ISSUE Whether the combination of Errickson and Tsujimura fails to teach or suggest a hypervisor sending to logical partitions procedures for transforming real addresses of resources into the effective addresses for resources, a program running on the logical partition using one of the procedures from the hypervisor, transforming the first, real address of one of the resources to a second effective address for the resource and using the second, effective address to access directly one of the resources without using the hypervisor, as recited by claims 1, 10, 16, 21, and 25. 1 We note that Appellant’s arguments present additional issues; however, we do not reach these issues as this contention is dispositive of the appeal. Appeal 2010-005734 Application 11/255,393 4 ANALYSIS The Examiner rejects claims 1, 10, 16, 21, and 25, citing to Errickson for disclosing, inter alia, two disputed claim features: (i) using a hypervisor to send … procedures for transforming real addresses of resources into effective addresses; and (ii) a program using an effective address to directly access the resources without using the hypervisor. Ans. 5-6. In response, Appellant contends that the reference teaches using the hypervisor to access resources, citing to Errickson at para. [0125] disclosing that “when adapter resource 16 is intended to be used in association with I/O requests specifying absolute addresses, or in association with high-performance memory regions, all access to the adapter resources 16 have to be processed by the zVM hypervisor.” App. Br. 33. The Examiner responds that Appellant’s argument is only applicable to a “pageable-storage-mode guest program accesses adapter-resource” but that hypervisor involvement is not required wherein a “fixed-storage-mode guest program access adapter-resource controls that designate absolute addresses relative to the relocation zone of the guest, the operation can proceed without involvement of the hypervisor.” Ans. 12 (citing to Errickson para. [0124]) (emphasis omitted). Appellant replies that Errickson’s pageable-storage-mode and fixed- storage-mode are mutually exclusive and that it would therefore be improper to combine selective portions of each of the disclosed modes to achieve the claimed invention. App. Br. 3-4. In particular, according to Errickson, provision of address transformation procedures by the hypervisor as required by the claim feature (i) only occurs in those cases when the hypervisor is also involved in access to the resource (e.g., in the pageable-storage-mode.), Appeal 2010-005734 Application 11/255,393 5 However, involvement of the hypervisor in the pageable-storage-mode falls afoul of claim feature (ii) which requires no use of the hypervisor. Conversely, in the fixed-storage-mode wherein claim feature (ii) excluding hypervisor use is present, feature (i) requiring the hypervisor provide address transforming procedures is absent. Id. Asserting that the “two modes cannot be combined in a reasonable, ordinary manner,” and that the modes are exact opposites and “cannot be operated simultaneously” (App. Br. 4), Appellant concludes that it would be improper to combine the fixed-storage– mode and pageable-storage-mode of Errickson to achieve the claimed combination of disputed features (id.) In considering Appellant’s arguments and deciding the propriety of the combination, we find that the Examiner has neither addressed Appellant’s argument concerning combining features of the two modes to achieve the claimed combination of features nor provided articulated reasoning with rational underpinning to support a legal conclusion of obviousness based on the combination. Therefore, we conclude that the Examiner has not shown to be obvious the claimed combination hypervisor sending . . . procedures for transforming . . . real addresses of . . . resources . . . to the effective addresses . . . and [a] program, using one of the procedures from the hypervisor . . to access directly . . . one of the resources without using the hypervisor. We therefore will not sustain the rejection of claims 1, 10, 16, 21, or 25 and, for the same reason, and by way of dependency on respective ones of claims 1, 10, 16, 21, or 25, we do not sustain the rejection of the remaining dependent claims 4-8, 12-15, 17-19, 23, 24, 26, and 27. Appeal 2010-005734 Application 11/255,393 6 CONCLUSION Appellant has persuaded us of error in the Examiner's decision to reject independent claim 1 and, on similar grounds, independent claims 10, 16, 21, and 25. Thus, we will not sustain the Examiner's rejection of claims 1, 4-8, 10, 12-19, 21, and 23-27 under 35 U.S.C. § 103(a). ORDER The decision of the Examiner to reject claims 1, 4-8, 10, 12-19, 21, and 23-27 is reversed. REVERSED ELD