Ex Parte Purushothaman et alDownload PDFPatent Trial and Appeal BoardDec 9, 201412615175 (P.T.A.B. Dec. 9, 2014) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 12/615,175 11/09/2009 Sampath Purushothaman YOR920080504US2 (14-19-2) 1046 68397 7590 12/09/2014 THE LAW OFFICES OF ROBERT J. EICHELBURG HODAFEL BUILDING, SUITE 200 196 ACTON ROAD ANNAPOLIS, MD 21403 EXAMINER BRADFORD, PETER ART UNIT PAPER NUMBER 2897 MAIL DATE DELIVERY MODE 12/09/2014 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ Ex parte SAMPATH PURUSHOTHAMAN, MARY E. ROTHWELL, GHAVAM GHAVAMI SHAHIDI, and ROY RONGGING YU ____________ Appeal 2012-010834 Application 12/615,175 Technology Center 2800 ____________ Before JEFFREY T. SMITH, RICHARD M. LEBOVITZ, and N. WHITNEY WILSON Administrative Patent Judges. LEBOVITZ, Administrative Patent Judge. DECISION ON APPEAL This appeal involves claims to a structure comprising two device layers joined together to form an electronic system. The Examiner has rejected the claims as obvious under 35 U.S.C. § 103(a). We have jurisdiction under 35 U.S.C. § 6(b). The Examiner’s rejections are reversed. Appeal 2012-010834 Application 12/615,175 2 STATEMENT OF THE CASE Appellants appeal from the Examiner’s rejections of claims 20– 35. The claims stand rejected as follows: 1. Claims 20, 23, 24, 26, 28, 31, 32, and 24 under 35 U.S.C. § 103(a) as obvious in view of Morrow,1 Miyakawa,2 and Pogge ’690.3 Answer 3. 2. Claims 21, 22, 27, 29, 29, 30, and 35 under 35 U.S.C. § 103(a) as obvious in view of Morrow, Miyakawa, Pogge ’690, Kirby,4 and Pogge’959. 5 Answer 3. 3. Claims 25 and 33 under 35 U.S.C. § 103(a) as obvious in view of Morrow, Miyakawa, Pogge ’690, and Law.6 Answer 4. Claim 20 is the only independent claim on appeal. Claim 20 reads as follows (emphasis added to highlight the disputed limitation): 20. A structure comprising two device layers joined together to form an electronic system and further comprising: a first device layer disposed on a first substrate and comprising a first circuit layer and a first interconnection wiring layer; a second device layer disposed on a second substrate and comprising a second circuit layer and a second-interconnection wiring layer; said first and said second device layers further connected using two sets of via connections comprising a first via 1 Morrow, US 2007/0145601 A1, published Jun. 28, 2007. 2 Miyakawa et al., US 2009/0160050 A1, published Jun. 25, 2009. 3 Pogge et al., US 2006/0121690 A1 (hereinafter ’690), published Jun. 8, 2006. 4 Kirby et al., US 2006/0043598 A1, issued Mar. 2, 2006. 5 Pogge et al. US 7,344,959 B1 (hereinafter ’901), issued Mar. 18, 2008. 6 Law et al., US 2010/0225002 A1, published Sept. 9, 2010. Appeal 2012-010834 Application 12/615,175 3 connection that extends from the top surface of said first interconnection wiring layer of said first device layer to the top surface of said second interconnection wiring layer of said second device layer; and a second via connection that extends from said top surface of said first interconnection wiring layer of said first device layer through said second device layer, and connecting to a third set of connections comprising interconnection wires and input output terminals disposed on the back side of said second device layer. 1. OBVIOUSNESS IN VIEW OF MORROW, MIYAKAWA, AND POGGE Issue The Examiner found that Morrow describes a “structure comprising two device layers,” as recited in claim 20. Answer 6. The Examiner further found that Morrow describes a first via connection that “extends from the top surface of said first interconnection wiring layer of said first device layer to the top surface of said second interconnection wiring layer of said second device layer” and a second via connection that “extends from said top surface of said first interconnection wiring layer of said first device layer through said second device layer.” Id. The Examiner acknowledged that Morrow does not disclose “a third set of connections comprising interconnection wires and input output terminals disposed on the back side of said second device layer.” Id. at 8. For this feature, the Examiner asserted that Morrow “contemplates metal layers in different positions in the substrate, including, it would seem, both sides of the device layer.” Id. Miyakawa and Pogge were further cited by the Examiner for their teaching of input output terminals and interconnections, as claimed. Id. Appeal 2012-010834 Application 12/615,175 4 Appellants contend that Morrow does not describe the claimed second via connection that extends (1) from the top surface of the first interconnection wiring layer of the first device layer through (2) the second device layer, and (3) connecting to a third set of connections comprising interconnection wires and input output terminals disposed on the back side of the second device layer. Appeal Br. 6. Appellants contend that the Examiner misconstrued “via connection” to include connections in addition to the via, such as interconnect 128 and the unnamed and unnumbered elements in Fig. 1K of Morrow. Id. at 10. The rejection thus turns on the proper interpretation of “via connection.” Claim interpretation The issue in this appeal involves the interpretation of “via connection” as recited in the claims. During patent prosecution, claim terms are given their broadest reasonable interpretation, consistent with the specification, as they would be understood by one of ordinary skill in the art. In re Buszard, 504 F.3d 1364, 1367 (Fed. Cir. 2007); In re Am. Acad. of Sci. Tech Ctr., 367 F.3d 1359, 1364 (Fed. Cir. 2004). The term “via connection” is not defined in Application No. 12/615,175 (“the ’175 Application”), the application in this appeal. The Examiner interpreted “via connection” to “include [ ] connections that are formed in part by a via,” permitting the inclusion of bonding pads and interconnect structures. Final Office Action 4. However, the Examiner did not identify evidence to support this interpretation, but appeared to have based this interpretation on the recitation of “via connection,” rather than App App just “ inste broa posit joini uses sepa joini comp comp conn this c eal 2012-0 lication 12 via.” Be ad of “via der than si Appellan ion that “v ng devices a “single v rate ‘interc ng devices The ’175 rising a fi rising a s ections. ’ onfigurat 10834 /615,175 cause the t ,” the Exam mply a “vi ts challen ia connec . Appeal ia that pa onnects’ a .” Id. Applicat rst device econd dev 175 Appli ion (labels erm “via c iner appa a.” Answ ge the Exa tion” exclu Br. 11. Ap sses from nd withou ion describ layer and ice layer, w cation ¶ 42 added to i 5 onnection rently pre er 14. miner’s in des multi pellants a substrate to t joining t es a via w passes thro here it is . Fig. 4(K dentify the ” was used sumed tha terpretatio -componen rgue that t substrate o separate hich starts ugh a sec connected ), reprodu structure in the cla t “via conn n, taking t t structure heir own a without jo substrate at a first s ond substr another s ced below s more cle ims ection” is he s having pplication ining to to substrat ubstrate ate et of , shows arly). e Appeal 2012-010834 Application 12/615,175 6 Fig. 4(K) shows via 2431 extending from the top surface of the first device layer (“1000”) and through the second device layer (unnumbered but annotated with the label “second substrate with device layer”). ’175 Application ¶ 43. This is the same configuration that is claimed. The figure also shows connecting stud 1401 at one end. Id. at ¶ 58. Fig. 4(K) does not show the “third set of connections comprising interconnection wires and input output terminals disposed on the back side of said second device layer.” However, the second substrate is shown to be modified in Figs. 4(M) through 4(Q) to contain such a feature. The ’175 Application describes the through via approach depicted above as inventive and says that, if this “new method” is used, metal to metal connections made by bonding can be significantly reduced. Id. at ¶¶ 12 and 43. Consistently, there do not appear to be any via connections with intervening structures between them. The term “via connection” appears in the ’175 Application. For example, the application states: “It is desirable, therefore, to form face to face connections and through wafer via connections at the same time and with very high density and yield.” Id. at ¶ 12 (emphasis added). The ’175 Application also specifically identifies “via connections 1215,” which as shown in Fig. 4(K) above, to be a single via with no intervening structure in it. Id. at ¶ 55. Based on the disclosure in the ’175 Application, we interpret “via connection” to mean a conventional via – with no intervening Appeal 2012-010834 Application 12/615,175 7 structures – but not excluding a connecting stud at either end. The Examiner did not point to persuasive evidence that “via connection” would be construed by the ordinary skilled worker to be broader than the term “via.” Morrow The Examiner found that Morrow describes “a second via connection that extends from said top surface of said first interconnection wiring layer of said first device layer through said second device layer. For this feature, the Examiner reproduced Fig. 1K from Morrow, in which the Examiner added labels to identify the disputed features. Annotated Fig. 1K is reproduced below. We have added the gray shading to highlight the structure which the Examiner contends corresponds to the claimed “second via connection.” Appeal 2012-010834 Application 12/615,175 8 The Examiner identified the structure comprising 128 (shown with cross-hatching) and 104 (shown with no cross-hatching) as a “via connection.” Answer 6–8 (see region shaded with gray in Fig. 1K above). This via connection, as show in Fig. 1K, comprises 104/128 (hatched)/rectangular element/rectangular element/104/128 (hatched). The Examiner labeled the “first interconnection” wiring layer of the first device layer, but did not label the “second device layer” of claim 20. However, the Examiner identified the second device layer as “(layer containing 102) disposed on a second substrate (154) and comprising a second circuit layer (layer containing active devices 102) and a second interconnection wiring layer (104).” Id. at 6. Substrate 154 shown in Fig. 1K. The structure which the Examiner identifies as the “second via connection” (104/128/rectangular element/rectangular element/104/128; grey shaded region) is interrupted by two rectangular shaped elements before passing into the second device layer. These two rectangular elements are “un-named and un- numbered” as noted by Appellants. Appeal Br. 10. Thus, there are intervening rectangular elements in the second “via connection.” We interpreted “via connection” to mean a conventional via with no intervening structures. Because there are intervening structures between the via connections in Morrow that connect the first and second device layers, Morrow’s structure (104/128/rectangular element/rectangular element/104/128) does not meet the claimed “second via connection” limitation of claim 20. The obviousness Appeal 2012-010834 Application 12/615,175 9 rejection of claim 20, and dependent claims 23, 24, 26, 28, 31, 32, and 34, is reversed. REJECTIONS 2 AND 3 Claims 21, 22, 25, 27, 29, 29, 30, 33, and 35 stand rejected under rejections 2 and 3. Each of these claims depend from claim 20. The secondary references cited in the rejections do not make up for the deficiency in claim 20 described for Morrow. Consequently, we are compelled to reverse these rejections, as well. REVERSED lp Copy with citationCopy as parenthetical citation