Ex Parte Pronozuk et al

Patent Trials and Appeals Board

Mar 18, 2019

14076572 - (D) (P.T.A.B. Mar. 18, 2019)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
14/076,572 11/11/2013
73462 7590 03/20/2019
Hall Estill Attorneys at Law
(Seagate Technology LLC)
100 North Broadway, Suite 2900
Oklahoma City, OK 73102-8820
FIRST NAMED INVENTOR
Anthony John Pronozuk
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
STL17937 5900
EXAMINER
BANSAL, GURTEJ
ART UNIT PAPER NUMBER
2139
NOTIFICATION DATE DELIVERY MODE
03/20/2019 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
danderson@hallestill.com
okcipdocketing@hallestill.com
USPTO@dockettrak.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte ANTHONY JOHN PRONOZUK, SHAWN JACOB NOLAND,
JAMES EDWARD DYKES, and WILLIAM LEON RUGG
Appeal2018-007147
Application 14/076,572 1
Technology Center 2100
Before JOHNNY A. KUMAR, JOHN P. PINKERTON, and
STEVEN M. AMUNDSON, Administrative Patent Judges.
KUMAR, Administrative Patent Judge.
DECISION ON APPEAL
Appellants appeal under 35 U.S.C. § 134(a) from the Final Rejection
of claims 1-20. We have jurisdiction under 35 U.S.C. § 6(b).
We AFFIRM.
1 According to Appellants, the real party in interest is Seagate Technology,
LLC. Br. 1.
Appeal2018-007147
Application 14/076,572
Exemplary Claim
Exemplary claim 1 reads as follow, with disputed elements
highlighted in italics:
1. An apparatus comprising:
a plurality of data storage devices arranged within an
enclosed housing each comprising an associated memory and
device controller; and
a single mechanical switch coupled to the enclosed
housing moveable between an active position and an inactive
position by a first user, the mechanical switch configured to
securely erase the associated memory of each of the data
storage devices by writing a predetermined data pattern to
the associated memory responsive to a transition of the
mechanical switch from the inactive position to the active
position in concurrent combination with receipt of an activate
erase signal from a host device, the host device positioned
external to the enclosed housing and activated by a second
user, the first and second users being different, each data
storage device configured to move data to a new location prior
to erasing data from the associated memory responsive to the
mechanical switch being in the inactive position.
Rejection
Claims 1-20 are rejected under 35 U.S.C. § 112(a) as failing to
comply with the written-description requirement. Final Act. 2-3.
ANALYSIS
The Examiner rejected claims 1-20 under 35 U.S.C. § 112(a) as
failing to comply with the written-description requirement.
Appellant contends:
In sum, the specification clearly describes how software and
hardware signals are both required by the controller to issue a
secure erase command regardless of when the respective signals
were generated. As such, the ordinary artisan would identify
the claimed "concurrent combination" as the presence of both
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Appeal2018-007147
Application 14/076,572
Br. 8.
hardware and software generated signals together at the
controller.
The Examiner finds:
Appellant's specification does not recite how the transition
concurrently occurs with receipt of an activate control signal
from a host device. This can best be demonstrated by looking
at figure 11 of Appellant's specification along with
corresponding citations. For example, in figure 11, the
embodiment described in the claims appears to be the one taken
by the path which walks through steps 314, 316, 318 and 320.
These steps include the step of determining with a time interval
whether the arm software switch and activate hardware switch
are activated (Appellant's specification p. 16, line 25-page 17,
lines 5). This statement as well as Appellant's specification
describes how these two activations occur within a period of
time and not at the same time. However, the definition of
concurrent is "done at the same time". Appellant's
specification does not in any way shape or form redefine this
term. In fact the term concurrently is not recited in the
specification at all.
Ans. 3--4 (emphasis ours); see also Final Act. 2-3.
We agree with the Examiner that Appellants' specification only
supports (page 16, lines 26-2 7, and Fig. 11) ( emphasis added) "whether both
activation signals were received within the predetermined time interval,"
which does not correspond to receiving them concurrently or "at the same
time." (Ans. 3--4) ( emphasis added).
We disagree with Appellants' contention that the Examiner erred in
finding the Specification fails to demonstrate Appellants had possession of a
"concurrent combination," as claimed. We observe no Reply Brief is of
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Appeal2018-007147
Application 14/076,572
record to rebut the Examiner's findings and responses to Appellants'
arguments.
Accordingly, we sustain the Examiner's rejection of claims 1-20
under 35 U.S.C. § 112(a).
DECISION
The Examiner's rejection of claims 1-20 is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv).
AFFIRMED
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