Ex Parte MolnarDownload PDFPatent Trial and Appeal BoardNov 28, 201210420253 (P.T.A.B. Nov. 28, 2012) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________________ Ex parte INGO MOLNAR ____________________ Appeal 2010-000001 Application 10/420,253 Technology Center 2400 _____________________ Before KALYAN K. DESHPANDE, DAVID M. KOHUT, and JASON V. MORGAN, Administrative Patent Judges. DESHPANDE, Administrative Patent Judge. DECISION ON APPEAL Appeal 2010-000001 Application 10/420,253 2 STATEMENT OF CASE1 The Appellant seeks review under 35 U.S.C. § 134(a) of a final rejection of claims 1-25, the only claims pending in the application on appeal. We have jurisdiction over the appeal pursuant to 35 U.S.C. § 6(b). We AFFIRM. The Appellant invented a method and apparatus for the exposure resulting from stack, buffer, and pointer overflows by creating an “execution shield” within the virtual memory space of an instruction execution system. Specification ¶ 0006. An understanding of the invention can be derived from a reading of exemplary claim 1, which is reproduced below [bracketed matter and some paragraphing added]: 1. A method of securing the operation of an instruction execution system, the method comprising: [1] allocating a plurality of virtual memory regions, the plurality of virtual memory regions associated with executable code for a plurality of tasks, to a plurality of address spaces having the lowest valid addresses that can be used for execution control; [2] tracking an execution limit for each of the plurality of tasks, wherein the execution limit corresponds to a highest executable virtual memory address for at least one of the plurality of tasks; [3] dynamically setting a code segment limit value to be equal to the execution limit for a current task from among the plurality of tasks; and 1 Our decision will make reference to the Appellant’s Appeal Brief (“App. Br.,” filed Aug. 5, 2008) and Reply Brief (“Reply Br.,” filed Nov. 24, 2008), and the Examiner’s Answer (“Ans.,” mailed Oct. 28, 2008), and Final Rejection (“Final Rej.,” mailed Mar. 5, 2008). Appeal 2010-000001 Application 10/420,253 3 [4] denying a transfer of execution control to any code positioned at a virtual memory address higher than that defined by the code segment limit value. REFERENCES The Examiner relies on the following prior art: White US 5,701,448 Dec. 23, 1997 Linux Assembly Language Programming, ISBN-10: 0-13-087940-1, July 2000 (“Linux”) REJECTION Claims 1-25 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over White. ISSUE The issue of whether the Examiner erred in rejecting claims 1-25 under 35 U.S.C. § 103(a) as unpatentable over White turns on whether the arguments presented by the Appellant are commensurate with the scope of the claims and whether White teaches or suggests various limitations argued by the Appellant. ANALYSIS We have reviewed the Examiner’s rejections in light of the Appellant’s contentions that the Examiner has erred. We disagree with the Appellant’s conclusions. We adopt as our own (1) the findings and reasons set forth by the Examiner in the action from which this appeal is taken and (2) the reasons set forth by the Examiner in the Examiner’s Answer in response to the Appellant’s Appeal Brief. We Appeal 2010-000001 Application 10/420,253 4 concur with the conclusion reached by the Examiner. We highlight the following arguments for emphasis. The Appellant contends “White is related to all of the memory used for an application; it does not distinguish between data and executable code,” “there is no regard expressed in White for where the block of instructions for the task are stored in memory in relation to instructions for other tasks,” “[t]here is nothing in White which takes into account the placement of the executable address space used by a ‘current task,’” and “White does not take into account the totality of all [of the] tasks in the system.” App. Br. 5-6 and Reply Br. 1-3. We are not persuaded by these arguments because the limitations argued by the Appellant are not found in the claims and therefore the Appellant’s arguments are not commensurate with the scope of the claims. The Appellant contends that White teaches away from the limitation of “dynamically setting the code segmentation limit to be equal to the execution limit for a current task from among the plurality of tasks.” App. Br. 7-8. We disagree with the Appellant. “A reference may be said to teach away when a person of ordinary skill, upon reading the reference, would be discouraged from following the path set out in the reference, or would be led in a direction divergent from the path that was taken by the applicant.” Ricoh Co., Ltd. v. Quanta Computer, Inc., 550 F.3d 1325, 1332 (Fed. Cir. 2008) (citations omitted). A reference does not teach away if it merely expresses a general preference for an alternative invention from amongst options available to the ordinarily skilled artisan, and the reference does not discredit or discourage investigation into the invention claimed. In re Fulton, 391 F.3d 1195, 1201 (Fed. Cir. 2004). Appeal 2010-000001 Application 10/420,253 5 Here, the Appellant merely argues that White describes the code segment limit value is set arbitrarily (App. Br. 7-8), but fails to provide any evidence or rationale that White discourages or discredits dynamically setting the code segment limit value. Absent any evidence or rationale, we are not persuaded by this argument. CONCLUSION The Examiner did not err in rejecting claims 1-25 under 35 U.S.C. § 103(a) as unpatentable over White. DECISION To summarize, our decision is as follows. The rejection of claims 1-25 under 35 U.S.C. § 103(a) as unpatentable over White is sustained. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv) (2010). AFFIRMED rwk Copy with citationCopy as parenthetical citation