Ex Parte McClure et alDownload PDFPatent Trial and Appeal BoardDec 19, 201212002081 (P.T.A.B. Dec. 19, 2012) Copy Citation UNITED STATES PATENT AND TRADEMARKOFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 12/002,081 12/13/2007 Steven T. McClure EMS-02702 5153 52427 7590 12/19/2012 MUIRHEAD AND SATURNELLI, LLC 200 FRIBERG PARKWAY, SUITE 1001 WESTBOROUGH, MA 01581 EXAMINER TSAI, SHENG JEN ART UNIT PAPER NUMBER 2186 MAIL DATE DELIVERY MODE 12/19/2012 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ Ex parte STEVEN T. MCCLURE, STEVEN R. CHALMER, and BRETT D. NIVER ____________ Appeal 2010-004149 Application 12/002,081 Technology Center 2100 ____________ Before DENISE M. POTHIER, ERIC B. CHEN, and JENNIFER S. BISK, Administrative Patent Judges. POTHIER, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Appellants appeal under 35 U.S.C. § 134(a) from the Examiner’s final rejection of claims 43-61. Claims 1-42 have been canceled. App. Br. 2. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. Invention Appellants’ invention relates to the memory management field. See Spec. 1:4-5. Illustrative claim 43 is reproduced below: Appeal 2010-004149 Application 12/002,081 2 43. A method of managing memory, comprising: subdividing a first volatile memory into at least a first linked list of blocks corresponding to a first size and at least a second linked list of blocks corresponding to a second size that is greater than said first size, wherein user data stored by each linked list of blocks is provided entirely in the first volatile memory; providing, in a second volatile memory different from said first memory, a table that includes pointers that point directly to a first block of each of said linked lists, wherein the second volatile memory does not contain any linked lists of blocks provided in the first volatile memory; in response to a request for an amount of memory that is less than or equal to the first size, providing a pointer to said first block of said first linked list of blocks and modifying said table to point to a remaining portion of said first linked list of blocks that does not include said first block; and in response to a request for an amount of memory that is greater than the first size and less than or equal to the second size, providing a pointer to said first block of said second linked list of blocks and modifying said table to point to a remaining portion of said second linked list of blocks that does not include said first block of said second linked list of blocks. The Rejection The Examiner relies on the following as evidence of unpatentability: Parks US 5,469,559 Nov. 21, 1995 Trainin US 6,757,802 B2 June 29, 2004 Wolrich US 6,779,084 B2 Aug. 17, 2004 (filed Jan. 23, 2002) The Examiner rejected claims 43-61 under 35 U.S.C. § 103(a) as unpatentable over Trainin, Wolrich, and Parks. Ans. 3; Final Rej. 4-8.1 1 Throughout this opinion, we refer to the Final Rejection mailed March 9, 2009, the Appeal Brief filed July 31, 2009, the Examiner’s Answer mailed November 4, 2009, and the Reply Brief filed January 4, 2010. Appeal 2010-004149 Application 12/002,081 3 THE CONTENTIONS The present application has an effective filing date of April 16, 2002. Wolrich has a filing date of January 23, 2002 and has been cited by the Examiner in the obviousness rejection of all pending claims. On December 8, 2008, Appellants filed a declaration under 37 C.F.R. § 1.131 (“the 131 declaration”) attempting to antedate Wolrich’s filing date and overcome the obviousness rejection. Appellants assert that the 131 declaration and its accompanying Exhibits A-C demonstrate actual reduction to practice of the claimed invention prior to January 23, 2002 (the effective date of Wolrich as a reference). App. Br. 8-17; Reply Br. 3-9. The Examiner finds that the 131 declaration is ineffective to demonstrate actual reduction to practice of the claimed invention as recited in claim 43 and thus does not overcome the obviousness rejection. Ans. 4-7. ISSUE Have Appellants sufficiently established actual reduction to practice of the claimed invention recited in claim 43 by the inventors prior to January 23, 2002? ANALYSIS Based on the record before us, we find inadequate evidence to establish actual reduction to practice of the claimed invention prior to January 23, 2002. Appellants assert that the 131 declaration states specific facts concerning the implementation of a working computer program involving memory management with bucket based memory allocation that is identified as “the implemented system.” (See, e.g., paragraph 4 of the Rule 131 declaration.) Exhibit A is then Appeal 2010-004149 Application 12/002,081 4 provided and specifically identified as evidence supporting the stated facts. (See, e.g., paragraph 8 of the Rule 131 declaration.) App. Br. 10. While paragraph 4 of the 131 declaration concludes the inventors “implemented (built) a working computer program involving memory management with bucket . . . that include[s] the features of the claimed invention of the present patent application (hereinafter ‘the implemented system’)” (the 131 declaration, ¶ 4), this paragraph has insufficient factual statements to demonstrate that this conclusion is correct. See 37 C.F.R. § 1.131(b); see also the Manual of Patent Examining Procedure (MPEP) § 715.07(I), (III). Paragraph 5(a) quotes independent claim 43 (method) and paragraph 5(b) quotes claim 55 (computer program product). Appellants call these features “the implemented system[.]” See the 131 declaration, ¶ 5. Paragraph 6 also states that the inventors conceived of, developed, and reduced the implemented system before January 23, 2002. The 131 declaration, ¶ 6. Yet, similar to paragraph 4, these paragraphs provide no factual evidence to support the conclusion that Appellants actually reduced the claimed invention to practice. That is, these paragraphs are conclusory, failing to show with factual evidence the claimed method and product actually existed and worked for its intended purpose. See In re Asahi/America, Inc., 68 F.3d 442, 445 (Fed. Cir. 1995); see also MPEP § 2138.05(II). Paragraphs 7 through 9 and accompanying Exhibits A-C provide some factual evidence that the named inventors wrote code for a multiple area memory allocator with buckets. See 131 declaration, ¶¶ 7-9; see also Exhibits A-C. Paragraph 7 refers to Exhibit A and paragraph 9 refers to Appeal 2010-004149 Application 12/002,081 5 Exhibits B-C. These paragraphs however are similarly conclusory with no additional factual evidence of what was completed before January 23, 2002. Paragraph 8 and accompanying Exhibit A provide evidence that Appellants actually reduced a multiple area memory allocator with buckets. The 131 declaration, ¶ 8. Yet, as the Examiner indicates (Ans. 6-7), paragraph 8 and Exhibit A do not show or describe program code that includes the step of “providing, in a second volatile memory different from said first memory, a table that includes pointers that point directly to a first block of each of said linked lists, wherein the second volatile memory does not contain any linked lists of blocks provided in the first volatile memory[.]” Appellants need to show the claimed invention – not just a multiple area memory allocator with buckets – existed and worked for its intended purpose prior to the relevant time period. . Exhibit A mentions two memories (i.e., fast, locally cached memory, very slow memory) and thus supports two different memories. Exhibit A. The Examiner states the reference to buckets in Exhibit A also supports a first volatile memory (e.g., fast, locally cached memory) having a set of linked lists (e.g., buckets) as recited. Ans. 6. However, this Exhibit does not discuss a second volatile memory with a table containing pointers that point directly to a first block of each of the linked lists as the claimed invention recites. See Exhibit A. There is no mention of tables or pointers (see id.), nor have Appellants attempted to explain how the description of the multiple area memory allocator with buckets discusses these features. Exhibits B and C do not further demonstrate what the code includes but rather describe only a freeze time for some code. See Exhibit B-C. Appeal 2010-004149 Application 12/002,081 6 In response to the Examiner, Appellants point to paragraph 5 of the 131 declaration and state this illustrates that this “providing” element is part of the working computer program reduced to practice. See Reply Br. 7-8. However, as stated previously, paragraphs 4-6 are merely conclusory and provide inadequate factual proof that this claimed feature (e.g., table with pointers) actually existed in the code and worked for its intended purpose before January 23, 2002. We additionally note other elements in independent claim 43 include language of providing a pointer to a first block of a first or second linked block list or modifying the table to point to a remaining portion of the first or second linked block list. Paragraph 8 does not provide sufficient factual proof that the above-noted claimed features in independent claim 43 and similarly independent claim 55 were part of the code discussed in Exhibit A. Based on the above discussion, Appellants have not provided sufficient factual evidence that the claimed invention actually existed and worked for its intended purpose before January 23, 2002. See Asahi, 68 F.3d at 445. Evidence and arguments that a multiple area memory allocator with buckets existed or was built before January 23, 2002 (see App. Br. 11; Reply Br. 5-6) does not establish that the claimed invention existed before this date. For this reason, we further agree with the Examiner (Ans. 4-5) that the Appellants have not demonstrated that the claimed invention has been sufficiently run and tested to demonstrate that the claimed invention will operate for its intended purpose. See MPEP § 2138.05(II). Appellants have not persuaded us of error in the rejection of independent claim 43 and claims 44-61 not separately argued with particularity. Appeal 2010-004149 Application 12/002,081 7 CONCLUSION The Examiner did not err in rejecting claims 43-61 under § 103. DECISION The Examiner’s decision rejecting claims 43-61 is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). 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