Ex Parte Loh et alDownload PDFPatent Trial and Appeal BoardOct 31, 201613567945 (P.T.A.B. Oct. 31, 2016) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE FIRST NAMED INVENTOR 13/567,945 08/06/2012 Gabriel H. Loh 109712 7590 11/02/2016 Advanced Micro Devices, Inc. c/o Davidson Sheehan LLP 8834 North Capital of TX Hwy Suite 100 Austin, TX 78759 UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. 1458-110209 5029 EXAMINER RIZK, SAMIR W ADIE ART UNIT PAPER NUMBER 2112 NOTIFICATION DATE DELIVERY MODE 11/02/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): docketing@ds-patent.com beatrice. zepeda@ds-patent.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte GABRIEL H. LOH, JAMES M. O'CONNOR, BRADFORD M. BECKMANN, and MICHAEL IGNATOWSKI Appeal2015-007443 Application 13/567,945 Technology Center 2100 Before JUSTIN BUSCH, SCOTT E. BAIN, and ALEX S. YAP, Administrative Patent Judges. YAP, Administrative Patent Judge. DECISION ON APPEAL Appellants 1 appeal under 35 U.S.C. § 134(a) from the Examiner's final rejection of claims 1--40, which are all the claims pending in this application. We have jurisdiction under 35 U.S.C. § 6(b). We AFFIRM-IN-PART. 1 According to Appellants, the real party in interest is Advanced Micro Devices, Inc. (App. Br. 1.) Appeal2015-007443 Application 13/567,945 STATEMENT OF THE CASE Introduction Appellants' invention "relates to memory devices, and more particularly, to stacked memory devices." (Aug. 6, 2012 Specification ("Spec.") i-f 2.) Claim 1 is representative and is reproduced below: 1. An integrated circuit (IC) package comprising: memory cell circuitry; and a set of one or more logic layers electrically coupled to the memory cell circuitry, the set of one or more logic layers comprising a metadata manager and a memory interface, the memory interface coupled to the metadata manager and coupleable to a device external to the IC package, and the metadata manager to manage metadata stored at the IC package and which is associated with operational data stored at the memory cell circuitry for the device. Prior Art and Rejections on Appeal The follov,ring table lists the prior art relied upon by the Examiner in rejecting the claims on appeal: Blankenship Call et al. ("Call") Strasser et al. ("Strasser") US 2010/0070696 Al Mar. 18, 2010 US 8,700,951 Bl Apr. 15, 2014 US 2014/0108891 Al Apr. 17, 2014 Claims 1-10 and 12--40 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Call in view of Blankenship. (See Final Office Action (mailed Oct. 31, 2014) ("Final Act.") 5-14.) 2 Appeal2015-007443 Application 13/567,945 Claim 11 stands rejected under 35 U.S.C. § 103(a) as being unpatentable over Call in view of Blankenship, and further in view of Strasser. (See Final Act. 14--15.) ANALYSIS We have reviewed the Examiner's rejections in light of Appellants' arguments that the Examiner has erred. We are not persuaded that the Examiner erred in rejecting claims 1-3, 6, 7, and 9--40. We are persuaded that the Examiner erred in rejecting claims 4, 5, and 8. Claims 1-3, 6, 7, and 9--40 With respect to claim 1, the Examiner finds that Blankenship teaches or suggests the limitations of claim 1 but does not teach a metadata manager to manage metadata stored at the integrated circuit (IC) package. (Final Act. 5---6.) The Examiner, however, finds that Call teaches or suggests a metadata manager and that: It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the teaching of Call [and] the teaching of Blankenship that comprises IC package comprising memory array (cells) and memory interface controller. This modification would have been obvious to one of ordinary skill in the art, at the time the invention was made, because one of ordinary skill in the art would have recognized the need for low power and compact electronics and increased data reliability. (Final Act. 6; Ans. 4.) Appellants disagree and contend that the combination "would not result in the particular combinations of features recited in claim 1" because "Blankenship describes a memory system ... whereas Call 3 Appeal2015-007443 Application 13/567,945 describes a disk storage system [and] if one of ordinary skill in the art were to combine the teachings of Call and Blankenship, the end result would be a computing system employing a memory system as taught by Blankenship and a separate disk storage system as taught by Call." (App. Br. 5.) Appellants further contend that: there is no evidence of any motivation for one of ordinary skill in the art to make such modifications, if such modifications could even be implemented at all. [Moreover,] Blankenship already provides for an on-chip ECC approach that provides low power consumption, compact electronics, and increased data reliability, and it has not been demonstrated that the incorporation of any of the teachings of Call would improve upon what is already achieved by Blankenship. Conversely, there is no suggestion in Call or any evidence showing that it was well known at the time of invention that the incorporation of the teachings of Call into an IC package such as the one taught by Blankenship (if such combination is even achievable by one of ordinary skill) would result in lower power consumption, more compact electronics, or increased data reliability. (App. Br. 5---6, emphasis added; Reply 1-2.) The Examiner disagrees and further states that Blankenship also supports the Examiner's rationale for the combination. (Ans. 4--5, citing to Blankenship i-f 4 ("As portable electronic devices become smaller, less expensive, and more power efficient, however, there has been an increased demand for low power and compact electronic systems in which DRAM is commonly used. Consequently, systems and methods are needed to reduce the size, power and cost of memory systems.").) Appellants have not persuaded us that the Examiner erred. We find that the Examiner provides sufficient articulated reasoning having a rational 4 Appeal2015-007443 Application 13/567,945 underpinning, such that a person of ordinary skill in the art would have been motivated to combine the teachings of Blankenship and Call. (Id.) See KSR Int'! Co., v. Teleflex, Inc., 550 U.S. 398, 415, 418 (2007). Appellants' contention that one of ordinary skill in the art would not be able to combine the teachings of Blankenship and Call because "Blankenship describes a memory system ... whereas Call describes a disk storage system" is mere attorney argument and a conclusory statement that is unsupported by factual evidence, and, thus is entitled to little probative value. In re Geisler, 116 F.3d 1465, 1470 (Fed. Cir. 1997); In re De Blauwe, 736 F.2d 699, 705 (Fed. Cir. 1984). Moreover, the Examiner does not propose physically combining Call with Blankenship, but merely Call' s teaching of a metadata manager with Blankenship's teaching of stacked memory layers on an integrated circuit. In re Keller, 642 F.2d 413, 425 (CCPA 1981) ("The test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference . . . . Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art."); see also In re Sneed, 710 F.2d 1544, 1550 Fed. Cir. 1983 (citing Orthopedic Equip. Co. v. United States, 702 F.2d 1005, 1013 (Fed. Cir. 1983); In re Andersen, 391F.2d953, 958 (CCPA 1968)) ("[I]t is not necessary that the inventions of the references be physically combinable to render obvious the invention under review."). Furthermore, we agree with the Examiner's finding that one of ordinary skill in the art would be able to combine teachings in Call (regarding the management of metadata) with the teachings of Blankenship (regarding an "IC package comprising memory array (cells) and memory interface controller"). (Final Act. 5---6; Ans. 4--5.) Specifically, we agree 5 Appeal2015-007443 Application 13/567,945 with the Examiner that a person of ordinary sill in the art would be able to implement the metadata management of Call in the Memory Controller and Interface IC 302 of Blankenship. (Final Act. 5---6.) Figure 3 of Blankenship is reproduced below. '\ x~ ::;~~ ., j)~1 """') ~· f .,.,~ ~ ....................................... ': .':, :;>"""""""""".,:.""""""""""""""""""""""""""<:. l t:-; .. ~: ~~~~'«') ;>.,~~ .. .:~' - ' ,............................................................... • ......................................................................................................................... \. ... )o.. , :f ....... ,~ :-,_;.;.::.::.:-...~ ... ~ , ~ ~ ~ ~ ~ ~~ ~~,~;.:;::., ~J L J :~~~ .·.··1~-~r ;~~~~~:-~~~:~~~-:>::~~~:~~-----------------w ------------------w ~ ~ ~l~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~m I L:::::::::::::::::::::::.::.::::::::::::::::::::::::r:::::::::::::::::::::.J s:~~} ...... Fig.3 Figure 3 depicts "a schematic of a chipset for a packaged DRAM memory system according to a preferred embodiment." (Blankenship i-f 10.) We agree with the Examiner that Call teaches or suggests that its metadata management can be applied to both "mechanical hard disk and solid state disk (SSD) i.e.[,] integrated circuit (IC) FLASH-based disk." (Call, Abstract.) For example, Call also teaches metadata management of IC memones: As shown [in FIG. 1], a storage subsystem 140 includes a controller 150 and one or more non-volatile solid-state memory 6 Appeal2015-007443 Application 13/567,945 arrays 160. The arrays 160 may comprise a plurality of solid- state storage devices coupled to the controller 150. The arrays may comprise, for example, flash integrated circuits[.] Other forms of storage (e.g., battery backed-up volatile DRAM or SRAM devices, magnetic disk drives, etc.) may additionally or alternatively be used. (Call, 2: 16-3 3, emphases added.) Therefore, contrary to Appellants' contention that one of ordinary skill in the art would not be able to combine the teachings of Blankenship and Call because "Blankenship describes a memory system ... whereas Call describes a disk storage system" (App. Br. 5), we agree with the Examiner that one of ordinary skill in the art would be able to implement Call's metadata manager in Blankenship. (Ans. 5.) We also do not agree with Appellants' contention that "Blankenship already provides for an on-chip ECC approach ... , and [therefore,] it has not been demonstrated that the incorporation of any of the teachings of Call would improve upon what is already achieved by Blankenship." (App. Br. 5, emphasis added.) Blankenship; however; merely notes in passing that "[ o ]ne could also place Error Correction Circuitry (ECC) along with the redundancy for repair block 350." (Blankenship i-f 35.) It does not describe how ECC is to be implemented and how to improve on it. Call, on the other hand, teaches that the "spare area[, which is used to store metadata,] may include metadata such as that used for ECC purposes" and how to handle uncorrectable ECC error. (Call, 5:9-10; see also id. at 3:40-45, 4:7-13, 30- 37.) Claim 7 recites that "the metadata manager is to perform at least one metadata management operation in response to a metadata command from the device." As discussed above, the Examiner finds that the metadata manager of Call can be implemented in the Memory Controller and Interface 7 Appeal2015-007443 Application 13/567,945 IC 302 of Blankenship. (Final Act. 6; Blankenship, FIG. 3.) According to the Examiner, the metadata manager is also "coupleable to a device external to the IC package, (Figure [3], (304) in Blankenship)" and the metadata manager would "perform at least one metadata management operation in response to a metadata command from the device" external to the IC package (304) as shown in Figure 3. (Final Act. 9.) Appellants contend that "the 'metadata manager' of Call is paradoxically both part of the IC package (that is, internal to the IC package) and external to the IC package." (App. Br. 8-9; Reply 5.) Appellants have not persuaded us that the Examiner erred. As noted by the Examiner, the metadata manager of Call would be implemented in the Memory Controller and Interface IC 302 (of Blankenship), which is in the IC package and Appellants have not persuaded us that the metadata manager is "external to the IC package." Claim 10 recites that "the metadata comprises memory log information representing accessed memory locations; and the at least one metadata management operation comprises at least one of: configuring at least one parameter of a memory logging operation to be performed by the metadata manager; and accessing the memory log information for output to the device." Appellants contend that neither Figures 4A nor 4B, cited in the Final Action, "teaches that at least one parameter of this operation is configured, much less as part of a metadata management operation, as provided by claims 1 and 10." (App. Br. 10.) The Examiner clarifies that Call teaches a "controller (Figure 1, ref. (150)[)] to provide for metadata management operation for configuration of parameter of a memory logging operation." (Ans. 7.) Appellants do not reply. Appellants have not 8 Appeal2015-007443 Application 13/567,945 persuaded us that the Examiner erred and we agree with the Examiner's finding regarding this claim. Claim 11 recites that "the metadata comprises garbage collection attributes; and the at least one metadata management operation comprises modifying at least one of the garbage collection attributes." The Examiner finds that while "Call [and] Blankenship teach substantially all the limitations in claims 1 and 7[, which claim 11 depends from,] Strasser in an analogous art" teaches garbage collection updates of non-volatile flash memories. (Final Act. 14--15.) According to the Examiner: It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the teaching of Cal[l] I Blankenship with the teaching of Strasser that comprises garbage collection updates. This modification would have been obvious to one of ordinary skill in the art, at the time the invention was made, because one of ordinary skill in the art would have recognized the need for increased data reliability and efficiency in NVM memories systems. (Final Act. 15.) Appellants contend that it would not have been obvious to combine the references because "the Examiner has not shown how one of ordinary skill in the art would go about making this substantial modification without rendering Call or Strasser unsuitable for their intended purposes, or whether it could even be achieved at all." (App. Br. 17, emphasis added; Reply 7-8.) The Examiner disagrees and responds that "as explained in the final office action Call teaches metadata comprises partial parity data stripes and Strasser is an obvious modification to comprise garbage collection metadata." (Ans. 7.) In other words, the Examiner finds that it would have been obvious to one of ordinary skill in the art to add Strasser' s teachings regarding garbage collection metadata to Call' s teachings regarding 9 Appeal2015-007443 Application 13/567,945 metadata management. Appellants have not persuaded us that the Examiner erred. We find that the Examiner provides sufficient articulated reasoning having a rational underpinning, such that a person of ordinary skill in the art would have been motivated to combine the teachings of Blankenship, Call, and Strasser. (Id.) See KSR, 550 U.S. at 415, 418. Appellants' contention that one of ordinary skill in the art would not be able to combine the teachings of Blankenship, Call, and Strasser "without making substantial modification" is mere attorney argument and a conclusory statement that is unsupported by factual evidence. In re Geisler, 116 F.3d at 1470. Appellants have not persuaded us that the Examiner erred and we agree with the Examiner's finding regarding this claim. Claim 13 recites that "the metadata manager is to provide to the device a memory address of the memory cell circuitry at which the metadata is stored; and the request includes the memory address." Appellants contend that "Call fails to teach the provision of the memory address at which this 'metadata' is stored to an external device" and neither does Blankenship "teach anything analogous to this 'metadata' stored in a 'spare area' in a page in a corresponding stripe." (App. Br. 10.) The Examiner responds that "Call in figure 1 teaches metadata stored in the external volatile memory ref. (164)." (Ans. 7.) Appellants do not reply. Appellants have not persuaded us that the Examiner erred and we agree with the Examiner's finding regarding this claim. For the foregoing reasons, we are not persuaded of Examiner error in the rejection of claims 1, 7, 10, 11, and 13. Thus, we sustain the 35 U.S.C. § 103 rejections of claims 1, 7, 10, 11, and 13, as well as claims 2, 3, 6, 9, 12, and 14--40, which are not argued separately. (App. Br. 16.) 10 Appeal2015-007443 Application 13/567,945 Claims 4, 5, and 8 Claim 4 depends from claim 3 and further recites "the metadata comprises a memory utilization metric associated with a specified memory address range; and the at least one metadata management operation comprises updating the memory utilization metric responsive to a match between the specified memory address range and a memory address identified by the memory access request." (Emphases added.) Appellants contend that neither Call nor Blankenship teaches or suggests "a memory utilization metric" much less one that is updated based on "a match between the specified memory address range and a memory address identified by the memory access request." (App. Br. 7-8; Reply 4.) The Examiner finds that "Call in Figures 4A/B teaches measuring partial stripe (i.e. memory utilization metric) to mark parity marking with metadata mis-match." (Ans. 5, emphasis in original; Final Act. 7.) We agree with Appellants that the portions of Call cited by the Examiner do not teach or suggest the limitation at issue. Specifically, we agree that "measuring partial stripe ... to mark parity marking with metadata mis-match" is not "memory utilization metric" nor is such a metric updated based on "a match between the specified memory address range and a memory address identified by the memory access request" as claimed. Claim 5 depends from claim 3 and further recites "the metadata comprises memory log information representing accessed memory locations; and the at least one metadata management operation comprises updating the memory log information with a memory address identified by the memory access request." (Emphasis added.) The Examiner finds that Call teaches this limitation because the controller uses the updated metadata "to track the 11 Appeal2015-007443 Application 13/567,945 locations of the valid pages." (Call, 6:21-30; Ans. 5-6.) Appellants contend that "[ n ]owhere in Call is it disclosed or suggested that a memory address is stored ... much less ... is updated 'with a memory address identified by the memory access request.'" (App. Br. 8; Reply 5.) We agree with Appellants that the portions of Call cited by the Examiner do not teach or suggest the limitation at issue. Specifically, the portions of Call cited by the Examiner do not teach or suggest "updating the memory log information with a memory address identified by the memory access request" as claimed. Claim 8 depends from claim 7 and further recites "the metadata comprises address translation information; and the at least one metadata management operation comprises accessing the address translation information to translate the virtual address to the physical address." Appellants contend that "the 'metadata' of Call [contains] valid page information identifying which pages are valid for a corresponding stripe[, which] is not the same as, or even equivalent to, address translation information." (App. Br. 9.) The Examiner responds that "Call teaches address translation each time the parity page is read, e.g.[,] in Figure 4B, step ( 420) Call provides address translation to find out which pages are valid." (Ans. 6; Final Act. 9.) We agree with Appellants that the portions of Call cited by the Examiner do not teach or suggest the limitation at issue. Specifically, step 420 of Figure 4B merely states "Read Metadata to Find Out Which Pages Are Valid" and do not teach or suggest "translat[ing] the virtual address to the physical address." 12 Appeal2015-007443 Application 13/567,945 For the foregoing reasons, we are persuaded of Examiner error in the rejection of claims 4, 5, and 8, and do not sustain the 35 U.S.C. § 103 rejection of these claims. 2 DECISION We affirm the decision of the Examiner to reject claims 1-3, 6, 7, and 9--40 under 35 U.S.C. § 103(a). We reverse the decision of the Examiner to reject claims 4, 5, and 8 under 35 U.S.C. § 103(a). No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv). AFFIRMED-IN-PART 2 Because we do not sustain the Examiner's rejection for the reasons discussed herein, we need not address Appellants' other arguments relating to these claims. See Beloit Corp. v. Valmet Oy, 742 F.2d 1421, 1423 (Fed. Cir. 1984) (finding an administrative agency is at liberty to reach a decision based on "a single dispositive issue"). 13 Copy with citationCopy as parenthetical citation