Ex Parte LIN et al

Patent Trial and Appeal BoardMay 17, 2018

12904506 (P.T.A.B. May. 17, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE FIRST NAMED INVENTOR 12/904,506 10/14/2010 Chih-Wei LIN 95496 7590 05/21/2018 Hauptman Ham, LLP (TSMC) 2318 Mill Road Suite 1400 Alexandria, VA 22314 UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. T5057-R323 6072 EXAMINER GUPTA,RAJR ART UNIT PAPER NUMBER 2829 NOTIFICATION DATE DELIVERY MODE 05/21/2018 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): tsmc@ipfirm.com sramunto@ipfirm.com pair_lhhb@firsttofile.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte CHIH-WEI LIN, MING-DA CHENG, WEN-HSIUNG LU, MENG-WEI CHOU, HUNG-JUI KUO, and CHUNG-SHI LIU Appeal2017-003554 Application 12/904,506 Technology Center 2800 Before GEORGE C. BEST, N. WHITNEY WILSON, and JEFFREY R. SNAY, Administrative Patent Judges. SNAY, Administrative Patent Judge. DECISION ON APPEAL 1 Appellants2 appeal the Examiner's decision rejecting claims 1-11 and 21-29. 35 U.S.C. Â§ 134(a). We have jurisdiction under 35 U.S.C. Â§ 6(b). We reverse. 1 We cite the Specification ("Spec.") filed October 14, 2010; Final Office Action ("Final Act.") dated January 7, 2016; Appellants' Appeal Brief ("App. Br.") dated June 2, 2016; Examiner's Answer ("Ans.") dated October 20, 2016; and Appellants' Reply Brief ("Reply Br.") dated December 16, 2016. 2 Appellants identify Taiwan Semiconductor Manufacturing Company, Ltd. as the real party in interest. App. Br. 2. Appeal2017-003554 Application 12/904,506 BACKGROUND The subject matter on appeal relates to a copper pillar associated with a semiconductor device to establish electrical connection to a bond pad via an under-bump metallurgy (UBM) layer. Spec. i-fi-f l--4. Claim 1 is illustrative: 1. A semiconductor device comprising: a substrate; a contact pad over the substrate; a passivation layer extending over the substrate and having an opening over the contact pad; an under-bump metallurgy (UBM) layer over the contact pad; and a conductive pillar over the opening of the passivation layer, wherein a bottom-most surface of the conductive pillar is completely above an upper-most surface of the UBM layer, a lowest portion of the conductive pillar has curved sidewalls, the lowest portion is above a top surface of the passivation layer, and the conductive pillar comprises copper. App. Br. 18 (Claims Appendix) (emphasis added to highlight a key claim element in dispute). REJECTIONS I. Claims 1-11 and 26-29 stand rejected under 35 U.S.C. Â§ 103(a) as unpatentable over Mercer, 3 Kim, 4 Hu, 5 and Iwaki. 6 II. Claims 21-25 stand rejected under 35 U.S.C. Â§ 103(a) as unpatentable over Mercer and Kim. 3 US 2005/0239277 Al, published October 27, 2005 ("Mercer"). 4 US 6,417,089 Bl, issued July 9, 2002 ("Kim"). 5 US 2011/0115074 Al, published May 19, 2011 ("Hu"). 6 US 2009/0057893 Al, published March 5, 2009 ("Iwaki"). 2 Appeal2017-003554 Application 12/904,506 OPINION The Examiner finds that Mercer discloses, inter alia, a semiconductor device having a copper pillar positioned over a UBM layer. Final Act. 3. Those features are shown in Mercer's Figure 1, which we reproduce below: 170 180 , ................ e:l ........... i:!. .............. . v 150 110 120 FIGURE l Mercer's Figure 1 is a cross-sectional depiction of an integrated circuit interconnect structure, including a copper lead 160 provided over a seed layer 150 and barrier layer 140. Mercer i-fi-19, 25, 26. The Examiner views Mercer's lead 160 as the claimed pillar, and acknowledges that Mercer's lead lacks a curved sidewall at its lowest portion. Final Act. 3. For that feature, the Examiner finds that Kim teaches that providing a bump interconnect with curved sidewalls advantageously reduces undercutting of the under-bump metallurgy. Id. (citing Kim Fig. 2D, col. 2). On that basis, the Examiner reasons that it would have been obvious to one of ordinary skill in the art to modify Mercer's pillar to include lowermost curved sidewalls "to reduce the undercutting of the UBM." Id. Appellants argue that the Examiner's above-noted determination based on Mercer and Kim is erroneous. See App. Br. 13-14; Reply Br. 9- 10. For the following reason, we agree. 3 Appeal2017-003554 Application 12/904,506 Kim teaches that UBM undercutting is reduced by providing an "intermetallic compound layer" between a UBM layer and a solder bump. Kim 5: 51-63. The intermetallic layer is not easily removed by chemical etchant and, therefore, serves as an etching mask resulting in reduced undercutting of the under bump metallurgy. Id. Although Kim depicts a curved solder bump (Fig. 2D), that shape merely results from solder reflow after the UBM layer is etched. Id. at 6: 18-21. The fact that Kim's bump sidewall curvature is formed after UBM etching negates any inference that the curved sidewall reduces undercutting during etching. Id. In light of the foregoing, we are persuaded that the Examiner's finding of a reason, based on Kim, to provide Mercer's copper pillar with a curved lowermost sidewall lacks adequate evidentiary support. Because both Rejections I and II are premised on that erroneous finding, the rejections are not sustained. DECISION The Examiner's decision rejecting claims 1-11 and 21-29 is reversed. REVERSED 4