Ex Parte Kumagai et al

Patent Trial and Appeal BoardApr 28, 2016

13022995 (P.T.A.B. Apr. 28, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 13/022,995 02/08/2011 25944 7590 05/02/2016 OLIFF PLC P.O. BOX 320850 ALEXANDRIA, VA 22320-4850 FIRST NAMED INVENTOR Takashi Kumagai UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. 128560.01 7789 EXAMINER MIDKIFF, AARON ART UNIT PAPER NUMBER 2621 NOTIFICATION DATE DELIVERY MODE 05/02/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): OfficeAction25944@oliff.com jarmstrong@oliff.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte TAKASHI KUMAGAI, HISANOBU ISHIY AMA, KAZUHIRO MAEKA WA, SATORU ITO, TAKASHI FUJISE, JUNICHI KARASA WA, SATORU KODAIRA, TAKA YUKI SAIKI, and HIROYUKI TAKAMIYA Appeal2014-006695 Application 13/022,995 Technology Center 2600 Before HUNG H. BUI, NABEEL U. KHAN, and AARON W. MOORE, Administrative Patent Judges. Per Curiam. DECISION ON APPEAL Appellants 1 seek our review under 35 U.S.C. Â§ 134(a) of the Examiner's final rejection of claims 1-8, 12-18, and 20-21, which are all the claims pending in this appeal. Claims 2 and 14 have been cancelled. We have jurisdiction under 35 U.S.C. Â§ 6(b ). We AFFIRM. 2 1 According to Appellants, the real party in interest is Seiko Epson Corp. App. Br. 1. 2 Our Decision refers to Appellants' Appeal Brief filed January 21, 2014 ("App. Br."); Reply Brief filed May 22, 2014 ("Reply Br."); Examiner's Answer mailed March 28, 2014 ("Ans."); Final Office Action mailed Appeal2014-006695 Application 13/022,995 STATEMENT OF THE CASE Appellants 'Invention Appellants' invention relates to an integrated circuit (IC) device 10 as a display driver for driving a display panel. Spec. i-fi-12--4; Abstract. According to Appellants, the IC device 10 includes one or more voltage booster circuits 92, shown in Figures 1 lA, 12A, 13A, to provide power supply voltages, and is provided with a plurality of circuit blocks CB 1- CBN, shown in Figure 3. Id. i-fi-184--89, 114--127. Claims 1 and 20 are independent. Claim 1 is illustrative of Appellants' invention, as reproduced below: 1. A driver that drives a display panel, the driver compnsmg: a first power supply line; a second power supply line; a first transistor; a second transistor, the first transistor and the second transistor being push-pull connected to a first connection node between the first power supply line and the second power supply line, the first transistor and the second transistor outputting a voltage of one of the first power supply line and the second power supply line to the first connection node by a charge-pump operation using a flying capacitor; a third transistor; a fourth transistor, the third transistor and the fourth transistor being connected to a second connection node between the first power supply line and a third power supply line; first to Nth circuit blocks (N is an integer of two or more) that are disposed along a first direction when a direction from a October 11, 2013 ("Final Act."); and original Specification filed February 8, 2011 ("Spec."). 2 Appeal2014-006695 Application 13/022,995 first side that is a short side of the driver toward a third side opposite to the first side is the first direction and a direction from a second side that is a long side of the driver toward a fourth side opposite to the second side is a second direction; a first interface region that is provided along the second direction between the fourth side and the first to Nth circuit blocks; a second interface region that is provided along the second direction between the second side and the first to Nth circuit blocks; a first pad electrically connected with the first connection node and electrically connected with the flying capacitor; and a second pad electrically connected with the second connection node and electrically connected with the flying capacitor, the third transistor being configured to output a voltage to the second pad via the second connection node; and a third pad electrically connected to a data signal that drives the display panel, the third pad being disposed in the first interface region, the first pad, the first transistor and the second transistor being disposed in the second interface region, the first pad being disposed in an upper layer of at least one of the first transistor and the second transistor so that the first pad overlaps a part or an entirety of at least one of the first transistor and the second transistor, at least one of the first transistor and the second transistor having a drain region, and a contact being disposed between the drain region and the first pad, the drain region and the contact being disposed in a lower layer of the first pad so that the first pad overlaps a part or an entirety of the drain region and the contact. App. Br. A-1-A-2 (Claims App'x). 3 Appeal2014-006695 Application 13/022,995 Chatterjee Aoki Tsuchiya Nojiri Sekiguchi et al. Evidence Considered us 5,517,051 US Pub. No. 2002/0080104 Al US Pub. No. 2002/0105510 Al US 6,489,689 B2 US 7,508,370 B2 Examiner's Rejections May 14, 1996 June 27, 2002 Aug. 8, 2002 Dec. 3, 2002 Mar. 24, 2009 (1) Claims 1-2, 5, 12-18, 20, and 21 stand rejected under 35 U.S.C. Â§ 103(a) as being unpatentable over Tsuchiya, Nojiri, and Aoki. Final Act. 4--16. (2) Claims 3, 4, 6, and 7 stand rejected under 35 U.S.C. Â§ 103(a) as being unpatentable over Tsuchiya, Nojiri, Aoki, Sekiguchi. Id. at 17-19. (3) Claim 8 stands rejected under 35 U.S.C. Â§ 103(a) as being unpatentable over Tsuchiya, Nojiri, Aoki, and Chatterjee. Id. at 19-20. i\.Ni\L YSIS Â§103(a) Rejection of Claims 1-2, 5, 12-18, 20, and 21 based on Tsuchiya, Nojiri, and Aoki With respect to independent claims 1 and 20, the Examiner finds Tsuchiya discloses a driver that drives a display panel, shown in Figures 1 and 8, comprising first and second power supply lines and first through fourth transistors, where the first and second transistors are connected in a push-pull orientation to a first node between the first power supply line and the second power supply line, including an output being connected to a flying capacitor, and the third and fourth transistors are connected to a second node between the first power supply line and a third power supply line. Final Act. 4--5 (citing Tsuchiya, Figs. 1, 8). 4 Appeal2014-006695 Application 13/022,995 The Examiner then relies on Nojiri for teaching the limitations regarding: "a first pad ... ", "a second pad ... ", "the first pad being disposed ... ", "at least one of the first transistor and the second transistor ... ", and "the drain region and the contact being disposed .... " Final Act. 5-7 (citing Nojiri 3:26-33, Figs. 3--4). The Examiner further relies on Aoki for teaching the remaining limitations regarding: "first to Nth circuit blocks ... ", "a first interface region ... ", "a second interface region ... ", "a third pad ... ", and "the first pad, the first transistor and the second transistor ... " to support the conclusion of obviousness. Final Act. 8-9 (citing Aoki i-f 19; Figs. 2-5). Appellants argue the cited references, including Tsuchiya, Nojiri, and Aoki, do not teach or suggest "the first and second transistors are push-pull connected to a first connection node between first and second power supply lines" and "are disposed in a second interface region [input side] of the driver." App. Br. 8. According to Appellants, Tsuchiya discloses a power supply with push-pull connected transistors, but those "transistors are not disposed within the driver integrated circuit" (IC) as required by independent claims 1 and 20. Id. (emphasis added). In addition, Appellants argue there is no motivation to modify Tsuchiya to incorporate features from Aoki because: (1) Tsuchiya and Aoki disclose contrasting power supplies, i.e., Tsuchiya teaches a power supply that steps up a voltage, while Aoki teaches a power supply that steps down the voltage; and (2) Aoki teaches away from the claimed invention because "the first and second transistors for the charge-pump operation [of Aoki] are not provided within the power supply section (e.g., section 7) of Aoki." App. Br. 7-12; Reply Br. 1--4. 5 Appeal2014-006695 Application 13/022,995 We do not find Appellants' arguments persuasive and commensurate with the scope of claims 1 and 20. Rather, we find the Examiner has provided a comprehensive response to Appellants' arguments supported by a preponderance of evidence. Ans. 2---6. As such, we adopt the Examiner's findings and explanations provided therein. Id. For additional emphasis, we note Tsuchiya already discloses a voltage booster circuit in the form of a power supply circuit 10 as part of an IC device, shown in Figure 1, including a push-pull transistor pair connected to a flying capacitor, working with a driver 6, 8, shown in Figure 8. See Tsuchiya, Figs. 1, 8. As a secondary reference, Nojiri is relied upon for teaching a push- pull transistor pair connected to a pad forming one of I/O regions. Ans. 5 (citing Nojiri 3:2-5; Figs. 5A-5B, 22A-24B). As such, Nojiri's pad can be modified to connect the push-pull transistor pair with the flying capacitor of Tsuchiya. As the Examiner recognized, the advantage of doing so is to "provide[ s] for an increased flow of charge[ s] between the pad and transistors below," which Appellants do not dispute. Final Act. 6 (citing Nojiri 3:26-33). Separately, Aoki is relied upon for teaching a driver IC device including a power supply section 7, I/O interfaces, and a plurality of circuit blocks 7-11. Final Act. 8 (citing Aoki i-f 19; Fig. 2 ). Aoki' s Figure 2 is reproduced below with additional markings, inserted in red, for illustration. 6 Appeal2014-006695 Application 13/022,995 ~ 12~ common $lgnu1 cyu wt '*'cUon Pow"< supply s.>ction 7 E"gmâ€¢mt i>ignal m1t utsucli Conlrol !Section 1J S160C81 ~: i 4 Common !li1ln~.J 0' t RAM Pow-er- S<>pp:ly :s-ectton w 1'3 ~ ........... ~ ............ ,_,,... _ _.,..... ---~ .......,,,._ _.,..... Cl.60 ~: - ~ {~ â€¢ â€¢ â€¢ â€¢ ... .. â€¢ .. iyl '''''''''''''''''''''''''"::::::::::::::::::;:;:;:;::;:-_:::::''''''''''''''''''''''''''''''''''"::::::::::::::::::::;~''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''ot''''' Aoki's Figure 2 shows a driver IC device including a power supply section 7, I/O interfaces, and a plurality of circuit blocks 7-11. Based on the teachings of Aoki, Nojiri, and Tsuchiya, we agree with the Examiner that an artisan of ordinary skill would have recognized that the power supply section 7 of Aoki could be substituted with a power supply unit of Tsuchiya, and, similarly, the I/O interfaces of Aoki could also be modified to incorporate the push-pull transistor pair connected to a pad forming one of the I/O regions as taught by Nojiri. The combination of these familiar elements is simply the predictable use of prior art elements according to their established functions. KSR Int 'l Co. v. Teleflex Inc., 550 U.S. 398, 415-16 (2007). Obviousness does not require precise teachings directed to the specific subject matter claimed because inferences and creative steps that a person of ordinary skill in the art would employ can be taken into account. See id. at 418. "Under the correct 7 Appeal2014-006695 Application 13/022,995 [obviousness] analysis, any need or problem known in the field of endeavor at the time of invention and addressed by the patent can provide a reason for combining the elements in the manner claimed." Id. at 420 (emphasis added). Here, the Examiner has provided reasons for making the combination, i.e., connecting the push-pull transistor pair to a pad in an I/O interface region would "provide[ s] for an increased flow of charge[ s] between the pad and transistors below" and disposal "of components (circuit blocks) of the display device of Tsuchiya and Nojiri across an integrated circuit in view of the teaching of Aoki [would overcome] previous spatial limitations of display device packaging" to "reduce the size of the frame of the display." Final Act. 6-8 (citing Nojiri 3:26-33; Aoki i-fi-f 19--20). Appellants have not explained to us why these rationales are insufficient to support the Examiner's conclusion of obviousness. For the reasons set forth above, Appellants have not persuaded us of Examiner error. Accordingly, we sustain the Examiner's obviousness rejection of independent claims 1 and 20, and their respective dependent claims 2-8, 12-18, and 21, which Appellants do not argue separately. CONCLUSION On the record before us, we conclude Appellants have not demonstrated the Examiner erred in rejecting claims 1-8, 12-18, 20, and 21 under 35 U.S.C. Â§ 103(a). 8 Appeal2014-006695 Application 13/022,995 DECISION As such, we AFFIRM the Examiner's final rejection of claims 1-8, 12-18, 20, and 21. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. Â§ 1.136(a)(l )(iv). AFFIRMED 9