Ex Parte KONG et al

Patent Trial and Appeal Board

Sep 13, 2018

13659802 (P.T.A.B. Sep. 13, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/659,802 10/24/2012
102324 7590 09/17/2018
Artegis Law Group, LLP/NVIDIA
7710 Cherry Park Drive Suite T #104
Houston, TX 77095
FIRST NAMED INVENTOR
Xiangyun KONG
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
NVDA/SC-11-0309-US 1058
EXAMINER
VU,KHOA
ART UNIT PAPER NUMBER
2618
NOTIFICATION DATE DELIVERY MODE
09/17/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
kcruz@artegislaw.com
ALGdocketing@artegislaw.com
rsmith @artegislaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte XIANGYUN KONG, JIAN-ZHONG WANG, YUAN LIN,
and VINOD GROVER
Appeal 2017-011114
Application 13/659,802
Technology Center 2600
Before MARC S. HOFF, ELENI MANTIS MERCADER, and
JOHNNY A. KUMAR, Administrative Patent Judges.
KUMAR, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
Appellants 1 appeal under 35 U.S.C. § 134(a) from a final rejection of
claims 1---6, 9-15, and 17-20. The Examiner has indicated that claims 7, 8,
15, and 16 contain allowable subject matter. Final Act. 15. We have
jurisdiction under 35 U.S.C. § 6(b ).
We affirm.
1 The real party in interest is NVIDIA Corporation. App. Br. 3.
Appeal 2017-011114
Application 13/659,802
Rather than reiterate the arguments of the Appellants and the
Examiner, we refer to the Appeal Brief ("App. Br.") filed March 14, 2017,
the Answer ("Ans.") mailed June 30, 2017, and the Reply Brief ("Reply
Br.") filed August 30, 2017, for the respective details. We have considered
in this decision only those arguments Appellants actually raised in the
Briefs. Any other arguments which Appellants could have made but chose
not to make in the Briefs are deemed to be waived. See 37 C.F.R.
§ 4I.37(c)(l)(vii).
THE INVENTION
Appellants' claimed invention is directed to
A device compiler and linker is configured to optimize program
code of a coprocessor enabled application by resolving generic
memory access operations within that program code to target
specific memory spaces. In situations where a generic memory
access operation cannot be resolved and may target constant
memory, constant variables associated with those generic
memory access operations are transferred to reside in global
memory.
Abstract.
Independent claim 1, reproduced below, is representative of the
subject matter on appeal.
1. A computer-implemented method for optimizing program
code for execution on a parallel processing unit (PPU), the method
compnsmg:
identifying a first memory access operation that is associated with a
first pointer, wherein the first memory access operation targets a generic
memory space;
ascending a use-definition chain related to the first pointer;
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Appeal 2017-011114
Application 13/659,802
adding the first pointer to a vector upon determining that the first
pointer is derived from a specific memory space in a non-uniform memory
architecture, wherein the non-uniform memory architecture comprises at
least two different types of memory; and
causing the first memory access operation to target the specific
memory space by modifying at least a portion of the program code.
REFERENCES and REJECTIONS
McKenney et al. US 2004/0205304 Al
(hereinafter "McKenney")
Swamy et al. US 2007/0076010 Al
(hereinafter "Swamy")
Kawahito et al. US 2012/0042306 Al
(hereinafter "Kawahito")
Oct. 14, 2004
Apr. 5, 2007
Feb. 16,2012
Claims 1---6, 10-15, 19, and 20 are rejected under pre-AIA 35 U.S.C.
§ I03(a) as being unpatentable over McKenney in view ofKawahito. Final
Act. 3.
Claims 9 and 18 are rejected under pre-AIA 35 U.S.C. § I03(a) as
being unpatentable over McKenney in view of Kawahito and further in view
of Swamy. Final Act. 14.
ISSUE
The issue is whether the Examiner erred in finding that the
combination of McKenney and Kawahito teaches the limitations of
"modifying at least a portion of the program code," as recited in claim 1.
ANALYSIS
Claim 1 requires "causing the first memory access operation to target
the specific memory space by modifying at least a portion of the program
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Application 13/659,802
code." Appellants argue that "McKenney is silent about any type of
program code modification that changes the target of a memory access
operation from a generic memory space to a specific memory space" (App.
Br. 11-12; Reply Br. 4--5).
In particular, Appellants argue
The Examiner cites to paragraphs [0185]-[0186] and
Tables 1-2 of McKenney as teaching the idea of modifying
program code. See Examiner's Answer at pp. 18-19.
Specifically, the Examiner argues that the pseudocode for
allocating and freeing memory, as described in McKenney, is
modified. See id. Appellants disagree with the Examiner's
reasomng.
First, the cited portions of McKenney disclose
pseudocode, not program code. Importantly, pseudocode is not
a programming language.
Reply Br. 3--4.
We do not agree with Appellants' arguments. We determine claim
scope not solely on the basis of claim language, but also on giving claims
their broadest reasonable construction in light of the specification as it would
be interpreted by one of ordinary skill in the art. In re Am. A cad. of Sci.
Tech. Ctr., 367 F.3d 1359, 1364 (Fed. Cir. 2004). Accordingly, we tum to
Appellants' Specification to ascertain the meaning of the terms "program
code," as recited in claim 1. Appellants' Specification explicitly states:
Persons skilled in the art will understand that pseudocode 600
described above could be easily implemented in a variety of
programming languages. In one embodiment, pseudocode 600
may be implemented in the CUDA TM programming language
and may represent some or all of program code 310.
Spec. ,r 55.
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Application 13/659,802
In other words, Appellants' own Specification describes that
pseudocode and program code are interchangeable, and thus any
modifications that are applied to the pseudocode could be applied to the
program code.
The Examiner finds
In in [sic] Figs. 8, 9, [0100]-[0104], McKenney discloses the
program code ( e.g. pseudo code in Figs. 8, 9) can be used to
locate the correct ( modifying) the kmem_struct_t contains
global state (from a global memory) and an array of pointers to
the per-node kmem_struct_pq_t (access operation to select a
node is pointed by the mg_quad field of the mblk_global_t as a
targeting a memory block). Furthermore, in [O 185] [O 186],
Table 1, Table 2, Mc[K]enney also discloses modifying the
Pseudo Code for memory allocation, freeing memory for access
operation on a selected node corresponding to the desired
memory class (specific memory space) in the global memory
(mblk_global_t pools) e.g. Table 2: Pseudo-code for the free
operation memory homed on the selected node. If there is
space in this CPU's mblk_pereng_t mp_main stack, atomically
push the memory onto it with interrupts disabled and return to
the caller. If stack is empty, move the mp_main stack to the
mp_aux stack, push the memory onto the newly-emptied
mp_main ... Therefore, McKenney teaches the 1st memory
access memory to target ( a node) the specific memory space
( allocate or free memory homed on this node) by modifying at
least a portion of the program code (pseudocode for operation).
Ans. 18-19.
Thus, under the broadest reasonable interpretation consistent with
Appellants' Specification, pseudocode and program code are
interchangeable terms, and therefore, the Examiner's interpretation is
reasonable. Accordingly, we affirm the Examiner's rejection of claim 1.
We also affirm the Examiner's rejections of claims 2---6, 9-15, and 17-20 for
the same reasons.
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DECISION
The Examiner's decision rejecting claims 1-6, 9-15, and 17-20 is
affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv).
AFFIRMED
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