Ex Parte Kinzer

Patent Trial and Appeal BoardDec 31, 2012

11622162 (P.T.A.B. Dec. 31, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ Ex parte DANIEL M. KINZER ____________ Appeal 2010-010285 Application 11/622,162 Technology Center 2800 ____________ Before CARL W. WHITEHEAD, JR., ERIC S. FRAHM, and ANDREW J. DILLON, Administrative Patent Judges. WHITEHEAD, JR., Administrative Patent Judge. DECISION ON APPEAL Appeal 2010-010285 Application 11/622,162 2 STATEMENT OF THE CASE Appellant is appealing claims 1, 4, and 7. Appeal Brief 2. We have jurisdiction under 35 U.S.C. § 6(b) (2012). We reverse. Introduction The invention is directed to a thin film or wafer of sapphire bonded to a polycrystalline silicon carbide substrate in a semiconductor device. Specification 2. Illustrative Claim Claim 1. A substrate for a GaN based semiconductor device; said substrate comprising a polycrystalline silicon carbide wafer having parallel top and bottom surfaces of a given thickness, and a thin sapphire layer atop and in contact with said top surface of said polycrystalline silicon carbide wafer; the top surface of said sapphire layer adapted to receive the layers of a GaN based device having a relatively thick GaN layer, wherein said sapphire layer has a thickness of between 0.1 micron and 1.0 micron. Rejections on Appeal Claim 1 stands rejected under 35 U.S.C. §103(a) as being unpatentable over Faure (U.S. Patent Application Publication Number 2004/0241975 A1; published December 2, 2004) and Letertre (U.S. Patent Application Publication Number 2005/0020031 A1; published January 27, 2005). Answer 3-4. Appeal 2010-010285 Application 11/622,162 3 Claims 4 and 7 stand rejected under 35 U.S.C. §103(a) as being unpatentable over Faure, Letertre, and Waki (U.S. Patent Application Publication Number 2005/0236646 A1; October 27, 2005). Answer 4-8. Issue on Appeal Do Faure, Letertre, and Waki, either alone or in combination, disclose a semiconductor device wherein a thin sapphire layer is atop and in contact with a polycrystalline silicon carbide wafer? ANALYSIS The Examiner finds that Faure discloses a silicon carbide wafer/substrate having a thin sapphire layer atop and in contact with the silicon carbide wafer/substrate because the two insulating layers originally used to bond the sapphire layer to the silicon carbide wafer/substrate may be omitted. Answer 3. Appellant argues that Faure does not “mention a polycrystalline silicon carbide wafer” and fails to disclose “a sapphire layer having a thickness between 0.1 micron and 1.0 micron as specified in claim 1.” Appeal Brief 6. However the Examiner further finds Letertre addresses Faure’s deficiencies by disclosing a polycrystalline silicon carbide wafer/substrate with a thin sapphire layer which has a thickness of about 0.1 micron to 1.0 micron. Answer 4. Appellant argues that Letertre actually “teaches away from a thin sapphire layer atop and in contact with” a top surface of a polycrystalline silicon wafer/substrate as specified in claim 1 because Letertre discloses the employment of an interface layer such as silicon oxide or silicon nitride to Appeal 2010-010285 Application 11/622,162 4 either support the substrate or to provide a bonding surface for the sapphire germination layer. Appeal Brief 8. The Examiner maintains that Faure teaches that the insulating layer is optional therefore Faure discloses a polycrystalline silicon wafer directly in contact with a thin sapphire layer as claimed. Answer 9. However, Appellant contends that: Faure discloses microstructure 13, which preferably includes micro insulator layers 8 and 8' situated between wafer 6 and residual part 7' of former wafer 7. Faure also discloses that in another embodiment, which is not shown, “wafers 6 and 7 are bonded directly so that at least one of the insulator layers 8, 8' can be omitted.” See paragraph [0034] of Faure. However, the aforementioned quoted portion of Faure is unclear, since both of insulator layers 8, 8' would have to be omitted for wafer 6 to be bonded directly to wafer 7. Appeal Brief 8. We find Appellant’s arguments to be persuasive. Faure does not disclose that both insulator layers can be omitted at the same juncture. See Faure, paragraphs [0034] and [0047]. We agree with the Examiner that Faure discloses in [0032] wherein the insulator layers (8 or 8’) employed in the formation of the carrier substrates can be omitted however Faure is ambiguous in disclosing that both insulators can be omitted at the same time. Faure’s statement that “wafers 6 and] 7 are bonded directly so that at least one of the insulator layers 8, 8' can be omitted” does not indicate that both insulating layers can be omitted at the same time contrary to the Examiner’s findings. See Faure, paragraph [0034]. Therefore we find that Faure does not disclose removing both of the insulating layers so that the sapphire layer is directly bonded to the silicon carbide wafer/substrate. Letertre does not Appeal 2010-010285 Application 11/622,162 5 address Faure’s deficiency in regard to the omission of the insulating layers and therefore we reverse the Examiner’s rejection of claim 1. We also reverse the Examiner’s rejection of claims 4 and 7 because Waki does not address the deficiency of the combination of Faure and Letertre in regard to the omission of the insulating layers. DECISION The rejections of claims 1, 4, and 7 are reversed. REVERSED llw