Ex Parte Joshi et al

Patent Trial and Appeal BoardSep 17, 2012

11461998 (P.T.A.B. Sep. 17, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 11/461,998 08/02/2006 Amol Ramesh Joshi 0180383 4565 16397 7590 09/17/2012 Farjami & Farjami LLP 26522 La Alameda Ave. Suite 360 Mission Viejo, CA 92691 EXAMINER GUMEDZOE, PENIEL M ART UNIT PAPER NUMBER 2891 MAIL DATE DELIVERY MODE 09/17/2012 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ Ex parte AMOL RAMESH JOSHI, MENG DING, and TAKASHI ORIMOTO ____________ Appeal 2010-000489 Application 11/461,998 Technology Center 2800 ____________ Before JOSEPH F. RUGGIERO, ERIC B. CHEN, and BRUCE R. WINSOR, Administrative Patent Judges. WINSOR, Administrative Patent Judge. DECISION ON APPEAL Appeal 2010-000489 Application 11/461,998 2 Appellants appeal under 35 U.S.C. § 134(a) from a Final Rejection of claims 1-20, which constitute all the claims pending in this application. We have jurisdiction under 35 U.S.C. § 6(b). We reverse and institute a new ground of rejection within the provisions of 37 C.F.R. § 41.50(b). RELATED APPEALS We note that Appellants’ Specification identifies two related co- pending patent applications (Spec. 1:3-13). Only one of the related applications has been identified in the Specification by application number. The other is identified by title, inventive entity, and assignee. Although not identified by Appellants (Br. 2) or the Examiner (Ans. 2), our review indicates that both of the related applications are the subject of co-pending related appeals: Application 11/277,008 Appeal 2011-011507 Application 11/462,009 Appeal 2011-007174 STATEMENT OF THE CASE Appellants’ invention relates to non-volatile memory systems. (Spec 1:15-16). Claim 1, which is illustrative of the invention, reads as follows (with the disputed limitation emphasized): Claim 1: A memory cell manufacturing method comprising: forming a first insulator layer over a semiconductor substrate; forming a first intermediate layer including silicon over the first insulator layer; Appeal 2010-000489 Application 11/461,998 3 forming a charge trap layer on the first intermediate layer; forming a second intermediate layer over the charge trap layer; and forming a second insulator layer from an upper portion of the second intermediate layer. The Examiner relies on the following prior art in rejecting the claims: Bass US 4,870,470 Sept. 26, 1989 Mori US 5,304,829 Apr. 19, 1994 Chen ‘5691 US 5,739,569 Apr. 14, 1998 Bhattacharyya US 6,784,480 B2 Aug. 31, 2004 Claims 1-6, 8, 10-16, 18, and 20 stand rejected under 35 U.S.C. § 103(a) as unpatentable over Mori and Chen ‘569. (Ans. 3-5, 7). Claims 7 and 17 stand rejected under 35 U.S.C. § 103(a) as unpatentable over Mori, Chen ‘569, and Bass. (Ans. 6-7). Claims 9 and 19 stand rejected under 35 U.S.C. § 103(a) as unpatentable over Mori, Chen ‘569, and Bhattacharyya. (Ans. 6-7). Rather than repeat the arguments here, we refer to the Brief (“Br.”) and the Answer (“Ans.”) for the respective positions of Appellants and the Examiner. Only those arguments actually made by Appellants have been considered in this decision. Arguments that Appellants did not make in the Brief have not been considered and are deemed to be waived. See 37 C.F.R. § 41.37(c)(1)(vii). ISSUE The dispositive issue raised by Appellants’ contentions2 is as follows: 1 Chen ‘569 is referred to in the record as “Chen.” Appeal 2010-000489 Application 11/461,998 4 Does the combination of Mori and Chen ‘569 teach or suggest “forming a charge trap layer on the first intermediate layer,” as recited in claim 1? ANALYSIS The Examiner explains the obvious combination of Mori and Chen ‘569 that renders claim 1 unpatentable as follows: [T]he structure obtained by the combination of Mori et al. in view of Chen [‘569] . . . would have a stack of layers comprising (from bottom up): a first insulator layer (oxide 12) in direct contact with a first intermediate layer (nitride 16 of Chen [‘569]) which would be in direct contact with a top oxide (oxide 18 of Chen [‘569]) which would be in direct contact with the charge trapping layer (layer 13 of Mori et al.). Consequently, the said charge trapping layer 13 would be on (in the sense defined by Appellant) the said first intermediate layer, since there is direct contact among the elements (i.e. the layers) forming the structure. (Ans. 9-10). Appellants contend (Br. 9-10) that in light of the express definition of “on” given in Specification (see Spec. 4:20-21) the limitations of claim 1 are not met by the combination described by the Examiner because there is not direct contact between the claimed first intermediate layer (i.e., corresponding to the nitride 16 of Chen ‘569) and the claimed charge trapping layer (i.e., corresponding to the layer 13 of Mori) due to the top 2 Appellants’ contentions raise additional issues. However, we are persuaded of Examiner error with regard to the identified issue, and it is dispositive of the appeal. Accordingly, we do not reach the additional issues raised by Appellants’ contentions. Appeal 2010-000489 Application 11/461,998 5 oxide (i.e., corresponding to the oxide 18 of Chen ‘569) between the first intermediate layer and the charge trapping layer. Appellants’ Specification defines “on” as follows: “The term ‘on’ means there is direct contact among elements.” (Spec. 4:20-21). In construing “on”, the Examiner states that “the word ‘on’ as defined by Appellant[s] only requires direct contact among elements of a structure.” (Ans. 9 (emphasis added)). We disagree with the Examiner’s claim construction. One of ordinary skill in the art would understand Appellants’ definition of the preposition “on” to require direct contact among the elements interrelated by the proposition. In this case, the preposition “on” interrelates the “charge trap layer” and the “first intermediate layer” and requires that the charge trap layer be “on”, i.e., in direct contact with, the first intermediate layer. We find that the structure described by the Examiner (Ans. 3-4, 9-10) does not meet the limitations of claim 1 because the top oxide layer (i.e., the oxide 18 of Chen ‘569) prevents direct contact between the first intermediate layer (i.e. the nitride 16 of Chen ‘569) and the charge trapping layer (i.e. the layer 13 of Mori). We conclude that the Examiner has erred by basing the rejection of claim 1 on an erroneous claim construction. Accordingly we will not sustain the rejection of (1) independent claim 1; (2) independent claims 6 and 11, the rejections of which were based on the claim construction we conclude is erroneous (see Ans. 5, 7-10); and (3) claims 2-5, 7-10,3 and 12-20, which depend from claims 1, 6, and 11, respectively. 3 Although we reverse the rejection of claims 9 and 19, we note that we find Appellants’ contention that Bhattacharyya teaches away from the Appeal 2010-000489 Application 11/461,998 6 NEW GROUND OF REJECTION WITHIN 37 C.F.R. § 41.50(b) Claim 1 is rejected on a new ground of rejection under 35 U.S.C. § 103(a) as unpatentable over Chen ‘944 (US 2005/0199944 A1; Sept. 15, 2005)4 and Mori. As an initial matter we construe the term “layer” in claim 1. [T]he [US]PTO applies to the verbiage of the proposed claims the broadest reasonable meaning of the words in their ordinary usage as they would be understood by one of ordinary skill in the art, taking into account whatever enlightenment by way of definitions or otherwise that may be afforded by the written description contained in the applicant’s specification. In re Morris, 127 F.3d 1048, 1054 (Fed. Cir. 1997). “Though understanding the claim language may be aided by the explanations contained in the written description, it is important not to import into a claim limitations that are not a part of the claim.” SuperGuide Corp. v. DirecTV Enters., Inc., 358 F.3d 870, 875 (Fed. Cir. 2004). A layer is “one thickness, course, or fold laid or lying over or under another,” MERRIAM-WEBSTER’S COLLEGIATE DICTIONARY 660 (10th ed. 1999) (emphasis added), “stratum” (id.). We conclude that the broadest reasonable meaning of “layer” encompasses, inter alia, a thickness that is uniform in composition and a thickness that is non-uniform, as well as a thickness that is laid in a discrete process resulting in definite upper and combination articulated by the Examiner to be unpesuasive. “[A] disclosure . . . does not constitute a teaching away . . . [if] such disclosure does not criticize, discredit, or otherwise discourage the solution claimed.” In re Fulton, 391 F.3d 1195, 1201 (Fed. Cir. 2004). 4 Chen ‘944 was cited in related Application 11/462,009. Appeal 2010-000489 Application 11/461,998 7 lower boundaries, and a thickness that is laid as a part of a varying continuous process resulting in multiple thicknesses. “Layer” also encompasses a thickness that is made by altering a portion of another thickness. Chen ‘944 teaches “a memory cell manufacturing method” (see generally Chen ‘944). Chen ‘944’s memory cell manufacturing process teaches forming a first insulator layer (Chen ‘944, Fig. 5, Ref. 102), over a semiconductor substrate (Chen ‘944, Fig. 5, Ref. 100). Chen ‘944 teaches “forming a first intermediate layer including silicon over the first insulator layer[,] forming a charge trap layer on the first intermediate layer[, and] forming a second intermediate layer over the charge trap layer (Chen ‘944, Fig. 5, Ref. 114; ¶¶ [0044]-[0045], [0061]). Although Chen ‘944 denominates trapping layer 114 as a “two stage graded layer” (id. at ¶ [0044]), we look to the reference for all it would have taught to one of ordinary skill in the art, In re Fritch, 972 F.2d 1260, 1264 (Fed. Cir. 1992), rather than the vocabulary and semantics employed by the reference, In re Bond, 910 F.2d 831, 832 (Fed. Cir. 1990). Under the broadest reasonable interpretation of “layer,” Chen ‘944’s trapping layer teaches three thicknesses (i.e., layers) in direct contact with each other. One of ordinary skill in the art would have recognized that Chen ‘944’s trapping layer 114 comprises: (1) a lower thickness (i.e., “first intermediate layer”) or portion in which the silicon/nitrogen composition ratio increases from the bottom side located over and in direct contact with Chen ‘944’s tunnel dielectric layer 102 toward a middle portion; (2) a middle thickness (i.e., “charge trapping layer”) or middle portion located over and in direct contact with the lower thickness, which has a higher Appeal 2010-000489 Application 11/461,998 8 silicon content than either the lower or upper thicknesses or portions; and (3) an upper thickness (i.e., “second intermediate layer” ) or portion located on and in direct contact with the middle thickness, in which the silicon/nitrogen concentration decreases from the middle portion toward Chen ‘944’s barrier dielectric layer 106. (Chen ‘944, Fig. 4; ¶¶ [0044]-[0045]). Chen ‘944 teaches a second insulator layer (Chen ‘944, Fig. 5, Ref. 106) formed over the second intermediate layer. Chen ‘944 teaches all of the limitations of claim 1 except that Chen ‘944 does not teach “forming [the] second insulator layer from an upper portion of the second intermediate layer.” Mori teaches forming a silicon oxide film 15 (i.e., “second oxide film”) by oxidizing the upper portion of an underlying silicon nitride layer (i.e., “second intermediate layer”). (Mori Fig. 4, Refs. 14, 15; col. 8, ll. 11-37; col. 9, ll. 5-8). Chen ‘944 and Mori are both in the same field of endeavor, non- volatile memory devices (see Chen ‘944, Abstract; Mori, Abstract), and are, therefore, analogous art. It would have been obvious to a person of ordinary skill in the art to utilize Mori’s process for forming an insulating layer from the upper portion of the underlying layer in Chen ‘944’s memory cell manufacturing method in order to produce a high quality film and enhance the charge retaining property of the film (Mori, col. 8, ll. 26-29). ORDER The decision of the Examiner to reject claims 1-20 is reversed. Appeal 2010-000489 Application 11/461,998 9 We enter a new ground of rejection for claim 1 under 35 U.S.C. § 103(a).5 This decision contains new grounds of rejection pursuant to 37 C.F.R. § 41.50(b). Section 41.50(b) provides that “[a] new ground of rejection . . . shall not be considered final for judicial review.” Section 41.50(b) also provides that Appellants, WITHIN TWO MONTHS FROM THE DATE OF THE DECISION, must exercise one of the following two options with respect to the new ground of rejection to avoid termination of the appeal as to the rejected claims: (1) Reopen prosecution. Submit an appropriate amendment of the claims so rejected or new evidence relating to the claims so rejected, or both, and have the matter reconsidered by the examiner, in which event the proceeding will be remanded to the examiner. . . . (2) Request rehearing. Request that the proceeding be reheard under § 41.52 by the Board upon the same record. 37 C.F.R. § 41.50(b). No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1). See 37 C.F.R. § 1.136(a)(1)(iv) (2010). REVERSED 37 C.F.R. § 41.50(b) 5 We leave to the Examiner to enter such rejections of claims 2-20 under 35 U.S.C. § 103(a) as unpatentable over Chen ‘944 and Mori, alone or in combination with other references, as may be appropriate. We also leave to the Examiner to ascertain whether any of claims 1-20 should be provisionally rejected over the claims of Application 11/462,009 under the judicially created doctrine of obviousness-type double patenting. See MPEP § 804 (8th ed., 2001, rev. 2010) Appeal 2010-000489 Application 11/461,998 10 babc