Ex Parte HAGHIGHI et al

Patent Trials and Appeals Board

Feb 13, 2019

14561204 - (D) (P.T.A.B. Feb. 13, 2019)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
14/561,204 12/04/2014
124044 7590 02/15/2019
Renaissance IP Law Group LLP (SSI)
1500 NW Bethany Blvd. Suite 200
Beaverton, OR 97006
FIRST NAMED INVENTOR
Siamack HAGHIGHI
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
1535-108 9495
EXAMINER
THAI,TUANV
ART UNIT PAPER NUMBER
2135
NOTIFICATION DATE DELIVERY MODE
02/15/2019 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
pto@renaissanceiplaw.com
dkt@renaissanceiplaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte SIAMACK HAGHIGHI and ROBERT BRENNAN
Appeal 2018-004363
Application 14/561,204
Technology Center 2100
Before ROBERT E. NAPPI, JOHN P. PINKERTON, and
STEVEN M. AMUNDSON, Administrative Patent Judges.
AMUNDSON, Administrative Patent Judge.
DECISION ON APPEAL
Appellants 1 seek our review under 35 U.S.C. § 134(a) from a final
rejection of claims 1-20 and 41-50, i.e., all pending claims. We have
jurisdiction under 35 U.S.C. § 6(b ).
We reverse.
STATEMENT OF THE CASE
The Invention
According to the Specification, the invention "relates to data storage,
and more specifically to the storage of data within a heterogeneous memory
1 Appellants identify the real party in interest as Samsung Electronics
Co., Ltd. App. Br. 1.
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Application 14/561,204
system." Spec. ,r 2. 2 The Specification explains that a "processor may be
configured to perform a data access on data stored" in a "heterogeneous
memory system" that "include[ s] a plurality of types of storage mediums"
based on different memory technologies and having different performance
characteristics. Id. at 46 (Abstract); see id. ,r,r 5-7, 28-29. The
Specification also explains that a "memory interconnect may be configured
to route the data access from the processor to at least one of the storage
mediums based, at least in part, upon the one or more performance
characteristic associated with the respective memory technologies of the
storage media." Id. at 46 (Abstract); see id. ,r,r 5-7. The Specification notes
that the different memory technologies "include both volatile and
non-volatile storage mediums," such as "DRAM, Phasechange RAM
(PRAM), NAND or flash memory (e.g., SSD, etc.), Resistive RAM
(RRAM), Magnetoresistive RAM (MRAM), magnetic memory ( e.g.,
a HDD, etc.), etc." Id. ,r,r 5, 28.
Exemplary Claim
Independent claim 1 exemplifies the claims at issue and reads as
follows (with formatting added for clarity):
1. An apparatus comprising:
a processor configured to perform a data access on data
stored in a memory system;
a heterogeneous memory system comprising a plurality
of storage devices,
2 This decision uses the following abbreviations: "Spec." for the
Specification, filed December 4, 2014; "Final Act." for the Final Office
Action, mailed April 10, 2017; "App. Br." for the Appeal Brief, filed
November 14, 2017; "Ans." for the Examiner's Answer, mailed January 17,
2018; and "Reply Br." for the Reply Brief, filed March 19, 2018.
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Application 14/561,204
wherein the plurality of storage devices comprise a
plurality of types of storage devices,
wherein each type of storage device is based upon
a respective memory technology and
wherein each respective memory technology is
associated with one or more technology-based,
physical performance characteristics, and
wherein the heterogeneous memory system
comprises at least one-volatile [sic] storage
devices; and
a memory interconnect configured to:
locally route the data access from the processor to
at least one of the storage devices based, at least in
part, upon the one or more performance
characteristic associated with the respective
memory technologies of the storage media, and
communicate with each of the storage devices via
a native protocol employed by the respective
storage device.
App. Br. 64 (Claims App.).
The Prior Art Supporting the Rejections on Appeal
As evidence ofunpatentability under 35 U.S.C. § 103, the Examiner
relies on the following prior art:
Lolayekar et al. US 2003/0079019 Al Apr. 24, 2003
("Lo layekar")
Kim US 2003/0221033 Al Nov. 27, 2003
Pandey et al. US 2009/0313445 Al Dec. 1 7, 2009
("Pandey")
Gillingham et al. US 2010/0115172 Al May 6, 2010
("Gillingham")
Bouvier US 2010/0125677 Al May 20, 2010
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Application 14/561,204
Schuette et al.
("Schuette")
US 2010/0325352 Al Dec. 23, 2010
Huang et al. US 2011/0188210 Al Aug. 4, 2011
("Huang")
Dolan et al. US 9,037,548 Bl May 19, 2015
("Dolan") (filed June 30, 2011)
IEEE 100 THE AUTHORITATIVE DICTIONARY OF IEEE STANDARDS TERMS
(7th ed. 2000) ("IEEE")
MICROSOFT COMPUTER DICTIONARY (5th ed. 2002) ("MICROSOFT")
Ravi Budruk, PC! Express Basics, MindShare, Inc. (2007) ("Budruk")
The Rejections on Appeal
Claims 1-20 and 41-50 stand rejected under 35 U.S.C. § 112(b) as
indefinite for failing to particularly point out and distinctly claim the subject
matter regarded as the invention. Final Act. 2---6.
Claims 1, 4---6, 8-10, 46, 48, and 50 stand rejected under 35 U.S.C.
§ 103 as unpatentable over Lolayekar, Gillingham, Applicants' Admitted
Prior Art ("AAP A"), MICROSOFT, and IEEE. Final Act. 7-11.
Claims 2, 3, and 47 stand rejected under 35 U.S.C. § 103 as
unpatentable over Lolayekar, Gillingham, AAP A, Budruk, MICROSOFT, and
IEEE. Final Act. 11-12.
Claim 7 stands rejected under 35 U.S.C. § 103 as unpatentable over
Lolayekar, Gillingham, AAP A, Dolan, MICROSOFT, and IEEE. Final Act.
12-13.
Claims 11-13 stand rejected under 35 U.S.C. § 103 as unpatentable
over Lolayekar, Gillingham, MICROSOFT, and IEEE. Final Act. 13-15.
Claims 14 and 15 stand rejected under 35 U.S.C. § 103 as
unpatentable over Lolayekar, Gillingham, Schuette, MICROSOFT, and IEEE.
Final Act. 15-16.
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Application 14/561,204
Claims 16, 17, and 19 stand rejected under 35 U.S.C. § 103 as
unpatentable over Lolayekar, MICROSOFT, and IEEE. Final Act. 16-18.
Claim 18 stands rejected under 35 U.S.C. § 103 as unpatentable over
Lolayekar, Bouvier, MICROSOFT, and IEEE. Final Act. 18.
Claim 20 stands rejected under 35 U.S.C. § 103 as unpatentable over
Lolayekar, Schuette, MICROSOFT, and IEEE. Final Act. 18-19.
Claims 41, 42, and 49 stand rejected under 35 U.S.C. § 103 as
unpatentable over Lolayekar, Gillingham, AAP A, Schuette, Huang,
MICROSOFT, and IEEE. Final Act. 19-20.
Claim 43 stands rejected under 35 U.S.C. § 103 as unpatentable over
Lolayekar, Gillingham, AAPA, Schuette, Pandey, MICROSOFT, and IEEE.
Final Act. 20-21.
Claim 44 stands rejected under 35 U.S.C. § 103 as unpatentable over
Lolayekar, Gillingham, AAPA, Dolan, and Huang. Final Act. 21-22.
Claim 45 stands rejected under 35 U.S.C. § 103 as unpatentable over
Lolayekar, Gillingham, AAPA, Dolan, Huang, Kim, MICROSOFT, and IEEE.
Final Act. 22-23.
ANALYSIS
We have reviewed the rejections of claims 1-20 and 41-50 in light of
Appellants' arguments that the Examiner erred. Based on the record before
us and for the reasons explained below, we concur with Appellants'
contention that the Examiner erred in concluding that the claims fail to
satisfy § 112 's definiteness requirement. We also concur with Appellants'
contention that the Examiner erred in finding that the cited portions of
Lolayekar teach or suggest locally routing data accesses from a processor to
a storage device as required by each independent claim.
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The§ l 12(b) Rejection of Claims 1-20 and 41-50
INTRODUCTION
Section 112(b) requires that the specification "conclude with one or
more claims particularly pointing out and distinctly claiming the subject
matter which the inventor or a joint inventor regards as the invention."
35 U.S.C. § 112(b ).
Due to the need for "particular[ity ]" and "distinct[ ness ]," claim
language that "is ambiguous, vague, incoherent, opaque, or otherwise
unclear in describing and defining the claimed invention" warrants a
rejection under§ 112(b). In re Packard, 751 F.3d 1307, 1311, 1313
(Fed. Cir. 2014); see Ex parte McAward, Appeal 2015-006416, 2017 WL
3669566, at *5 (PTAB Aug. 25, 2017) (precedential); see also In re
Warmerdam, 33 F.3d 1354, 1361 (Fed. Cir. 1994) (explaining that "[t]he
legal standard for definiteness is whether a claim reasonably apprises those
of skill in the art of its scope").
THE EXAMINER'S POSITION
The Examiner maintains that three claim terms are unclear: "locally
route," "native protocol," and "non-frame-based, non-packet-based
protocol." Ans. 24--29; see Final Act. 3---6. For "locally route" and "native
protocol," the Examiner concludes that the terms fail to satisfy§ 112's
definiteness requirement because the Specification fails to define the "metes
and boundary" of either term. Final Act. 3--4; see Ans. 24--26, 27-28. For
"non-frame-based, non-packet-based protocol," the Examiner reasons that
(1) "the terms frame and/or packet can be broadly and reasonably interpreted
as an amount of data" and (2) a "data packet is an amount of data being
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transfer with any type of protocol." Final Act. 6; Ans. 27 (emphasis
omitted).
APPELLANTS' POSITION
Appellants argue that the Specification's failure to define the terms at
issue does not render them unclear because they must be given their plain
meaning in light of the Specification. App. Br. 50-51 (citing MPEP
§ 2111.0l(I)), 53-55; Reply Br. 56-57 (citing MPEP § 2111.0l(I)), 59-61.
Further, for "locally route," Appellants cite the Specification and
assert that those skilled in the art "would understand actions or events that
occur 'locally' (e.g., 'locally route the data access') as occurring within the
'particular place, area, [or] location' of a single computer." App. Br. 53
(citing Spec. ,r,r 27, 69, 114); Reply Br. 60 (citing Spec. ,r,r 27, 69, 114).
Appellants contend that Lolayekar evidences a skilled artisan's
understanding because "Lolayekar uses the term 'local' regarding actions
taken within a single machine," but does not define the term. App. Br. 17,
53 (citing Lolayekar ,r 62); Reply Br. 19-20, 61 (citing Lolayekar ,r 62).
For "native protocol," Appellants assert that (1) "[t]he specification
teaches that [a] memory management unit/controller translates data accesses
(e.g., reads, writes, etc.) from the generic, technology-neutral protocol of the
processor interface 202 to the 'specific', technology-specific, native protocol
of the storage devices," and (2) "[l]ikewise, the term 'native' distinguishes
from generic, technology-neutral Ethernet or Fibre Channel protocols used
by the cited art." App. Br. 60; Reply Br. 67. According to Appellants, "one
skilled in the art would understand the term 'native' in light of the
specification's use of the term 'specific'." App. Br. 60; Reply Br. 67.
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For "non-frame-based, non-packet-based protocol," Appellants assert
that "one skilled in the art of computer-based communication would
recognize the term 'packet' to have special meaning, especially in
conjunction with the word 'protocol'." App. Br. 54; Reply Br. 62.
Appellants contend that Lolayekar evidences a skilled artisan's
understanding by describing various frame-based or packet-based protocols,
including "'Fibre Channel or Gigabit Ethernet ( carrying packets in
accordance with the iSCSI protocol)' (i-f [0040]), 'Packet over SO NET (PoS)
or 10 Gigabit Ethernet' (i-f 0044]), and 'TCP packet' (i-f [0078]." App.
Br. 55; Reply Br. 62.
DISCUSSION
We agree with Appellants that the terms at issue viewed in light of the
Specification satisfy§ 112's definiteness requirement. For instance, as
Appellants assert, those skilled in the art would understand "locally route" as
occurring within a single computer. See, e.g., Spec. ,r,r 69, 114; see also
App. Br. 53; Reply Br. 60-61; Lolayekar ,r 62. The Specification supports
that understanding by explaining that a memory interconnect may "facilitate
some local traffic operations such as peer to peer communication between
two sub-system memory types," i.e., sub-system memory types within a
single computer. Spec. ,r 69, Figs. 3a-3c.
Because the terms at issue viewed in light of the Specification satisfy
§ 112's definiteness requirement, we do not sustain the§ 112(b) rejection of
claims 1-20 and 41-50. 3
3 In the event of further prosecution, the Examiner should consider the
propriety of a rejection under 35 U.S.C. § 112(b) due to the lack of
antecedent basis for the term "the storage media" in claim 1.
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The§ 103 Rejections of Claims 1,
4-6, 8-13, 16, 17, 19, 46, 48, and 50
INDEPENDENT CLAIMS 1, 11, AND 16
Appellants argue that the Examiner erred in rejecting independent
claims 1, 11, and 16 because Lolayekar does not teach or suggest the
following limitation in claim 1 and similar limitations in claims 11 and 16:
"a memory interconnect configured to: locally route the data access from the
processor to at least one of the storage devices." See App. Br. 16-19, 33,
44--45; Reply Br. 19-23, 39, 50-51. In particular, Appellants contend that
claim 1 "claims an apparatus -- a single device -- that routes data between
portions of the single device (i.e., locally)." App. Br. 16; Reply Br. 19.
Appellants seek to distinguish claim 1 and the other independent claims
from Lolayekar by asserting that (1) "Lolayekar is a distributed system that
routes data between devices via a network" and (2) "Lolayekar's purpose is
to send or route data from a server to a storage pool that is remote to the
server." App. Br. 16-17, 33, 44 (emphasis omitted); Reply Br. 19-20, 39,
50 ( emphasis omitted). Appellants add that "[ r ]estricting Assignee's claims
to a local context, as is clearly in the claims, means that pieces of cited art,
like Lolayekar, that communicate over remote distances (e.g., via a network,
or more specifically a Storage Area Network) cannot be shown to meet
Assignee's limitations." Reply Br. 23.
The Examiner finds that Lolayekar discloses "intelligent storage
switch appliance logic [that] provides interconnect among requesters and
storage" and "provides interconnection/ inter-card connection among
Ethernet connections for transferring data/ global and/or local." Final
Act. 7, 13, 17 (citing Lolayekar,r,r 13-19, 40-60, Fig. 5). Further, the
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Application 14/561,204
Examiner finds that in Lolayekar "data is routed among storage devices local
and/or remote." Ans. 30.
Based on the record before us, we agree with Appellants that the
Examiner has not adequately explained how the cited portions of Lolayekar
teach or suggest locally routing data accesses from a processor to a storage
device as required by each independent claim.
Lolayekar discloses a plurality of servers, a plurality of storage
switches, and a plurality of storage devices connected over a network.
Lolayekar ,r,r 12-19, 40-50, Figs. 2--4. Lolayekar's Figure 2 is reproduced
below:
servers
Fig. 2
Figure 2 illustrates a storage-area network (SAN) with a plurality of servers,
a plurality of storage switches, and a plurality of storage devices. Id. ,r,r 26,
40--43; see id. ,r 12.
Lolayekar explains that the connections between the servers and the
storage switches "can utilize any protocol, although in one embodiment the
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connections are either Fibre Channel or Gigabit Ethernet." Id. ,r 40.
Lolayekar similarly explains that the connections between the storage
switches and the storage devices "can utilize any protocol, although in one
embodiment the connections are either Fibre Channel or Gigabit Ethernet."
Id. ,r 41. Thus, data accesses from processors to storage devices involve
remote routing over a network, not local routing within a single computer.
For claims 1, 11, and 16, the Examiner does not rely on any secondary
reference----Gillingham, AAP A, MICROSOFT, or IEEE-----to teach or suggest
locally routing data accesses from a processor to a storage device. See Final
Act. 7-8, 13-14, 16-17; Ans. 30. Hence, we do not sustain the§ 103
rejections of claims 1, 11, and 16.
DEPENDENT CLAIMS 4--6, 8-10, 12, 13, 17, 19, 46, 48, AND 50
Claims 4--6, 8-10, 46, 48, and 50 depend from claim 1; claims 12
and 13 depend from claim 11; and claims 1 7 and 19 depend from claim 16.
For the reasons discussed above for the independent claims, we do not
sustain the § 103 rejections of these dependent claims.
The§ 103 Rejections of Claims 2-5,
7, 14, 15, 18, 20, 41-45, 47, and 49
Claims 2-5, 7, 41--45, 47, and 49 depend from claim 1; claims 14
and 15 depend from claim 11; and claims 18 and 20 depend from claim 16.
On this record, the Examiner has not shown how the additionally cited
secondary references-Budruk, Dolan, Schuette, Bouvier, Huang, Pandey,
and Kim----overcome the deficiency in Lolayekar discussed above for the
independent claims. Hence, we do not sustain the § 103 rejections of these
dependent claims.
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Because this determination resolves the appeal with respect to
claims 1-20 and 41-50, we do not address Appellants' other arguments
regarding Examiner error. See, e.g., Beloit Corp. v. Valmet Oy, 742 F.2d
1421, 1423 (Fed. Cir. 1984) (explaining that an administrative agency may
render a decision based on "a single dispositive issue").
DECISION
We reverse the Examiner's decision to reject claims 1-20 and 41-50.
REVERSED
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