Ex Parte Greb et alDownload PDFPatent Trial and Appeal BoardDec 30, 201611949830 (P.T.A.B. Dec. 30, 2016) Copy Citation United States Patent and Trademark Office UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O.Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 11/949,830 12/04/2007 Karl F. Greb TI-64379 5474 23494 7590 01/04/2017 TEXAS INSTRUMENTS INCORPORATED P O BOX 655474, M/S 3999 DALLAS, TX 75265 EXAMINER LUBIT, RYAN A ART UNIT PAPER NUMBER 2696 NOTIFICATION DATE DELIVERY MODE 01/04/2017 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): uspto@ti.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte KARL F. GREB and NICHOLAS H. SCHUTT Appeal 2015-006518 Application 11/949,830 Technology Center 2600 Before MAHSHID D. SAADAT, JAMES W. DEJMEK, and STEVEN M. AMUNDSON, Administrative Patent Judges. AMUNDSON, Administrative Patent Judge. DECISION ON APPEAL Appellants1 seek our review under 35 U.S.C. § 134(a) from a final rejection of claims 1, 2, 6, 8, 9, 12, 15, and 16, i.e., all pending claims. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. STATEMENT OF THE CASE The Invention According to the Specification, the invention relates to “display drivers, and more particularly to approaches for utilizing single display 1 According to Appellants, the real party in interest is Texas Instruments Incorporated. App. Br. 3. Appeal 2015-006518 Application 11/949,830 driver chips to drive multiple displays.” Spec. Tflf 1,4, 25.2 In an embodiment of the invention, “a display system . . . includes a display driver, a processor, a computer readable medium, and a splitter device,” where the display driver provides “a display output set for a virtual display,” and the splitter device provides “a first display output to drive a first display and a second display output to drive a second display based on the portion of the display output set.” Abstract. Exemplary Claim Claim 1 exemplifies the subject matter of the claims under consideration and reads as follows, with italics identifying the limitations at issue in claim 1: 1. A multi-display driver system, wherein the multi-display driver system includes: a display driver, wherein the display driver provides a display output set, wherein the display output set includes a virtual vertical sync; a processor and a computer readable medium, where the computer readable medium includes instructions executable by the processor to: configure the display driver to provide the display output set for a virtual display; and a splitter device, wherein the splitter device is operable to: receive at least a portion of a display output set; 2 This decision employs the following abbreviations: “Spec.” for the Specification, filed December 4, 2007; “Final Act.” for the Final Office Action, mailed September 9, 2014; “Adv. Act.” for the Advisory Action, mailed November 13, 2014; “App. Br.” for the Appeal Brief, filed February 9, 2015; “Ans.” for the Examiner’s Answer, mailed April 20, 2015; and “Reply Br.” for the Reply Brief, filed June 19, 2015. 2 Appeal 2015-006518 Application 11/949,830 based on the portion of the display output set, provide a first display output to drive a first display and a second display output to drive a second display, wherein the display output set includes display data, and wherein the splitter device includes a first FIFO memory for storing a first portion of the display data for the first display and a second FIFO memory for storing a second portion of the display data for the second display, assert a first vertical sync for the first display upon a first assertion of the virtual vertical sync, and assert a second vertical sync for the second display upon a second assertion of the virtual vertical sync. Br. 14 (Claims App.). The Prior Art Supporting the Rejection on Appeal Hogle IV (“Hogle”) US 5,923,307 July 13, 1999 Lai US 2007/0024524 A1 Feb. 1, 2007 Ma US 2007/0188406 A1 Aug. 16, 2007 The Rejection on Appeal Claims 1, 2, 6, 8, 9, 12, 15, and 16 stand rejected under 35 U.S.C. § 103(a) as unpatentable over Hogle, Lai, and Ma. Final Act. 7—23; App. Br. 9. ANALYSIS We have reviewed the rejection of claims 1, 2, 6, 8, 9, 12, 15, and 16 in light of Appellants’ arguments that the Examiner erred. For the reasons explained below, we are not persuaded by Appellants’ arguments. We adopt as our own the Examiner’s findings in the Final Office Action and Answer and add the following primarily for emphasis. 3 Appeal 2015-006518 Application 11/949,830 The Rejection of Claims 1 and 12 Under 35 U.S.C. § 103(a) Appellants argue that the Examiner erred in rejecting independent claims 1 and 12 because Ma does not disclose or suggest the following claim limitations: “a virtual vertical sync,” “assert a first vertical sync for the first display upon a first assertion of the virtual vertical sync,” and “assert a second vertical sync for the second display upon a second assertion of the virtual vertical sync.” See App. Br. 9-12; Reply Br. 2. “A Virtual Vertical Sync” The Examiner finds that Ma’s central processing unit (CPU) outputs an “original control signal OCS to display images on display panels 110 and 210” and that the “OCS includes a vertical synchronizing signal VSYNC” corresponding to “a virtual vertical sync.” Final Act. 3,11, 19—20 (citing Ma 21—22, 50, Fig. 1). Appellants argue that (1) Ma’s vertical synchronizing signal VSYNC is “an ordinary or real vertical sync” and (2) “[tjhere is no teaching in Ma” that the vertical synchronizing signal VSYNC “is the recited virtual vertical sync.” App. Br. 10. We are not persuaded by Appellants’ arguments. The Specification uses the phrase “a virtual vertical sync” but provides no definition for that phrase. See Spec. H 7—8, 12—13, 35. Instead, the Specification indicates that “a virtual vertical sync” functions in connection with a virtual display. See id. H 5, 7, 12—13. In addition, the Specification explains that “assert[ing] a first vertical sync for the first display upon a first assertion of the virtual vertical sync and asserting] a second vertical sync for the second display upon a second assertion of the virtual vertical sync” includes “any situation where a vertical sync is alternated between multiple displays.” Id. 135. The Specification also explains that “one of ordinary skill in the art 4 Appeal 2015-006518 Application 11/949,830 will recognize [that] a variety of timing signals” may be used for displays. Id. 126. The prior art discloses multiple virtual displays. See, e.g., Final Act. 8 (citing Hogle 1:57—62, 9:50-54, Fig. 4, Fig. 6). The rejection rests on the combined teachings of Hogle and Ma. Ans. 4; see also Final Act. 11—12. Thus, we discern no error in the Examiner’s determination that Ma’s vertical synchronizing signal VSYNC corresponds to “a virtual vertical sync.” First and Second Assertions of the Virtual Vertical Sync Appellants argue that the claims “recite a particular relationship between [1] the virtual vertical sync signal and [2] vertical sync signals supplied to the first and second displays.” App. Br. 10. Appellants also argue that “Ma fails to disclose the relationship between the VSYNC . . . and a vertical synchronizing signal supplied to” first and second display panels 110 and 210. Id. Appellants note that Ma discloses sub control signal 243 for second gate driving part 270 that includes a “vertical start signal” STV. Id. at 11 (quoting Ma 150). Appellants contend, however, that Ma contains “no teaching of the relationship between the vertical start signal” STV and the vertical synchronizing signal VSYNC. Id. Appellants also contend that Ma contains no “parallel disclosure” that main control signal 143 for first gate driving part 170 includes “any vertical start signal.” Id. at 12. We are not persuaded by Appellants’ arguments because the Examiner finds, and we agree, that Ma implicitly “teaches the first and second assertions of the virtual vertical sync.” Adv. Act. 2; see Ans. 2—3, 3^4; see also Final Act. 3,11, 20. More specifically, the Examiner finds that in Ma (1) “1S-DATA is provided to display panel 110 as ‘first virtual display’ based on [original control signal] OCS, which includes VSYNC,” 5 Appeal 2015-006518 Application 11/949,830 and (2) “2S-DATA is provided to display panel 210 as ‘second virtual display’ based on [original control signal] OCS, which includes VSYNC.” Final Act. 4—5, 21. Further, the Examiner finds that the VSYNC signal is input to: “driving part 130 and is thus implicitly used to generate timing of the 1S-DATA and 1S-GATE signals” for first display panel 110; and “driving part 230 and is thus implicitly used to generate timing of the 2S-DATA and 2S-GATE signals” for second display panel 210. Adv. Act. 2; see Ans. 2—3, 4—5; see also Final Act. 3,11, 20. In addition, the Examiner finds that a person of ordinary skill in the art (1) “would be familiar with the exceptionally common method of generating timing for data/gate line signals by using horizontal and vertical synchronization signals” and (2) “would have understood the implication” of Ma’s disclosure. Ans. 3—5. Appellants do not address the Examiner’s findings concerning the knowledge possessed by a person of ordinary skill in the art. Reply Br. 2—3. Further, the Examiner does not rely on vertical start signal STV in sub control signal 243 to reject claims 1 and 12. Final Act. 11—12, 19—20. Accordingly, Appellants’ arguments regarding (1) Ma’s alleged failure to teach a relationship between the vertical start signal STV and the vertical synchronizing signal VSYNC and (2) the alleged lack of any “parallel disclosure” that main control signal 143 includes “any vertical start signal” do not respond to the rejection. Based on Ma’s description of the line-by-line reading of image data from memory and subsequent display of image data, Appellants contend that 6 Appeal 2015-006518 Application 11/949,830 Ma could perform vertical synchronization “by counting horizontal lines recalled from memory” instead of using a vertical synchronization signal. App. Br. 12. Appellants then contend that “[t]he existence of a plausible alternative interpretation of the disclosure of Ma that does not make claims 1 and 12 obvious negates any inference ‘that Ma implicitly teaches the first and second assertions of the virtual vertical sync.’” Id. at 12—13. In response, the Examiner notes that the rejection does not rest on any inherent teaching in Ma and that “it is proper to take into account not only specific teachings of the reference but also the inferences which one skilled in the art would reasonably be expected to draw therefrom.” Ans. 5 (citing In re Preda, 401 F.2d 825, 826 (CCPA 1968)). As noted above, Appellants do not address the Examiner’s reasonable findings concerning the knowledge possessed by a person of ordinary skill in the art. Reply Br. 2—3. Further, Appellants’ “plausible alternative interpretation” conflicts with Ma’s disclosure that timing control part 231 in second driving part 230 generates sub control signal 243 including vertical start signal STV for second gate driving part 270 operatively connected to second display panel 210. See Ma Tflf 49-50, 53, Fig. 1, Fig. 4. Ma’s disclosure of vertical start signal STV for driving a display indicates that Ma uses a vertical synchronization signal instead of counting horizontal lines. We observe that Ma not only discloses that timing control part 231 in second driving part 230 generates sub control signal 243 for second gate driving part 270 operatively connected to second display panel 210, but also discloses that timing control part 131 in first driving part 130 generates main control signal 143 for first gate driving part 170 operatively connected to first display panel 110. See Ma 40, 49—50, Fig. 1, Fig. 3, Fig. 4. 7 Appeal 2015-006518 Application 11/949,830 Ma explains that main control signal 143 and sub control signal 243 are each based on the original control signal OCS, which includes the VSYNC signal. Id. 40, 49. Ma further explains that first gate driving part 170 generates gate signals based on main control signal 143 and that second gate driving part 270 generates gate signals based on sub control signal 243. Id. H 43, 53. Thus, the gate signals for the display panels result from the original control signal OCS, which includes the VSYNC signal. Moreover, based on the parallels in operation between components 130, 131, and 170 for first display panel 110 and components 230, 231, and 270 for second display panel 210, a person of ordinary skill in the art would reasonably infer that main control signal 143 includes a signal like vertical start signal STV in sub control signal 243. Summary for Claims 1 and 12 For the reasons discussed above, Appellants’ arguments have not persuaded us that the Examiner erred in rejecting claims 1 and 12 for obviousness based on Hogle, Lai, and Ma. Hence, we sustain the rejection. The Rejection of Claims 2, 6, 8, 9, 15, and 16 Under 35 U.S.C. § 103(a) Claims 2, 6, 8, and 9 depend directly or indirectly from claim 1, while claims 15 and 16 depend directly or indirectly from claim 12. App. Br. 14—16 (Claims App.). Appellants do not present separate patentability arguments for these dependent claims beyond the arguments regarding the associated independent claims. Id. at 13; Reply Br. 1—3. Thus, we sustain the obviousness rejection of these dependent claims. 8 Appeal 2015-006518 Application 11/949,830 DECISION We affirm the Examiner’s decision to reject claims 1, 2, 6, 8, 9, 12, 15, and 16. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R. § 1.136(a)(l)(iv). AFFIRMED 9 Copy with citationCopy as parenthetical citation