Ex Parte Gee et al

Patent Trial and Appeal Board

Mar 28, 2014

11457414 (P.T.A.B. Mar. 28, 2014)

UNITED STATES PATENT AND TRADEMARK OFFICE
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BEFORE THE PATENT TRIAL AND APPEAL BOARD
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Ex parte TIMOTHY W. GEE and MARK A. RINALDI
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Appeal 2011-010275
Application 11/457,414
Technology Center 2100
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Before STEVEN D.A. McCARTHY, DAVID M. KOHUT, and
JEREMY J. CURCURI, Administrative Patent Judges.

KOHUT, Administrative Patent Judge.

DECISION ON APPEAL

Appeal 2011-010275
Application 11/457,414

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This is a decision on appeal under 35 U.S.C. § 134(a) of the Final
Rejection of claims 1, 3-6, 8-11, 13-14, 17, and 20. We have jurisdiction
under 35 U.S.C. § 6(b).
We reverse the Examiner’s rejection of these claims.

INVENTION
The invention is directed to a primary processor to execute a common
operating system and a secondary processor that is placed in a wake state in
the event of detection of a special condition. The secondary processor
remains in a sleep state in which a cache of the secondary processor is
maintained during non-detection of the special condition. Spec. 3-4. Claim
1 is illustrative of the invention and is reproduced below:
1. A multi-processor system to allocate processing
functions of a common operating system between a primary
processor and a secondary processor, comprising:
a primary processor to execute the common operating
system to perform processor functions exclusive of a secondary
processor, the processing functions comprising application code
execution, during non-detection of a special condition, and to
place the secondary processor in a wake state in the event of
detection of the special condition; and
a secondary processor to execute the common operating
system to perform at least some processor functions when a
special condition is detected and the secondary processor is in
the wake state, and the secondary processor to remain in a sleep
state in which a cache of the secondary processor is maintained
during non-detection of the special condition, and the secondary
processor when in the wake state to be placed in the sleep state
if a monitored temperature exceeds a threshold.

Appeal 2011-010275
Application 11/457,414

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REFERENCE
Suzuoki US 2006/0259743 A1 Nov. 16, 2006
(filed May 10, 2005)

REJECTIONS AT ISSUE1,2,3,4
Claims 1, 3-6, 8-11, 13, 14, 17, and 20 are rejected under 35 U.S.C.
§ 102(e) as anticipated by Suzuoki. Ans. 4-6.

ISSUES
Did the Examiner err in finding that Suzuoki discloses maintaining the
cache of a secondary processor when the secondary processor is in a sleep
state, as required by claim 1 (and similarly required by claims 10 and 14)?

1 The Examiner originally rejected claims 1, 3-6, 8-11, 13, 14, 17, and 20
under 35 U.S.C. § 103(a) as being unpatentable over the combination of
Cupps in view of Finlay in view of Omizo in view of Hamilton. Final Rej.
4-8. The Examiner has withdrawn this rejection. Ans. 3.
2 The Examiner originally rejected claims 15, 16, and 18 under 35 U.S.C. §
103(a) as being unpatentable over the combination of Cupps in view of
Finlay in view of Omizo in view of Hamilton in view of Char Sample. Final
Rej. 8. The Examiner has withdrawn this rejection. Ans. 3.
3 The Examiner originally rejected claims 7, 12 and 19 under 35 U.S.C. §
103(a) as being unpatentable over the combination of Cupps in view of
Finlay in view of Omizo in view of Hamilton in view of Yamada. Final Rej.
9. The Examiner has withdrawn this rejection. Ans. 3.
4 As a result, the Examiner indicated that claims 7, 12, 15, 16, 18 and 19 are
objected as to being dependent upon a rejected base claim, but would be
allowable if rewritten in independent form including all of the limitations of
the base claim and any intervening claims. Ans. 6.
Appeal 2011-010275
Application 11/457,414

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ANALYSIS
Claim 1 requires maintaining the cache of a secondary processor when
the secondary processor is in a sleep state. Independent claims 10 and 14
have a similar limitation. Claims 3-6, 8, 9, 11, 13, 17, and 20 variously
depend from independent claims 1, 10, and 14.
The Examiner finds that Suzuoki discloses the disputed limitation
because Suzuoki specifically discloses powering the hibernating processor at
a level that enables rudimentary processor operation. Ans. 5 and 7-8. Thus,
the Examiner finds that because the processor is never completely powered
off, the cache is maintained. Ans. 8. Additionally, the Examiner finds that
if the cache was not maintained, the hibernating processor, in Suzuoki,
would have to go through a conventional initialization procedure before the
processor performed the next action. Ans. 7. However, Appellants contend
that just because the processor maintains power does not necessarily mean
that the cache is maintained, nor does skipping a conventional initialization
procedure because Suzuoki does not indicate that every initialization
procedure is skipped. Reply Br. 7-9. Therefore, Appellants contend that
there is nothing in Suzuoki that either expressly or inherently indicates that
the cache is maintained, as required by the claims. Reply Br. 9. We agree
with Appellants.
The Examiner has not shown, nor do we find, that Suzuoki either
expressly or inherently maintains a cache by merely disclosing that the
hibernating processor may not need to go through a conventional
initialization procedure. While we agree that the conventional initialization
procedure may not occur, we also agree with Appellants (Reply Br. 8) that
Suzuoki does not indicate that no initialization procedure occurs. Thus, we
Appeal 2011-010275
Application 11/457,414

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do not agree with the Examiner that Suzuoki discloses maintaining a cache,
as required by the claims. Accordingly, for the reasons stated supra, we
reverse the Examiner’s rejection of claims 1, 3-6, 8-11, 13, 14, 17, and 20.

CONCLUSION
The Examiner erred in finding that Suzuoki discloses maintaining the
cache of a secondary processor when the secondary processor is in a sleep
state, as required by claim 1 (and similarly required by claims 10 and 14).

SUMMARY
The Examiner’s decision to reject claims 1, 3-6, 8-11, 13, 14, 17, and
20 under 35 U.S.C. § 102(e) is reversed.
REVERSED

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