Ex Parte FAY et al

Patent Trial and Appeal Board

Jan 31, 2019

13950680 (P.T.A.B. Jan. 31, 2019)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/950,680 07/25/2013
23117 7590 02/04/2019
NIXON & V ANDERHYE, PC
901 NORTH GLEBE ROAD, 11 TH FLOOR
ARLINGTON, VA 22203
FIRST NAMED INVENTOR
Thomas FAY
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
AC-4010-270 3644
EXAMINER
GREGG, MARY M
ART UNIT PAPER NUMBER
3697
NOTIFICATION DATE DELIVERY MODE
02/04/2019 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
PTOMAIL@nixonvan.com
pair_nixon@firsttofile.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte THOMAS FAY and DOMINICK P ANISCOTTI
Appeal2017-010567 1
Application 13/950,680
Technology Center 3600
Before MURRIEL E. CRAWFORD, MICHAEL W. KIM, and
PHILIP J. HOFFMANN, Administrative Patent Judges.
CRAWFORD, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
This is an appeal from the final rejection of claims 1---6 and 8-17. We
have jurisdiction to review the case under 35 U.S.C. §§ 134 and 6.
The invention relates generally to creating a high-speed feed of
market data messages. Spec. 1 lines 6-9.
Claim 1 is illustrative:
1. A Field Programmable Gate Array (FPGA) circuit of an
automated electronic exchange platform, the FPGA comprising:
1 The Appellants identify Nasdaq, Inc. as the real party in interest. Appeal
Br. 3.
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Application 13/950,680
a first hardware communications interface configured to
receive a plurality of matching engine messages that have a
source specific format from a matching engine of said automated
electronic exchange platform;
a data message memory buffer, which is part of electronic
memory of the FPGA circuit, configured to stored electronic data
messages;
reconfigurable firmware logic circuitry configured to:
filter, upon reception by the first hardware
communications interface, the received plurality of matching
engine messages and, based on how the received plurality of
matching engine messages are filtered, discard at least some of
the received plurality of matching engine messages,
store, to the data message memory buffer, at least
some of the received plurality of matching engine messages that
have not been filtered and discarded,
convert matching engine data messages stored in
the buffer from the source specific format into market data
messages that are in a standardized market data message protocol
format,
generate, from the market data messages that are in
a standardized market data message protocol format, a stream of
market data messages having the standardized market data
protocol format; and
generate and maintain an order table that stores
order data for orders that are open on the automated electronic
exchange platform, where the order table is generated and
maintained based on the received plurality of matching engine
messages,
a second hardware communications interface configured
to transmit the stream of market data messages.
The Examiner rejected claims 1---6 and 8-17 under 35 U.S.C. § 101 as
directed to ineligible subject matter in the form of abstract ideas.
The Examiner rejected claims 1, 2, 4, 5, and 8-11 under 35 U.S.C.
§ 103 as unpatentable over Parsons et al. (US 2008/0243675 Al, pub. Oct. 2,
2008) ("Parsons"), Littlewood (US 7,788,169 Bl, iss. Aug. 31, 2010), and
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Online Course on Embedded Systems, Module 12- SPI Bus Interface, EE
Herald (Dec. 18, 2008) ("Herald"),
http://web.archive.org/web/20081218014028/http://www.eeherald.com: 80/s
ection/design-guide/esmod12.html (last visited Dec. 22, 2018).
The Examiner rejected claims 3 and 12 under 35 U.S.C. § 103 as
unpatentable over Parsons, Littlewood, Herald, and Chapman et al.
(US 8,706,606 B2, iss. Apr. 22, 2014) ("Chapman").
The Examiner rejected claims 6 and 13 under 35 U.S.C. § 103 as
unpatentable over Parsons, Littlewood, Herald, and Edwards, III et al.
(US 7,676,606 Bl, iss. Mar. 9, 2010) ("Edwards").
The Examiner rejected claims 14 and 15 under 35 U.S.C. § 103 as
unpatentable over Parsons, Littlewood, Herald, and Winborn et al.,
(US 2011/0264577 Al, pub. Oct. 27, 2011) ("Winborn").
The Examiner rejected claims 16 and 17 under 35 U.S.C. § 103 as
unpatentable over Parsons, Littlewood, Herald, and McPherson
(US 2010/0057608 Al, pub. Mar. 4, 2010).
We AFFIRM.
ANALYSIS
Patentable subiect matter
An invention is patent-eligible if it claims a "new and useful process,
machine, manufacture, or composition of matter." 35 U.S.C. § 101. The
Supreme Court, however, has long interpreted § 101 to include implicit
exceptions: "[l]aws of nature, natural phenomena, and abstract ideas" are
not patentable. E.g., Alice Corp. Pty. Ltd. v. CLS Bank Int 'l, 134 S. Ct.
2347, 2354 (2014).
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In determining whether a claim falls within the excluded category of
abstract ideas, we are guided in our analysis by the Supreme Court's two-
step framework, described in Mayo and Alice. Id. at 2355 (citing Mayo
Collaborative Servs. v. Prometheus Labs., Inc., 566 U.S. 66, 76-78 (2012)).
In accordance with that framework, we first determine whether the claim is
"directed to" a patent-ineligible abstract idea. Alice, 134 S. Ct. at 2356 ("On
their face, the claims before us are drawn to the concept of intermediated
settlement, i.e., the use of a third party to mitigate settlement risk."); Bilski v.
Kappas, 561 U.S. 593, 611 (2010) ("Claims 1 and 4 in petitioners'
application explain the basic concept of hedging, or protecting against
risk."); Diamond v. Diehr, 450 U.S. 175, 184 (1981) ("Analyzing
respondents' claims according to the above statements from our cases, we
think that a physical and chemical process for molding precision synthetic
rubber products falls within the § 101 categories of possibly patentable
subject matter."); Parker v. Flook, 437 U.S. 584, 594--95 (1978)
("Respondent's application simply provides a new and presumably better
method for calculating alarm limit values."); Gottschalk v. Benson, 409 U.S.
63, 64 (1972) ("They claimed a method for converting binary-coded decimal
(BCD) numerals into pure binary numerals.").
The patent-ineligible end of the spectrum includes fundamental
economic practices, Alice, 134 S. Ct. at 2357; Bilski, 561 U.S. at 611;
mathematical formulas, Parker, 437 U.S. at 594--95; and basic tools of
scientific and technological work, Gottschalk, 409 U.S. at 69. On the patent-
eligible side of the spectrum are physical and chemical processes, such as
curing rubber, Diamond, 450 U.S. at 184 n.7, "tanning, dyeing, making
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waterproof cloth, vulcanizing India rubber, smelting ores," and a process for
manufacturing flour, Gottschalk, 409 U.S. at 69.
If the claim is "directed to" a patent-ineligible abstract idea, we then
consider the elements of the claim-both individually and as an ordered
combination-to assess whether the additional elements transform the nature
of the claim into a patent-eligible application of the abstract idea. Alice, 134
S. Ct. at 2355. This is a search for an "inventive concept"-an element or
combination of elements sufficient to ensure that the claim amounts to
"significantly more" than the abstract idea itself. Id.
In addition, the Federal Circuit has held that if a method can be
performed by human thought alone, or by a human using pen and paper, it is
merely an abstract idea and is not patent-eligible under § 101. CyberSource
Corp. v. Retail Decisions, Inc., 654 F.3d 1366, 1373 (Fed. Cir. 2011) ("[A]
method that can be performed by human thought alone is merely an abstract
idea and is not patent-eligible under§ 101.").
Claims that recite an improvement to a particular computer
technology have been found patent eligible. See, e.g., McRO, Inc. v. Bandai
Namco Games Am. Inc., 837 F.3d 1299, 1314--15 (Fed. Cir. 2016)
(detennining claims not abstract because they "focused on a specific
asserted improvement in computer animation").
Each of independent claims 1 and 8 recites steps to receive and filter
data, convert the remaining data to a different format, and then store and
transmit the data, using high-speed computer circuits programmed to
execute the steps. The dependent claims recite that parameters and symbols
are stored, that there are communications interfaces and logic to monitor and
control the steps, and that data is stored outside of the execution circuitry.
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The Examiner finds the pending claims are directed to generating a
data market message stream by organizing and manipulating data (Final
Act. 7; see also id. at 12), which the Examiner characterizes as "data
organization, manipulation and transaction" (id. at 9). The Examiner further
finds the converting of one format to another is similar to the claims found
to be directed to ineligible subject matter in Gottschalk v. Benson, and the
filtering and transmitting are similar to ineligible claims in Cyberfone Sys.,
LLC v. CNN Interactive Grp. Inc., 558 F.App'x 988 (Fed. Cir. 2014).
Answer 8-9.
The claims involve operations to inform trading parties within a
financial market, and thus are directed to methods of organizing human
activity, in that they are essentially performing advertising, marketing, or
sales activities within the marketplace. For example, independent claim 1
recites an "automated electronic exchange platform" that "generate ... a
stream of market data messages" and "transmit the stream of market data
messages." In addition, the claims do not improve the functioning of a
computer, because FPGA circuits are not improved by the invention, and no
other technology or field is improved by moving operations from software
executing on traditional microprocessor-based computers to software
operations programming into faster FPGA circuits. The claims do not effect
a physical transformation. Therefore, the claims do not integrate the judicial
exception of the abstract idea into a practical application.
The Appellants argue these cases do not persuasively indicate the
claims at issue are directed to abstract ideas because Cyberfone is not a
precedential case, Benson was decided in the 1970s, and neither case
discusses field-programmable gate arrays ("FPGA"), as claimed. Appeal
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Br. 11. These arguments, however, do not dissuade us from agreeing with
the Examiner that the steps recited by the claims, and the abstract to which
they are directed, are indeed similar to the steps in Cyberfone and Benson.
For example, by filtering out messages from the received data, the claims
divide incoming data into different categories and direct one of the
categories to be stored and transmitted. This is similar to the method in
Cyberfone, where data is directed based on category. Cyberfone Sys., 558
F .App 'x at 992 ("separating and transmitting that information according to
its classification, is an abstract idea that is not patent-eligible."). One
category in the claims here is data that is filtered out, which is not sent, and
another category is data that is stored and transmitted. Further, converting
data from one format to another is similar to converting binary-coded
decimal numerals into pure binary numerals. See Gottschalk, 409 U.S. at 64.
We are also unpersuaded by the Appellants' arguments that, according
to the Appellants, the claims are not directed to abstract ideas because they
include, or are directed to, an FPGA, and, simultaneously, offer something
more than an abstract idea by confining the functional steps to operation on
an FPGA. See Appeal Br. 12-22; see also Reply Br. 2--4, 8. The Appellants
even go so far as to assert they have invented a "new type of hardware" and
a "new type of machine," which we take to mean an FPGA circuit
programmed to perform the claimed functions. Appeal Br. 21-22.
The Appellants indicate that automated financial exchanges typically
distribute received data on buy and sell orders to market participants.
Spec. 1 lines 19-31. The Appellants further indicate that several platforms
have already been developed for performing the quick distribution of bid,
offer, and trade information to traders, such as those used by the NASDAQ
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exchange. Id. at 2 lines 1---6. Also, the Appellants describe FPGA
technology has been applied to "trading," but not to "exchange matching,"
such as the NASDAQ market. Id. lines 21-29.
The fundamental issue here, thus, is whether confining a basically
well-known process to the faster, less-common FPGA technology can
transform the abstract process of generating filtered, financial-market-data
messages, in a format different than as received, into eligible subject matter.
The Appellants do not purport to have improved the process of
generating a market-data message stream. For example, the Appellants
indicate trader systems already use different protocols and messages than the
matching system, and must already be translated into the protocols of each
trader to effectuate communication with each trader system. Spec. 6
lines 20-28. Thus the claimed receiving, converting, and transmission are
not new steps. Further, filtering irrelevant messages out of the message
stream is not described as a new function, unknown before in the practice of
providing financial market data feeds, and filtering data is a step the ordinary
artisan would recognize as common.
Indeed, the only improvement described by the Appellants is the use
of faster FPGA circuits for the performance of the common message-
handling tasks. More specifically, the Appellants describe faster hardware
for the message-handling function, within an otherwise general-purpose
matching system:
An example embodiment of present invention, which is
designed to accelerate financial trading through custom hardware
and software, consists of a high speed circuit board, custom
Integrated Circuit chips and custom driver and application
software. FIG. 3 depicts an example embodiment of present
invention and includes a financial market data message stream
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generator 300 constructed in reconfigurable logic and residing in
an automated electronic exchange platform 140. Embodiments
of this invention provide a many fold increase in market data
speed over existing solutions.
Spec. 5 line 32 to 6 line 2 ( emphasis omitted). The purported improvement
is thus the use of faster hardware for the message-handling function.
Although the Appellants recite using an FPGA circuit to perform the
method of claim 8, and in claim 1 recite the FPGA circuit itself, the
Specification does not describe how the FPGA circuit is designed,
manufactured, or programmed. Instead, the Specification describes that
"detailed descriptions of well-known circuits, components and/or modules
have been omitted so as not to obscure the description of the example with
unnecessary detail." Spec. 6 lines 6-8. The Specification thus insinuates
FPGA circuits are well-known, and describes the specific FPGA only
through functional description of the operations of the various parts:
communications interfaces that communicate and filter, logic that converts,
and memory that stores data. Id. at 6-8.
The FPGA circuit thus performs functions that general-purpose
computers do, when programmed with software functions, as is the case with
general-purpose computers. Indeed, the FPGA is not asked to perform acts
that a general-purpose computer could not accomplish. For example, the
claimed operations of storing, analyzing, receiving, and writing data are
primitive computer operations found in any computer system. See In re Katz
Interactive Call Processing Patent Litig., 639 F.3d 1303, 1316 (Fed.
Cir. 2011) ("Absent a possible narrower construction of the terms
'processing,' 'receiving,' and 'storing,' discussed below, those functions can
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be achieved by any general purpose computer without special
programming.").
As a result, although Appellants assert they are claiming an FPGA,
they are really claiming a process of handing financial market data messages
merely implemented on an FPGA circuit, simply limited to an FPGA circuit
only for the purpose of achieving higher speeds than a non-FPGA digital
computer that commonly perform the same functions.
In addition, we are unpersuaded that the claims, considered as an
ordered combination, recite more than an abstract idea. Reply Br. 3. See
Inventor Holdings, LLC v. Bed Bath & Beyond, Inc., 876 F.3d 1372, 1378
(Fed. Cir. 2017) (holding that considering claims reciting data retrieval,
analysis, modification, generation, display, and transmission as an "ordered
combination" reveals that they "amount to 'nothing significantly more' than
an instruction to apply [an] abstract idea" using generic computer
technology) (alteration in original).
The claims take part of a standard economic process, a market feed, in
an existing market, and indicate it should be performed on a computer that is
faster than commonly used. The Appellants did not invent the FPGA, as
indicated by the Examiner and not challenged by Appellants. See Answer 8.
Instead, the Appellants are claiming a standard, market process of providing
market feeds, limited to being executed on an especially fast, though well-
known circuit to achieve faster speeds. But merely speeding up a well-
known process, even if done with well-known but uncommon hardware,
does not transform the process from being an abstract idea into eligible
subject matter. The FPGA claimed here simply acts as a faster version of a
general-purpose computer, which does not change the abstract idea of
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generating a financial market data message feed into patentable subject
matter.
Finally, the Appellants argue the claims are not directed to abstract
ideas because they do not preempt all ways of performing the abstract idea.
Appeal Br. 22-23. "While preemption may signal patent ineligible subject
matter, the absence of complete preemption does not demonstrate patent
eligibility." Ariosa Diagnostics, Inc. v. Sequenom, Inc., 788 F.3d 1371,
1379 (Fed. Cir. 2015); see also OIP Techs., Inc. v. Amazon.com, Inc., 788
F.3d 1359, 1362---63 (Fed. Cir. 2015) ("[T]hat the claims do not preempt all
price optimization or may be limited to price optimization in the ecommerce
setting do not make them any less abstract."). And, "[ w ]here a patent's
claims are deemed only to disclose patent ineligible subject matter under the
Mayo framework, as they are in this case, preemption concerns are fully
addressed and made moot." Ariosa, 788 F.3d at 1379.
For these reasons, the Appellants have not shown error in the
Examiner's rejection of claims 1-6 and 8-17 as directed to ineligible
abstract ideas. Therefore, we sustain the rejection under 35 U.S.C. § 101.
Obviousness of Claims 1. 2. and 5
The Appellants argue that Littlewood, upon which the Examiner
relied as disclosing the filtering recited in independent claim 1, does not
filter and cancel messages. Appeal Br. 23-24. We are not persuaded by the
Appellants' argument. First, the Examiner finds Parsons discloses filtering,
but relies on Littlewood as disclosing the "details on discarding/cancelling
messages." Final Act. 20. Further, Parsons discloses the claimed filtering,
in that Parsons explains "FAM 806 is preferably configured to perform
message query filtering. Message query filters allow for certain messages to
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be excluded from the message flow." Parsons ,r 105 (cited at Final Act. 19).
The ordinary artisan would have recognized that this conforms to the claim
language to filter incoming messages "and, based on how the received
plurality of matching engine messages are filtered, discard at least some,"
because excluding a message is essentially the same as discarding it.
Littlewood, therefore, is a cumulative reference.
We also are unpersuaded by the Appellants' argument that Parsons
has a matching system, but does not discuss that this matching system is
implemented in an FPGA that receives and processes messages from a
matching engine. Appeal Br. 25. The argument thus means that Parsons'
matching engine doesn't operate to match messages received from a
matching engine. The claims do not, however, require this, because the
claims only recite functions performed on messages from a matching engine,
but not on what messages are fed into that matching engine. In addition,
Parsons discloses a "ticker plant" implemented on "reconfigurable logic"
(Parsons ,r 14), one example of which is the FPGA (id. ,r 10; see also ,r 84).
The ticker plant is implemented within a market data platform 600 (id. ,r 56),
on "device 604" (id. ,r 60), which includes "[ f]eed handlers" that convert
messages from one format to another (id. ,r 61 ), and an order book (id. ,r 71 ).
The market data platform 600 also includes a matching engine. Id. ,r 78.
The matching system matches bids with offers and then messages about
trades that are "then submitted to the appropriate reporting and settlement
systems" (id.), on device 612 which implements the reporting functionality
in Parsons (id. ,r 80). Parsons also feeds messages to device 604 for
distribution on wide area networks. Id. ,r 60 ("feed handling/ticker plant").
Parsons thus discloses receiving and processing messages from a matching
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engine, generating and maintaining an order table, and converting,
generating, and transmitting messages from the matching engine, on FPGA
circuitry, as claimed.
We are further unpersuaded by the Appellants' argument that the cited
references fail to disclose an order book generated and maintained from
messages received from a matching engine. Appeal Br. 25. Parsons
discloses an "order book server" that "maintains a sorted list of the bids and
offers associated with all outstanding orders for that instrument."
Parsons ,r 71. Parsons indicates that "order information for each instrument
is received from a variety of different trading venues in stream 106 and is
aggregated together to form one holistic view of the market for that
particular instrument." Id. Because Parsons' order book is updated in real-
time (id. ,r 96), we interpret this to mean the order book in Parsons receives
messages from the matching engine when matches on open bids and offers
are made, so the order book reflects bids and offers that were matched and
no longer outstanding, which meets the claim recitations.
For these reasons, we sustain the rejection under 35 U.S.C. § 103 of
claim 1, as well as dependent claims 2 and 5, that were rejected along with
claim 1 and not argued separately.
Obviousness Reiection of Claim 4
Dependent claim 4 recites "wherein the first hardware
communications interface is further configured to transmit market data
messages in the standardized market data protocol format."
We are not persuaded by the Appellants' argument that Parsons fails
to disclose receiving and transmitting messages on one communications
interface, and transmitting messages additionally on a second
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communications interface. Appeal Br. 27. Parsons discloses feed handler
device 604 communicating in-bound and out-bound messages to multiple
networks. Parsons ,r 59. For this reason, we sustain the rejection of claim 4
under 35 U.S.C. § 103.
Obviousness Reiections of Claims 3. 6. and 15
The Appellants' arguments are limited to asserting that the additional
references relied upon do not cure alleged deficiencies in the rejection of
claim 1. Appeal Br. 27-28. Because we found no shortcomings in the
rejection of claim 1, we sustain the rejections of claims 3, 6, and 15 under
35 U.S.C. § 103.
Obviousness Reiection of Claim 16
Dependent claim 16 recites "wherein the market data messages that
are in the standardized market data message protocol format include
messages that are aggregated from plural ones of the at least some of the
received plurality of matching engine messages that have not been filtered
and discarded."
The Appellants argue the cited sections of Parsons and McPherson do
not disclose aggregating order information from received messages. Appeal
Br. 29. The argument does not persuade us, because Parsons discloses this
function by stating that "order information for each instrument is received
from a variety of different trading venues in stream 106 and is aggregated
together to form one holistic view of the market for that particular
instrument." ,r 71. Thus, because Parsons meets the claim language, we
sustain the rejection of claim 16 under 35 U.S.C. § 103.
Obviousness Reiection of Claims 8-10
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The Appellants' arguments directed to independent claim 8 essentially
repeat the arguments directed to claim 1. Appeal Br. 29--33. We determine
they are unpersuasive for the same reasons as for claim 1. Therefore, we
sustain the rejection of claim 8 under 35 U.S.C. § 103, as well as for claims
9 and 10 that were rejected along with claim 8 and not argued separately.
Obviousness Reiection of Claim 11
Dependent claim 11 recites language substantially identical to claim 4,
and the arguments, related to communications interfaces, advanced are
essentially the same as for claim 4. Appeal Br. 33-34. We determine they
are unpersuasive for the same reasons as for claim 4. Thus, we sustain the
rejection of claim 11 under 35 U.S.C. § 103.
Obviousness Reiections of Claims 12-14
The Appellants' arguments are limited to asserting that the additional
references relied upon do not cure alleged deficiencies in the rejection of
claim 8. Appeal Br. 34--35. Because we are unpersuaded of any
shortcomings in the rejection of claim 8, we sustain the rejections of claims
12-14 under 35 U.S.C. § 103.
Obviousness Reiection of Claim 17
Dependent claim 17 recites language substantially identical to claim
16, and the arguments advanced, related to aggregating messages, are
essentially the same as for claim 16. Appeal Br. 35-36. We determine they
are unpersuasive for the same reasons as for claim 16. Thus, we sustain the
rejection of claim 17 under 35 U.S.C. § 103.
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DECISION
We affirm the rejection of claims 1---6 and 8-17 under 35 U.S.C.
§ 101.
We affirm the rejections of claims 1---6 and 8-17 under 35 U.S.C.
§ 103.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv).
AFFIRMED
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