Ex Parte Chiou et al

Patent Trial and Appeal Board

Oct 11, 2016

13864676 (P.T.A.B. Oct. 11, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
13/864,676 04/17/2013 Wen-Chih CHIOU
95496 7590 10/13/2016
Hauptman Ham, LLP (TSMC)
2318 Mill Road
Suite 1400
Alexandria, VA 22314
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
T5057-Yl17UB 6212
EXAMINER
BOYLE, ABBIGALE A
ART UNIT PAPER NUMBER
2816
NOTIFICATION DATE DELIVERY MODE
10/13/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
tsmc@ipfirm.com
sramunto@ipfirm.com
pair_lhhb@firsttofile.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte WEN-CHIH CHIOU, WENG-JIN WU,
and SHAU-LIN SHUE
Appeal2015-004383
Application 13/864,676
Technology Center 2800
Before TERRY J. OWENS, DONNA M. PRAISS, and
MONTE T. SQUIRE, Administrative Patent Judges.
PRAISS, Administrative Patent Judge.
DECISION ON APPEAL
Appeal2015-004383
Application 13/864,676
STATEMENT OF THE CASE
The Appellants appeal under 35 U.S.C. § 134(a) from the Examiner's
rejection of claims 1-20. We have jurisdiction under 35 U.S.C. § 6(b).
The Claimed Invention
The Appellants claim a three-dimensional integrated circuit having a
protection layer. Claims 1 and 7 are illustrative (key limitation in dispute
italicized):
1. A three-dimensional integrated circuit, comprising:
a first substrate having a first surface and a second surface
opposite to the first surface;
a second substrate attached to the first surface of the first
substrate;
an interconnect between attached to the first surface of the
first substrate and the second substrate;
a plurality of through vias formed in the first substrate and
electrically coupled to the interconnect;
a protection layer over the second surface of the first
substrate, wherein each of the plurality of through vias protrudes
through the protection layer; and
a plurality of dies, each die of the plurality of dies attached
to at least one through via of the plurality of through vias.
7. The 3DIC of claim 1, wherein the first substrate has a
thickness rangingfrom about 5 micrometers to about 50 µm.
App. Br. 19, 20 (Claims Appendix).
Kim et al.
T surume et al.
Nakamura et al.
The References
US 2002/0109236 Al
US 2007 /0023758 Al
US 2007/0029554 Al
2
Aug. 15, 2002
Feb. 1,2007
Feb. 8,2007
Appeal2015-004383
Application 13/864,676
Lu US 2008/0211092 Al Sept. 4, 2008
The Rejections
Claims 1---6, 8, 9, 11-16, and 18 stand rejected under 35 U.S.C.
§ 102(b) as anticipated by Kim. The claims also stand rejected under
35 U.S.C. § 103 as follows: claims 7 and 17 over Kim in view ofTsurume
and Nakamura and claims 10, 19, and 20 over Kim in view of Lu. Ans. 2, 5,
6.
OPINION
We reverse the rejection of claims 7 and 17 and affirm the remaining
rejections. Appellants argue the rejection of claims 1---6, 8, 9, 11-16, and 18
as a group. App. Br. 13-14. Therefore, we select claim 1 as representative
and claims 2---6, 8, 9, 11-16, and 18 stand or fall with claim 1. See 3 7 C.F .R.
§ 41.37(c)(l)(iv).
Anticipation by Kim
The Examiner finds that Kim discloses each of the elements of claim
1. Final Act. 2-3 (citing Kim, Figs. 1 and 2). Figure 2 of Kim is shown
below:
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Application 13/864,676
rr(··, 2 I.' L .
.W
Figure 2 is a cross-sectional view of an individual semiconductor integrated
circuit chip used in a three dimensional, multi-chip package shown in Figure
1. Kim ,-r 23. The Examiner identifies items 16, 11, and 20 in Figure 2 as
the first substrate, second substrate, and protection layer required by claim 1,
respectively. Final Act. 2-3. The Examiner identifies item 12a as the
recited "interconnect," item 14 as the recited "plurality of through vias
formed in the first substrate and electrically coupled to the interconnect,"
and items 120, 130, and 140 of Figure 1 as disclosing the recited "plurality
of dies." Id.
The Appellants contend that "[ t ]he Examiner erred by equating the
[long] unidentified element of Kim with a recited via." App. Br. 8.
Specifically, the Appellants contend that "Kim fails to explicitly or
inherently disclose that element 14 protrudes through element 20." Id.
According to the Appellants, "the fact that Kim labeled element 14 indicates
that Kim knew how to identify element 14. This strongly suggests that the
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Application 13/864,676
unlabeled elements are something other than element 14." Id. at 12. The
Appellants further contend that because labeled elements 14 on the left side
of Figure 2 do not extend through element 20, "Kim fails to explicitly or
inherently disclose 'each of the plurality of through vias protrudes through
the protection layer.'" Id. at 11.
The Appellants also argue that the unlabeled elements equated to the
recited via "do not contact element 12a" and that "the difference in the
dimensions of element 12 and element 12a would be an indication that
element 12 is not equivalent to element 12a." Id. at 10.
The Examiner responds that "[t]he 'unlabeled elements' the Appellant
refers to are labeled and discussed in Figure 3j and Paragraph 32 of the Kim
reference, wherein Figure 3j is a description of the formation of the device
seen in Figure 2, as explicitly stated in Paragraphs 23 and 24." Ans. 3.
Figure 31 as annotated by the Examiner is shown below.
.. 22d
l¥a J
~
22:a
./
:' 12a
22
{ ·~, ,. '
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Application 13/864,676
Annotated Figure 31 highlights the via on the right side labelled 14. Id. at 5.
The Examiner further responds that "Paragraph 32, in reference to Figure 2,
explicitly states that the 'chip selection terminal 12a and the chip terminals
12 are electrically connected to the lower connection terminals 23a and
23, respectively, through the trench wirings 14' ." Id. The Examiner
additionally finds that the term "via" is given its broadest reasonable
interpretation of meaning "an interconnecting structure extending between
two or more layers." Id. at 4. As such, the Examiner finds that "[a]ll vias,
14, 18, and 21, are formed of the same material (Paragraphs 43, 47, and 49),
and their aligned stacked form is still considered a single via that is formed
in the first substrate, is electrically connected to the interconnect, and
protrudes through the protection layer." Id. Additionally, the Examiner
finds that the transitional phrase "comprising" in claim 1 "does not prevent
the presence of additional vias within the structure."
We agree with the Examiner that, properly construed, claim 1 does
not preclude the presence of additional vias within the structure. We are not
persuaded by the Appellants' arguments that the elements on the left side
and the right side of Kim's Figure 2 are not the same element 14 and that
elements 12 and 12a are not equivalent structures for the reasons provided
by the Examiner. Moreover, Kim explicitly states that "like reference
numerals designate like structural elements." Kim i-f 21. In the Reply Brief,
the Appellants argue that because Figure 31 of Kim is described as a cross
section view showing a manufacturing method of the three-dimensional,
multi-chip package of Figure 1, the Examiner is factually incorrect about
Figure 31 disclosing the long unlabeled elements in Figure 2 as element 14.
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Application 13/864,676
Reply Br. 4. The Appellants' argument is not persuasive because Figure 2 is
also a cross section view of the three-dimensional, multi-chip package of
Figure 1. Kim i-f 23. Figure 2 shows an individual semiconductor integrated
circuit chip in the multi-chip package while Figure 31 is part of a sequence
of figures labeled Figures 3A through 3K that show the manufacturing of the
multi-chip package at the chip level. Id. at i-fi-123, 24, 40. Therefore, we find
no reversible error in the Examiner's determination that Kim's Figure 31
discloses the same elements shown in Kim's Figure 2 and that Kim's trench
wirings 14 and interconnect 12 are present at multiple locations between the
left side and the right side of Figure 2.
We also agree with the Examiner for the reasons stated in the Answer
that Kim's Figure 2 discloses "a plurality of through vias formed in the first
substrate and electrically coupled to the interconnect ... wherein each of the
plurality of through vias protrudes through the protection layer" as recited in
claim 1. Ans. 6. We are not persuaded by the Appellants' argument that
"[t]he Examiner appears to be asserting that a single via protruding through
the asserted protection layer 20 satisf[ies] the recited claim language."
Reply Br. 5. The Examiner explicitly finds a plurality of through vias
protrudes through protection layer 20:
Each of the plurality of vias considered to anticipate the claim
(vias 14 connected to interconnect 12) protrude through
protection layer 20, and therefore each of the plurality of through
vias protrudes through the protection layer.
Ans. 6. The Examiner also highlights element number 14, which element is
depicted (albeit not labeled) more than one time on the right side in Kim's
Figure 31. Id. at 5. Therefore, for at least the reason that via 14 appears
twice on the right side (in both Figures 2 and 31) as being completely
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Application 13/864,676
vertical and completely through each of layers 11, 16, and 20, we find no
reversible error in the Examiner's determination that Kim discloses "a
plurality of through vias" as recited in claim 1.
Additionally, as noted above, the Examiner finds that "all vias, 14, 18,
and 21, are formed of the same material (Paragraphs 43, 47, and 49), and
their aligned stacked form is still considered a single via that is formed in the
first substrate, is electrically connected to the interconnect, and protrudes
through the protection layer." Ans. 4. We are not persuaded by the
Appellants that this finding is contradictory to the further findings regarding
the vias on the right side of Figure 2 that are completely vertical and
completely through each of layers 11, 16, and 20. Reply 4--5. This finding
is consistent with the broadest reasonable interpretation of "via" as
interpreted by the Examiner to mean "an interconnecting structure extending
between two or more layers." Ans. 4. The Appellants do not offer a
different construction for the term "via" in this record nor assert that claim 1
requires a particular alignment or configuration of the through via as it is
"formed in the first substrate" and "protrudes through the protection layer"
as recited in claim 1. Accordingly, we affirm the rejection of claim 1 for the
reasons discussed above and provided in the Answer.
Obviousness Over Kim in view of Tsurume and Nakamura
Claims 7 and 17 depend from claims 1 and 11, respectively, and
further require that "the first substrate has a thickness ranging from about 5
micrometers to about 50 µm." The Examiner finds that the limitations of
claims 7 and 17 would have been obvious because "discovering the optimum
or working ranges involves only routine skill in the art" and because both
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Nakamura and Tsurume evidence that it was known to thin a substrate
mounted to a second substrate and connected to each other with
anisotropically conductive film (ACF) to a thickness within the claimed
range. Final Act. 5---6.
The Appellants contend that the rejection of claims 7 and 1 7 is flawed
because "[t]he Examiner failed to determine that the recited thickness was
recognized by the prior art as a result-effective variable" and "failed to
identify a specific recognized result being optimized by the recited
thickness." App. Br. 14.
In the response, the Examiner finds that
[t]hickness of a substrate layer can affect device density,
overall device height, manufacturing time, manufacturing costs,
parasitic capacitances, among other things. The evidentiary
references also specifically recognize the recited thickness as a
result-effective variable: Nakamura discloses that bringing
down a substrate thickness within 20-50µm range allows for the
device to be flexible in Paragraph 18 of their disclosure and
Tsurume discloses that a range of 4-50µm allows for substrate
flexibility and also prevents impurity intrusion into the device in
Paragraph 50 of their disclosure. Therefore the cited prior art
recognizes the recited thickness as a result-effective variable and
further discloses the specific recognized result: increased
flexibility and increased reliability.
Ans. 7.
In the Reply Brief, the Appellants contend that "[t]he portion of
Nakamura which the Examiner refers to is a substrate capable of supporting
thin film transistors or light emitting elements" and, similarly, Tsurume "is
directed to a substrate capable of support[ing] a transistor." Reply Br. 6.
Because Kim's substrate 16 is an insulating film within a die, the Appellants
argue that "[t]he Examiner failed to offer any rationale for why the thickness
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of substrates as robust as those described in Nakamura and Tsurume should
be considered when evaluating a thickness of an insulating film 16 within a
die as described in Kim." Id.
We agree with the Appellants that the Examiner has not provided a
reason to modify or optimize the thickness of Kim's substrate for the
purpose stated in Tsurume and Nakamura. Stated another way, there is no
apparent reason on this record for one of ordinary skill in the art to consider
flexibility desirable in the three dimensional integrated circuit of Kim and,
therefore, the thickness of Kim's substrate optimizable around flexibility.
The Examiner has not established that in view of Tsurume and Nakamura,
one of ordinary skill in the art would have desired to optimize the thickness
of Kim's insulation layer 16. We therefore reverse the rejection of claims 7
and 17 as being based upon impermissible hindsight in view of the
Appellants' disclosure. See In re Warner, 379 F.2d 1011, 1017 (CCPA
1967) ("A rejection based on section 103 clearly must rest on a factual basis,
and these facts must be interpreted without hindsight reconstruction of the
invention from the prior art"). Accordingly, we reverse the rejection of
claims 7 and 1 7.
Obviousness over Kim in view of Lu
Claim 10 depends from claim 1 and further requires that "the second
substrate is attached to the first substrate through an anisotropically
conductive connection film." The Examiner finds that it would have been
obvious to one having ordinary skill in the art to attach Kim's substrates
with anisotropically conductive connection films because Lu evidences it is
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Application 13/864,676
a conventional material for performing this known function. Final Act. 6
(citing Lu i-f 11, Figs. 1 a---d).
The Appellants contend that the Examiner erred in rejecting claim 10
because
Lu fails to teach or suggest "a protection layer over the second
surface of the first substrate, wherein each of the plurality of
through vias protrudes through the protection layer; a protection
layer over the second surface of the first substrate, wherein each
of the plurality of vias protrudes through the protection layer."
Thus, Lu fails [to] cure the above deficiencies of Kim.
App. Br. 16.
In response, the Examiner states that "the Kim reference alone is
relied upon to disclose the limitations of the independent claims." Ans. 9.
For the same reasons discussed above in connection with claim 1, we
are not persuaded by the Appellants that the Examiner erred in finding the
limitations of claim 1 disclosed by Kim. Accordingly, we affirm the
rejection of claim 10. Regarding the rejection of claims 19 and 20, because
the Appellants rely on the same argument (App. Br. 16-17), we also affirm
the rejection of claims 19 and 20.
DECISION/ORDER
The rejections under 35 U.S.C. § 102(b) of claims 1---6, 8, 9, 11-16,
and 18 as anticipated by Kim and under 35 U.S.C. § 103(a) of claims 10, 19,
and 20 over Kim in view of Lu are affirmed. The rejection under
35 U.S.C. § 103 of claims 7 and 17 over Kim in view of Nakamura and
T surume is reversed.
It is ordered that the Examiner's decision is affirmed-in-part.
AFFIRMED-IN-PART
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