Ex Parte Chandhoke et alDownload PDFPatent Trial and Appeal BoardOct 31, 201612846970 (P.T.A.B. Oct. 31, 2016) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE FIRST NAMED INVENTOR 12/846,970 07/30/2010 Sundeep Chandhoke 35690 7590 11/02/2016 MEYERTONS, HOOD, KIVLIN, KOWERT & GOETZEL, P,C P.O. BOX 398 AUSTIN, TX 78767-0398 UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. 6150-31200 2972 EXAMINER DANG,KHANH ART UNIT PAPER NUMBER 2185 NOTIFICATION DATE DELIVERY MODE 11/02/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): patent_docketing@intprop.com ptomhkkg@gmail.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte SUNDEEP CHANDHOKE, TIMOTHY J. HAYLES, and JEFFREY L. KODOSKY Appeal2015-005323 Application 12/846,970 Technology Center 2100 Before LARRY J. HUME, KAMRAN JIVANI, and SCOTT E. BAIN, Administrative Patent Judges. BAIN, Administrative Patent Judge. DECISION ON APPEAL Appellants 1 appeal under 35 U.S.C. § 134(a) from the Examiner's Final Rejection of claims 1, 3-16, and 18-25, which constitute all claims pending in the application. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. STATEMENT OF THE CASE The claimed invention relates to the field of graphical programming, and more specifically, to "edit-time specification of isochronous data 1 Appellants identify National Instruments Corporation as the real party in interest. App. Br. 2. Appeal2015-005323 Application 12/846,970 transfer between function nodes in a system diagram." App. Br. 3; Abs. Claims 1 and 16 are independent. Claim 1 is illustrative of the invention and the subject matter of this appeal, and reads as follows: 1. A computer-implemented method, comprising: utilizing a computer to execute program instructions stored in a tangible nontransitory computer-readable medium to perform: displaying a system diagram on a display of the computer at edit time, wherein the system diagram comprises a plurality of device icons corresponding to respective devices, wherein each device icon has an associated respective one or more executable function nodes specified for deployment on the corresponding device, wherein the function nodes are interconnected to form a distributed graphical program stored in a memory of the computer that is deployable and executable in a distributed manner on the devices; receiving user input to the system diagram at edit time specifying isochronous data transfer among two or more of the function nodes, wherein said receiving user input to the system diagram at edit time specifying isochronous data transfer among t\'l/O or more of the function nodes comprises: receiving user input interconnecting the two or more function nodes, wherein each interconnection comprises a respective isochronous data flow wire that specifies isochronous data transfer between two function nodes; automatically determining invocation timing relationships among the two or more of the function nodes at edit time based on the specified isochronous data transfer, including determining phase relationships between execution of the two or more function nodes; displaying the determined invocation timing relationships among the two or more function nodes at edit time; and configuring the distributed graphical program in the memory of the computer based on the invocation timing relationships at edit time, wherein the graphical program is deployable and executable in a distributed manner on the devices according to the determined invocation timing relationships, and 2 Appeal2015-005323 Application 12/846,970 wherein during execution of the graphical program, data are transferred isochronously between the two or more function nodes. App. Br. 18-19 (Claims App.) (emphases added). Claims 1, 3-16, and 18-25 stand rejected under pre-AIA 35 U.S.C. § 103(a) as unpatentable over Makowski et al. (US 2003/0234802 Al; pub. Dec. 25, 2003) ("Makowski") and Komerup et al. (US 2007 /0203683 Al; pub. Aug. 30, 2007) ("Komerup"). Final Act. 2-28. ANALYSIS We have reviewed the Examiner's rejections in light of Appellants' arguments presented in this appeal. Arguments which Appellants could have made but did not make in the Briefs are deemed to be waived. See 37 C.F.R. § 41.37(c)(l)(iv). On this record, we are not persuaded the Examiner erred. We adopt as our own the findings and reasons set forth in the rejections from which this appeal is taken and in the Examiner's Answer, and highlight the following for emphasis. Claims 1, 3, 5, 11-16, 18, and 20 Appellants group claims 1, 3, 5, 11-16, 18, and 20 for the purpose of argument, and we (like Appellants) choose claim 1 as representative of the group. See 37 C.F.R. § 41.37(c)(l)(iv). Appellants first argue the Examiner erred in finding Makowski teaches a "system diagram," an element that is recited in several limitations in claim 1. App. Br. 11-12. Specifically, Appellants assert Makowski is directed to "graphical programs, not systems diagrams" as claimed. App. Br. 11 (emphasis omitted). Appellants' Specification defines "system diagram" as a "diagram with one or more device icons and graphical program code, wherein the 3 Appeal2015-005323 Application 12/846,970 device icons are use[d] to specify and/or visually indicate where different portions of graphical program code are deployed/executed." Spec. i-f 63. As the Examiner finds, Makowski teaches such a diagram. Ans. 20-21. Makowski teaches a graphical programming environment including a block diagram on which a programmer can connect different function nodes by "drawing wires." Id. (citing Makowski i-fi-120, 22, 69-70, 98). The programming environment includes a user interface having "icons representing devices to be controlled." Id. (citing Makowski i-fi-169-70, 98, Figs. 2a, 2b); see also Makowski Figs. 7a, 7b; Komerup i-f 8 (cited in Ans. 21 ). In one embodiment described in Makowski, these features are part of the programming tool "Lab VIEW," a tool which (according to Makowski and the Examiner, and not disputed by Appellants) is well known in the art. Ans. 21 (citing Makowski i-fi-120, 22); see also Makowski i-fi-113, 62. Further, as the Examiner finds, the diagram in Makowski includes device icons and graphical program code, just as in the "system diagram" defined in Appellants' Specification and recited in claim 1. Ans. 21 (citing Makowski ,-r 69). We, therefore, discern no error in the Examiner's finding that Makowski teaches a "system diagram" as recited in Appellants' claim 1. Appellants also argue the Examiner erred in finding the prior art teaches "determining invocation timing relationships among the two or more of the function nodes at edit time," as recited in claim 1. App. Br. 9-10. The Examiner finds this element in Komerup. Ans. 15-16. We agree with the Examiner's finding. Komerup teaches "in a data flow graphical diagram, the graphical diagram may include a plurality of wires that indicate data flow between nodes in the graphical program" and that the user "may 4 Appeal2015-005323 Application 12/846,970 specify a timing relationship" among such nodes. Komerup iii! 21, 224, 229; Ans. 15 (emphasis added). As the Examiner finds, Komerup further teaches the foregoing timing relationship is determined using a "diagram editor" (and thus "at edit time"). Ans. 15 (citing Komerup iii! 7, 23) (emphasis added); see also Komerup if 89. Moreover, as the Examiner further finds, Makowski also teaches editing the graphical block diagram (including timing elements) either at "run-time or edit time." Ans. 16 (citing Makowski iii! 8, 10) (emphasis added). Accordingly, on the record before us, we agree with the Examiner's finding that the references teach "determining invocation timing relationships among the two or more of the function nodes at edit time." Appellants also argue Komerup fails to teach an "isochronous data flow wire that specifies isochronous data transfer between two function nodes." App. Br. 7-8. The Examiner, however, relies on the combination of Makowski and Komerup as teaching this limitation, Ans. 5. Accordingly, we are not persuaded of error. See In re Keller, 642 F.2d 413, 426 (CCPA 1981) ("one cannot show non-obviousness by attacking references individually where ... the rejections are based on combinations of references"). Appellants remaining arguments regarding claim 1 are either redundant to those discussed above, or are unpersuasive of error for similar reasons. For the foregoing reasons, we sustain the rejection of claims 1, 3, 5, 11-16, 18 and 20 under pre-AIA 35 U.S.C. § 103(a) as unpatentable over Makowski and Komerup. 5 Appeal2015-005323 Application 12/846,970 Remaining Claims Appellants argue the remaining dependent claims separately, asserting the Examiner erred for reasons in addition to the alleged errors regarding independent claim 1 (and independent claim 16), discussed above. We disagree. Regarding dependent claims 4 and 19, Appellants argue (inter alia) the prior art fails to teach "clock symbol" and "clock disciplining wire," as recited in the claims App. Br. 12-13. As the Examiner finds, however, Komerup teaches a user interface including a "clock symbol representing a time source of the timed loop." Ans. 26-29 (citing Komerup Figs. 6, 7, i-fi-f 124, 144). Komerup further teaches that the user "may connect a wire [the clock disciplining wire] specifying the timing source (clock) of the device." Id. at 28; see also Ans. 28 (citing Komerup i-fi-f 127, 144-48, 154) (connecting "wires" to dynamically specify the loop's "timing" sources and other timing information and properties). Accordingly, we discern no error in the Examiner's findings. Regarding dependent claims 6 and 21, Appellants argue the Examiner erred in finding the prior art teaches "if input data are not available" to a function node on the isochronous data flow wire, "the function node continues to execute in accordance with the function node's specified execution rate . ... " App. Br. 13-14 (emphasis added). The disputed portion of the limitation, however, is conditional. If input data are available (as opposed to "not available" pursuant to the claim limitation), the claim requires no further steps. We, therefore, afford the disputed limitation no patentable weight. See Ex parte Schulhauser, Appeal 2013-007847, slip op. 6-10 (PTAB April 28, 2016) (precedential). Even ifthe limitation were 6 Appeal2015-005323 Application 12/846,970 entitled to patentable weight, we agree with the Examiner's findings that the limitation is taught by the combination of Makowski and Komerup. Ans. 8- 13, 29. Regarding dependent claims 7 and 22, Appellants argue the Examiner erred in finding Komerup teaches "displaying timed invocation wires connecting the timing generator to each of the two or more function nodes in the system diagram .... " App. Br. 14--15. We disagree. As cited in the Final Action and Answer, Komerup teaches displaying a timing generator (clock source) connected to multiple function nodes (such as "Read" and "Write"). Ans. 31-34. To the extent Appellants contend the display of Komerup is not "in [the] system diagram," Appellants' argument is not persuasive because it ignores the combination of references cited by the Examiner. See In re Keller, 642 F.2d at 426, supra at 5. Furthermore, as discussed above, we discern no error in the Examiner's finding of a "system diagram" taught in the prior art. See supra at 4. Appellants further allege the Examiner erred in rejecting claims 8 and 23, and erred in rejecting claims 10 and 25. App. Br. 15-17. In both instances, however, Appellants fail to specify the Examiner's alleged error, and thus we find none. See In re Jung, 637 F.3d 1356, 1365 (Fed. Cir. 2011) (merely asserting the prior art does not teach a particular element, with no meaningful explanation, is unpersuasive of error); 37 C.F.R. § 41.37(c)(l)(iv). Finally, Appellants argue the Examiner erred in rejecting claims 9 and 24, because (according to Appellants) neither Komerup nor Makowski mentions a "timing diagram" indicating "timing relationships among the two or more function nodes," as recited in the claims. App. Br. 16. We disagree. 7 Appeal2015-005323 Application 12/846,970 As the Examiner finds, Komerup teaches graphical display of a "timed loop." Ans. 36 (citing Komerup Figs. 6, 7, i-fi-f 124--27). Komerup's timed loop, like Appellants' "timing diagram," indicates the timing relationship between functional nodes in a graphical program. Id. It is irrelevant that Komerup does use the label "timing diagram," because a determination of obviousness does not require the claimed invention to be expressly suggested by any one or all of the references. See e.g., In re Keller, 642 F.2d 413, 425 (CCPA 1981). The Examiner was not required to "seek out precise teachings directed to the specific subject matter of the challenged claim" as argued by Appellants. KSR Int'! Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007). Rather, the Examiner's obviousness analysis could "take account of the inferences and creative steps that a person of ordinary skill in the art would employ," id., as well as "include recourse to logic, judgment, and common sense available to the person of ordinary skill that do not necessarily require explication in any reference or expert opinion," Perfect Web Techs., Inc. v. InfoUSA, Inc., 587 F.3d 1324, 1329 (Fed. Cir. 2009). Accordingly, notwithstanding the difference in nomenclature between Appellants' "timing diagram" and Komerup's "timed loop" graphic, we discern no error in the Examiner's finding that Komerup teaches the disputed limitation. For the foregoing reasons, we sustain the Examiner's rejection of claims 4, 6-10, 19, and 21-25 under pre-AIA 35 U.S.C. § 103(a) as unpatentable over Makowski and Komerup. DECISION We affirm the Examiner's decision rejecting claims 1, 3-16, 8 Appeal2015-005323 Application 12/846,970 and 18-25. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv). See 37 C.F.R. § 41.50(f). AFFIRMED 9 Copy with citationCopy as parenthetical citation