Ex Parte Chan et al

Patent Trial and Appeal Board

Oct 30, 2017

11494413 (P.T.A.B. Oct. 30, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
1098.P0008US 2057
EXAMINER
KING, DOUGLAS
ART UNIT PAPER NUMBER
2824
MAIL DATE DELIVERY MODE
11/494,413 07/27/2006
79662 7590
James M. Wu
JW Law Group
84 W. Santa Clara Street
Suite 820
San Jose, CA 95113
Vei-Han Chan
10/31/2017 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE
THE PATENT TRIAL AND APPEAL BOARD
Ex parte VEI-HAN CHAN,1
Louis Kordus, Narbeh Derhacobian, and Jason Golbus
Appeal 2016-004795
Application 11/494,413
Technology Center 2800
Before JEFFREY T. SMITH, MARKNAGUMO, and JEFFREY R. SNAY,
Administrative Patent Judges.
NAGUMO, Administrative Patent Judge.
DECISION ON APPEAL
Vei-Han Chan, Louis Kordus, Narbeh Derhacobian, and Jason Golbus
(“Chan”) timely appeal under 35 U.S.C. § 134(a) from the Final Rejection2
of all pending claims 1—20. We have jurisdiction. 35 U.S.C. § 6.
We affirm.
1 The real party in interest is identified as Agate Logic Incorporated
(Appeal Brief, filed 23 June 2014 (“Br.”), 3.)
2 Office action mailed 23 January 2014 (“Final Rejection”; cited as “FR”).
Appeal 2016-004795
Application 11/494,413
OPINION
A. Introduction3
The subject matter on appeal relates to methods of programming
(independent claims 1, 7, and 13) a phase change device (“PCD”)
(independent claim 17). The devices of interest are based on chalcogenic
compounds (i.e., compounds that are based on S, Se, and Te) that can be
transformed between an amorphous state and a crystalline state.
(Spec. 1 [0002].) The amorphous state is obtained by heating the material
above its melting point, followed by rapid cooling. (Id.) In contrast, the
crystalline state is obtained by gradual cooling from the melt. (Id.)
Generally, the amorphous and crystalline states have different electrical
conductivities (typically, the amorphous state has high electrical resistance
while the crystalline state has low electrical resistance) or different optical
properties. (Id. at [0003].) Thus, a memory device, such as a rewritable
compact disk (CD) or digital video disk (DVD), may be realized.
Notwithstanding these examples, in which the heating is accomplished,
typically, via exposure to a laser beam, the devices of interest in this appeal
heat the phase-change material by passing pulses of electrical current
through the material. (Id.)
According to the '413 Specification, prior art methods use a short,
high magnitude rectangular “reset” pulse to induce the amorphous phase,
followed by a longer, lower magnitude “set” pulse to induce the crystalline
3 Application 11/494,413, Method and apparatus for programming phase
change devices, filed 27 July 2006. We refer to the “'413 Specification,”
which we cite as “Spec.”
2
Appeal 2016-004795
Application 11/494,413
phase without heating the material to the amorphizing temperature Tm.
{Id. at 3 [0006].) However, the increased duration of the programming
pulses is said to slow the programming speed, and cell-to-cell variations of
the optimum crystallizing temperature are said to result in reduced dynamic
range of high and low resistance devices and increased variability of
resistance values. {Id. at 4 [0008].) In particular, the prior art methods are
said to be incapable of distinguishing between “soft” devices, which are set
by lower current pulses, and “hard” devices, which require higher current
pulses to be set, as shown in Figure 4, reproduced below.4
a-ftCv’
5 r5 t i r i!
: \ , i
\
' \ j ,
; t >2 (Knit} f | <2
Citp*w(
(Figure 4 shows the variation in the set current for soft and hard cells}
Thus, the current I2(min) necessary to set a soft PCD to the low resistance
state is insufficient to set a typical or a hard PCD. On the other hand, the
current 12(max) necessary to set a hard device in the crystalline, low
resistance state, is sufficient to leave a soft or typical PCD in the amorphous
high resistance state. Moreover, the programming characteristics of the
memory devices are said to change over the lifetime of the device, but the
fixed magnitude pulses of the prior art methods are unable to afford the
flexibility required to adapt to those changes. {Id.)
4 The Specification reveals that “program devices at the soft and hard tails
of the population . . . typically constitute only about 1% of the entire device
population on a given chip.” (Spec. 5 [0010].) Thus, the “typical” PCDs
comprise the vast majority, -99%, of devices on a chip.
3
Appeal 2016-004795
Application 11/494,413
Chan seeks patent protection for a method and device for
programming such phase-change memory devices that are said to overcome
these problems. In embodiment 805 shown in Figure 8, below, right,
a “programming current pulse (i.e., ‘set’ pulse)” is applied to a PCD at
step 804. (Spec. 10 [0028].) The
programming pulse generator is ther>
deselected and a verily m
circuit is selected at
step 805. The verify circuit
measures the resistance of
the PCD without affecting
the set state. (Id.) If the
resistance is not in the
desired range (e.g., it is too
high) (808), and if the
maximum number of set
pulses in the first set of
programming pulses has not
been applied (810), another
first-sequence pulse
(steps 802, 804) is applied.
(Id. at 11 [0029].)
-frf SUCCESS; ENP
FIGURE 8
(Fig. 8 shows a flow chart of a PCD programming process}
5 Throughout this Opinion, for clarity, labels to elements or steps are
presented in bold font, regardless of their presentation in the original
document.
4
Appeal 2016-004795
Application 11/494,413
If the maximum number of first-sequence pulses has been applied, and the
preselected maximum programming time has not been exceeded, a pulse
from a subsequent sequence may be selected and applied (steps 800-804).
(Id.) PCDs that cannot be set can be labeled as defective. (Id. at [0030].)
A train of sequences of programming and verifying pulses is
illustrated in Figure 11, below.
voltage
/current
1100 1t02 1104
(Figure 11 shows three sequences of set pulses with verily pulses}
The magnitude of a current pulse may be adjusted via a current
generator coupled with one or more current mirrors, as illustrated in Figure 9
(not reproduced here). (Spec. 12 [0032].)
Claim 1 is representative and reads:
A method of programming a phase change device,
comprising:
[1] applying [804] a first programming pulse generated by
a pulse generator having a first magnitude and first pulse
duration to a phase change device (“PCD”)
5
Appeal 2016-004795
Application 11/494,413
if[ 810] a counter configured to count number of set
programming pulse applied is less than a predefined
maximum allowable number of set programming pulses',
[2] after incrementing said counter,
[806] deselecting said pulse generator from coupling to
said PCD and coupling said PCD to a verily circuit which
subsequently passes a test current through said PCD;
[3] determining [808] whether a programmed resistance of
said PCD is in accordance with a predetermined target
resistance specification based on said test current
generated by the verily circuit;
[4] identifying [810] whether said counter exceeds a
predefined maximum allowable number of set
programming pulses,
if [808] said programmed resistance is not in accordance
with said predetermined target resistance specification;
[5] [802] deselecting said verify circuit from coupling to
said PCD and coupling said PCD to said pulse generator,
if [810] said counter is less than said predefined
maximum allowable number of set programming pulses;
[6] [800] adjusting a control device associated with one
or more current mirrors to generate a second
programming pulse; and
[7] [804] applying said second programming pulse having
a second magnitude and second pulse duration to said PCD
if [810] said counter is less than said predefined maximum
allowable number of set programming pluses [sic] and
if [808] said programmed resistance associated with said
PCD is not in accordance with said predetermined target
resistance specification.
(Claims App., Br. 48-49; some indentation, paragraphing, emphasis, and
bracketed labels to Figure 8 and to arguments in the Brief added.)
In light of the definition of “programming pulses” as “set pulses”
(Spec. 10 [0028]), it appears to be assumed that the memory devices
(i.e., individual memory locations) are all initially reset (to the amorphous
6
Appeal 2016-004795
Application 11/494,413
high resistance state), and that the programming pulses are “set” pulses that
result in the transition to the crystalline, low resistance phase. Moreover, it
appears that a series of programming pulses must be to some extent additive
in their phase-changing (crystallizing) effect. It may be noted further that
rather than specifying a maximum time period for applying pulses, claim 1
specifies a maximum number of pulses.
The Examiner maintains the following grounds of rejection6,7:
A. Claims 1—19 stand rejected under 35 U.S.C. § 103(a) in view of
the combined teachings of Lowrey,8 Hollmer,9 and
Scheuerlein.10
Al. Claim 20 stands rejected under 35 U.S.C. § 103(a) in view of the
combined teachings of Lowrey, Hollmer, Scheuerlein, and Ma.11
6 Examiner’s Answer mailed 30 July 2014 (“Ans.”).
7 Because this application was filed before the 16 March 2013, effective
date of the America Invents Act, we refer to the pre-AIA version of the
statute.
8 Tyler A. Lowrey and Ward D. Parkinson, Method and system to store
information, 2004/0114419 (2004) (issued as U.S. Patent No. 6,813,177 B2
(2 November 2004)).
9 Shane Hollmer and Pau-Ling Chen, Auto adjusting window placement
scheme for an NROM virtual ground array, U.S. Patent No. 6,222,768 B1
(2001).
10 Roy E. Scheuerlein, Structure and method for biasing phase change
memory array for reliable writing, U.S. Patent Application Publication
2006/0157679 Al (20 July 2006), based on an application
filed 19 January 2005.
11 Herman Ma, Phase change based memory device and method for
operating same, U.S. Patent Application Publication 2005/0088872 Al
(28 April 2005).
7
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Application 11/494,413
B. Discussion
The Board’s findings of fact throughout this Opinion are supported by
a preponderance of the evidence of record.
Chan’s arguments for patentability are largely directed to limitations
indicated by the bracketed single digits recited in claim 1, reproduced supra.
Thus, claims 2—15 stand or fall with claim 1. (Br. 41.) Nominally separate
arguments are presented for claims 16 and 17 (id. at 41—46), which we
address separately, but separately rejected claim 20 stands or falls with
claim 17 (id. at 46).
The Examiner finds that Lowrey describes a method of programming
a phase change device by applying one or more sets of programming pulses
having varying magnitudes and durations, as shown in Figure 3, reproduced
below as annotated by the Examiner (FR 3).
A
(Lowrey Figure 3 shows a set of PCD programming pulses}
8
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Application 11/494,413
The Examiner finds further that the resistance of the phase change material
may be measured after each of programming pulses 200-207. {Id. at 2,
citing Lowrey 3 [0027] and 4 [0043].) Indeed, as Chan points out (Br. 27—
28), Lowery discloses the amplitude and duration of each of the
programming pulses in Figure 3, and the resistance of the phase change
material after each programming pulse (Lowery 4 [0039]—[0040]).
The Examiner finds that Lowrey does not describe a counter of set
programming pulses, and thus Lowrey does not compare the number of set
programming pulses to a predefined maximum allowable number of set
programming pulses. (FR 4,11. 1—5.) The Examiner finds, however, that
Hollmer teaches this known technique for ending a verification of a memory
device in Figure 5 (not reproduced here), checking if the pulse count has
reached the maximum value at (s5), providing a pulse (s6) and incrementing
the pulse counter (s7), and repeating until the pulse count reaches the
maximum value. {Id. at 4, 1st full para.)12 The Examiner reasons that it
would have been obvious to incorporate such a pulse-count controlled
scheme in the programming method described by Lowery. {Id.)
The Examiner also finds that Lowery does not describe a mechanism
for generating the second programming pulse, and does not describe a
control device associated with one or more current mirrors. {Id. at last para.)
The Examiner finds that such a technique is described by Scheuerlein in
12 When the maximum count value is reached, an automatic adjustment to
the reference current level from a reference memory cell is performed (s8—
sl2) (Hollmer col. 10,11. 53—66), subject to a maximum current
adjustment (s9), beyond which, the device is deemed to have failed (slO)
{id. at 11. 53-60).
9
Appeal 2016-004795
Application 11/494,413
Figure 8 (not reproduced here), in which a pulse current is adjusted via
current mirror 70. The Examiner concludes that it would have been obvious
to use such a known system to control the magnitude of the current
programming pulses provided by Lowrey, which, as shown in Figure 3,
supra, vary in both magnitude and duration. (FR 5, 1st full para.)
Chan argues that Lowery cannot render the claimed subject matter
obvious because, with respect to element [1], “Lowrey does not mention
and/or disclose any condition(s) before application of signals.” (Br. 21, last
para.). With regard to Hollmer, Chan argues that “the number of set
programming pulse applied is not the same or equivalent to the number of
repetitions allotted for verification.” (Id. at 38, 1st full para.) “As can be
seen,” Chan continues, “Hollmer has never disclosed that its pulse counter
can be used to count number of set programming pulse applied.” {Id.) With
regard to Scheuerlein, Chan urges that “Scheuerlein . . . has never disclosed
a method of adjusting one or more current mirrors to generate a (i.e., second)
programming pulse.” {Id. at 35.) Moreover, Chan adds, “Lowrey has never
disclosed ‘adjusting a control device ... to generate a second programming
pulse,’ as recited in Claim 1.” (Id.) Chan concludes the rejection must be
reversed.
These arguments are not persuasive of harmful error in the appealed
rejection because they address the teachings of the references individually,
not in combination, as applied by the Examiner. In particular, Chan does not
challenge in any substantial way the Examiner’s reasoning that the routineer
would have found it obvious to compare the number of identical pulses in
each of the distinct sequences of pulses having different durations and
magnitudes suggested by Lowrey in Figure 3 to a preset number of pulses
10
Appeal 2016-004795
Application 11/494,413
based on the verification procedure taught by Hollmer. Both Lowrey and
Hollmer provide for the use of multiple pulses to change the state of a
memory device, and both provide criteria for determining when the state has
been changed. Adding a predetermined limit on the number of pulses
applied to change the state of the memory, as suggested by Hollmer, would
have been, on the present record, a logical extension to the method described
by Lowrey. Nor has Chan explained satisfactorily why it would not have
been obvious to use the current mirror disclosed by Scheuerlein to provide
pulses having different magnitudes as the pulses in each sequence taught by
Lowrey.
Regarding element [2], Chan urges that “Lowrey has never disclosed
that generator 160 is deselected and/or circuit (150) passes a test current.”
(Br. 23, end of first full para.) Moreover, in Chan’s view, Lowrey does not
disclose that the deselection of the pulse generator from coupling to the PCD
and the coupling of a verily circuit to the PCD occurs after incrementing a
pulse counter.
As the Examiner explains in more detail in the Examiner’s Answer,
the writing and reading described by Lowrey at [0027] and [0028] do not
occur at the same time. (Ans. 3, last para.) Given the generality of the
description of “coupling” and “decoupling” in the '413 Specification, the
Examiner reasons, those terms are interpreted broadly, as “active” and
“inactive,” respectively. {Id. at 4, 1 st para.) As for the test current, the
Examiner finds that Lowrey distinguishes between the current required to
determine the resistance and the current required to induce a change in the
resistance. {Id. at 4, 2d para., citing Lowery [0026] and [0043].) The
preponderance of the evidence of record supports the Examiner’s findings
11
Appeal 2016-004795
Application 11/494,413
and the conclusions based on those findings. Accordingly, we find no merit
in Chan’s objections with respect to element [2],
Regarding element [3], Chan urges that Lowrey discloses a method of
changing the resistance of memory cells by applying signals 200—207, but
doesn’t disclose “determining whether a programmed resistance of said PCD
is in accordance with a predetermined target resistance ...” as recited in
claim 1. (Br. 26, 1st para.)
We perceive no merit in this objection. Lowrey teaches, in
paragraph [0043], as quoted by Chan (Br. 25), that “[t]he resistance of the
phase change material of memory cell 140 may be measured to determine if
the target resistance is reached after application of signals 200-207.”
Particularly in light Lowrey’s disclosure of the resistance of the cell after
each application (Lowrey [0039]—[0040]), cited by Chan (Br. 27—28), as
well as other disclosures, such as Lowrey [0030]—[0032], which describe
iterative phase changing pulses followed by readings of resistance, we have
no difficulty concluding that it would have been obvious to measure the
resistance of the PCD after every programming pulse.
Likewise, we perceive no merit in Chan’s insistence that Lowrey “has
never disclosed the claimed element of ‘identifying whether said counter . . .
if said programed resistance is not in accordance with said predetermined
target resistance specification.” (Br. 28., last full para.) This aspect of
element [4] of claim 1 appears to be identical to the “target resistance”
mentioned in Lowrey [0043]. Moreover, Chan does not explain
satisfactorily why, in view of the maximum pulse number described by
Hollmer, it would not have been obvious to provide a maximum number of
12
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Application 11/494,413
programming pulses in any of the sets of programming pulses applied by
Lowrey.
Chan objects that the Examiner erred in holding element [5] obvious
because “Lowrey has never disclosed the term(s) or equivalent or
‘deselecting said verify circuit from coupling said PCD and coupling said
PCD to said pulse generator if said counter is less than (Br. 30, last
full para.)
This issue is parallel to element [2], and we find it unpersuasive of
harmful error for parallel reasons.
Finally, Chan urges that the Examiner erred in holding the control
device associated with one or more current mirrors (element [6]) and
applying the second programming pulse (with a second magnitude and a
second pulse duration) (element [7]) obvious. (Br. 31—36.)
We find no persuasive merit in Chan’s contentions, given that Lowrey
discloses, in Figure 3, additional sets of programming pulses having
different magnitudes and durations.
Chan’s arguments {id. at 38, 1st full para.) regarding claim 1613
(Claims App., Br. 54) are essentially cumulative with the arguments against
element [7], and we find them no more persuasive of harmful error.
Chan’s arguments regarding claim 17 essentially repeat the arguments
discussed supra, that Lowrey and Hollmer do not render obvious counting
13 Claim 16 depends from claim 13, and requires that the second sequence of
programming pulses have at least one having “a different magnitude and/or
duration” than at least one pulse of the first sequence.
13
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Application 11/494,413
the number of set pulses applied (id. at 44), and that Lowrey does not
disclose a control circuit capable of controlling PCD connection in response
to PCD behavior (id. at 45). Both these arguments, as discussed supra, were
addressed satisfactorily by the Examiner. We are thus not persuaded of
harmful error in the rejection of claim 17 and the claims that depend from it.
We have considered Chan’s lengthy Reply,14 but find it essentially
repetitive of the arguments set out in the principal Brief, and therefore not
persuasive of harmful error.
C. Order
It is ORDERED that the rejection of claims 1—20 is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).
AFFIRMED
14 Reply Brief filed 30 September 2014 (“Reply”).
14