Ex Parte Caspole et al

Patent Trial and Appeal Board

May 17, 2017

12849724 (P.T.A.B. May. 17, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
12/849,724 08/03/2010 Eric R. Caspole 5800-37500 8398
53806 7590 05/19/2017
MEYERTONS, HOOD, KIVLIN, KOWERT & GOETZEL (AMD)
P.O. BOX 398
AUSTIN, TX 78767-0398
EXAMINER
BIRKHIMER, CHRISTOPHER D
ART UNIT PAPER NUMBER
2136
NOTIFICATION DATE DELIVERY MODE
05/19/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
patent_docketing@intprop.com
ptomhkkg @ gmail .com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte ERIC R. CASPOLE and LAURENT MORICHETTI
Appeal 2016-008727
Application 12/849,7241
Technology Center 2100
Before JEAN R. HOMERE, KEVIN C. TROCK,
and MICHAEL M. BARRY, Administrative Patent Judges.
HOMERE, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
Appellants seek our review under 35 U.S.C. § 134(a) of the
Examiner’s Final rejection of claims 1, 2, 4—10, 12, 14—18, and 22—25,
which constitute all of the claims pending in this appeal. Claims 3, 11, 13,
and 19-21 have been canceled. Claims App’x. We have jurisdiction under
35 U.S.C. § 6(b).
We affirm.
1 Appellants identify the real party in interest as Advanced Micro Devices,
Inc. App. Br. 2.
Appeal 2016-008727
Application 12/849,724
Appellants ’ Invention
Appellants’ invention is directed to a method and system for
distributing between a computer processing unit (CPU-100A) and a graphic
processing unit (GPU 100 B) initialization of a memory region (64) within a
computer system (10). Fig. 1, Spec. 1 5. In particular, upon receiving an
indication that an object is to be instantiated, a virtual machine running on a
first processing element (e.g., CPU 100A) begins the initialization of a
memory region large enough to instantiate the object, and subsequently
transmits initialization instructions to a second computing element (e.g.,
GPU), which writes into the memory region (64) to complete the
initialization. Id. ]Hf 30—32.
Illustrative Claim
Independent claim 1 is illustrative, and reads as follows:
1. A non-transitory computer readable medium having program
instructions stored thereon that are executable by at least a first
type of processing element of a computing device to perform
operations including:
responsive to an indication that a new object is to be
instantiated by a virtual machine running on the first type of
processing element of the computing device, determining a size
of a memory region of the computing device to be initialized;
the indication being received at the virtual machine
running on the first type of processing element, and responsive
to the indication, the virtual machine causing initialization of
the memory region to be handled by a second type of
processing element of the computing device rather than being
handled by the virtual machine using the first type of
processing element;
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Application 12/849,724
wherein causing the initialization to be handled by the
second type of processing element includes the second type of
processing element writing to the memory region in
conjunction with a memory controller responsive to instructions
received from the virtual machine running on the first type of
processing element that are based on the indication that the new
object is to be instantiated by the virtual machine, and includes
the second type of processing element initializing data at least
the size of the memory region;
wherein the second type of processing element is
different than the first type of processing element, and wherein
the memory controller is separate from the first and second
types of processing element.
Webopedia, "Virtual Machine", May 24, 2002, p.l, https://web.arch
ive.org/web/20021212145032/http://www.webopedia.com/TERM/V
/virtual_machine.Html (“Webopedial”).
Webopedia, "DMA", Sept. 1, 1996, pp. 1—2,
https ://web.arch ive.org/web/2002081
6042144/http://www.webopedia.com/TERM/D/DMA.html
(“Webopedia4”).
Prior Art Relied Upon
Cook
Dewey
Fultheim et al.
Stubbs et al.
Sinclair
Haridas et al.
Michalak et al.
Tene et al.
US 2003/0135533 Al July 17, 2003
US 2004/0236933 Al Nov. 25, 2004
US 2005/0039180 Al Feb. 17, 2005
US 7,152,143 B2 Dec. 19, 2006
US 7,409,489 B2 Aug. 5, 2008
US 7,464,243 B2 Dec. 9, 2008
US 2009/0089515 Al Apr. 2, 2009
US 7,552,302 B1 June 23, 2009
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Application 12/849,724
Webopedia, "API", June 21, 2000, pp. 1—2,
http://web.archive.org/web/20000621114956/http://www.webopedia.c
om/TERM/A/API.html (“Webopedia3”).
Webopedia, "Library", Apr. 11, 2001, pp. 1—2,
http://web.archive.Org/web/20010411031558/http://www.webopedia.c
om/TERM/l/library.html (“Webopedia2”).
TechTerms, "DMA (Direct Memory Access)", Oct. 12, 2007, pp. 1—2,
http://web.archive.Org/web/20071012025553/http://www.techterms.co
ml definition/ dma.
Jim Handy, "The Cache Memory Book: The Authoritative Reference
On Cache Design", Second Edition, 1998, pp. 8—14, 46-47, 156—86,
and 204.
Rejections on Appeal
Claim 24 stands rejected under 35U.S.C. § 112, second paragraph, as
being indefinite for failing to particularly point and distinctly claim the
subject matter, which Appellants regard as the invention. Final Act. 2—3.
Claims 1, 2, 4, 7, 9, and 24 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over the combination of Michalak, Dewey, and
Webopedial. Final Act. 3—9.
Claim 5 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Michalak, Dewey, Webopedial, and
Sinclair. Final Act. 10—11.
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Application 12/849,724
Claim 6 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Michalak, Dewey, Sinclair, and
Webopedial, Webopedia2, and Webopedia3. Final Act. 11—12.
Claim 8 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Michalak, Dewey, Webopedial, and
Jim Handy. Final Act. 13—14.
Claims 10 and 25 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Michalak, Dewey, Tene, and
TechTerms. Final Act. 14—19.
Claim 12 stands rejected under 35 U.S.C. 103(a) as being
unpatentable over the combination of Michalak, Dewey, Tene, TechTerms,
and Sinclair. Final Act. 19—20.
Claim 14 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Michalak, Dewey, Tene, TechTerms,
and Haridas. Final Act. 20—21.
Claims 15, 16, and 18 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over the combination of Michalak, Dewey, and Tene.
Final Act. 21—27.
Claim 17 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Michalak, Dewey, Tene, Jim Handy.
Final Act. 27—30.
Claim 22 stands rejected under 35 U.S.C. 103(a) as being
unpatentable over the combination of Michalak, Dewey, Webopedial, and
Stubbs. Final Act. 28—30.
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Claim 23 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Michalak, Dewey, Webopedial, and
Webopedia4. Final Act. 30—32.
ANALYSIS
We consider Appellants’ arguments seriatim, as they are presented in
the Appeal Brief, pages 7—15, and in the Reply Brief pages 2—7.2 We have
reviewed the Examiner’s rejections in light of Appellants’ arguments. We
are unpersuaded by Appellants’ contentions. Except as indicated otherwise,
we adopt as our own the findings and reasons set forth in the rejections from
which appeal is taken and in the Examiner’s Answer in response to
Appellants’ Appeal Brief. See Ans. 2—5, Final Act. 2—34. However, we
highlight and address specific arguments and findings for emphasis as
follows.
Indefiniteness Rejection
Appellants argue that claim 24 is not indefinite because the recitation
“wherein an indication being received at the virtual machine comprises the
virtual machine generating the indication” is supported by Specification.
App. Br. 7 (citing Spec. 144). In particular, Appellants argue that the
2 Rather than reiterate the arguments of Appellants and the Examiner, we
refer to the Appeal Brief (filed January 27, 2016), the Reply Brief (filed
September 22, 2016), and the Answer (mailed July 22, 2016) for their
respective details. We have considered in this Decision only those
arguments Appellants actually raised in the Briefs. Any other arguments
Appellants could have made but chose not to make in the Briefs are deemed
to be waived. See 37 C.F.R. § 41.37(c)(l)(iv) (2013).
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Specification discloses a first embodiment wherein a control program
including an initialization routine is executable to receive a memory request
from a user program. Id. Further, Appellants argue that the Specification
discloses a second embodiment wherein the control program generates the
memory request internally. Id. Consequently, Appellants submit that the
Specification supports that an indication received at the virtual machine may
be internally generated. Id. These arguments are not persuasive.
Our reviewing court has held that the test for definiteness under 35
U.S.C. § 112, second paragraph, is whether “those skilled in the art would
understand what is claimed when the claim is read in light of the
specification.” Orthokinetics, Inc. v. Safety Travel Chairs, Inc., 806 F.2d
1565, 1576 (Fed. Cir. 1986). Although Appellants note that the Specification
discloses a first embodiment wherein an indication is received at the virtual
machine, and a second embodiment wherein the indication is internally
generated, Appellants have not shown any portion of the Specification
supporting that the two cited embodiments can be used together, as required
by the claim. Therefore, one of ordinary skill in the art, having read the
Specification, would not have been apprised of the scope of the claim. We
thus find unavailing Appellants’ statement that an indication received at the
virtual machine may be generated internally. We agree with the Examiner
that it is unclear as to how an indication internally generated by the virtual
machine can also be received at the virtual machine. Ans. 3. Consequently,
we agree with the Examiner that the claim is ambiguous, confusing, and
therefore indefinite. “[CJlaims are required to be cast in clear—as opposed
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to ambiguous, vague, indefinite—terms. It is the claims that notify the
public of what is within the protections of the patent, and what is not.” In re
Packard, 751 F.3d 1307, 1313 (Fed. Cir. 2014). Accordingly, we sustain the
Examiner’s indefiniteness rejection of claim 24.
Obviousness Rejections
Appellants argue that the combination of Michalak, Dewey, and
Webopedial does not teach or suggest a virtual machine causing a second
type of processing element to initialize the memory region by writing
thereto, as required by claim 1. App. Br. 8—13, Reply Br. 3—6. In particular,
Appellants ague that Dewey does not cure the admitted deficiencies of
Michalak because Dewey is not concerned with initializing a memory
region. App. Br. 10, Reply Br. 4. According to Appellants, Dewey is
instead concerned with initializing a system (e.g. the interface of a GPU) to
work with a particular RAM. Id. (citing Dewey 2, 16, 33). Further,
Appellants argue that Dewey does not teach or suggest the initialization
including writing to the memory region. Id. Appellants submit that
although Dewey discloses storing bit input states, the reference does not
disclose where and how the data is stored. App. Br. 10 (citing Dewey 133).
Furthermore, Appellants argue Dewey’s disclosure of programming the
RAM speed, size, and operating voltage does not teach writing into the
RAM. Reply Br. 5. Additionally, Appellants argue that Webopedial merely
stands for the proposition that virtual machines exist, and therefore fails to
teach or suggest the instantiation of new objects by a virtual machine. App.
Br. 11—13, Reply Br. 6. These arguments are not persuasive.
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At the outset, we note that Appellants’ Specification describes
initialization of a memory region as a processor element writing in the
memory region, thereby allowing the processor element to interface with the
memory region according to received instructions. Spec, 44-47. As
correctly noted by the Examiner, Dewey discloses a GPU interfacing with a
RAM, wherein the GPU assesses the speed, the size, and operating voltage
of the RAM, pursuant to instructions received from a CPU, to thereby
determine the RAM type. Ans. 4 (citing Dewey 133). In particular, Dewey
discloses an initialization procedure using a bit pattern, wherein the GPU is
initialized to work with the RAM by storing bit input states received from
the CPU. Dewey 133. We agree with the Examiner that Dewey’s
disclosure of writing the bit pattern in memory as part of the assessment of
the RAM type teaches or suggests the GPU writing such pattern in the
RAM. One of ordinary skill in the art would have readily appreciated that
such initial interaction of the GPU with the RAM teaches the GPU being
used to initialize the RAM. We further agree with the Examiner that
Webopedial’s disclosure that virtual machine software can be implemented
on a computing system would complement the Michalak-Dewey
combination such that the virtual machine is implemented on the CPU to
instruct the GPU to initialize the RAM. Ans. 4—5. On the record before us,
we are satisfied that the proposed combination of references teaches the
disputed limitations. Accordingly, Appellants have failed to show error in
the obviousness rejection of claim 1. Therefore, we sustain the Examiner’s
35 U.S.C. § 103(a) rejection of claim 1.
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We also sustain the Examiner’s § 103(a) rejection of independent
claims 10 and 15, the patentability of which is argued for similar reasons as
independent claim 1. Appeal Br. 13—15. Dependent claims 2, 4—9, 12, 14,
16—18, and 22—25 are not argued separately, or are only nominally argued
separately, so the rejection of these claims are sustained for the reasons
given for their respective independent claims. See 37 C.F.R.
§ 1.37(c)(l)(iv).
DECISION
We affirm the Examiner’s rejection of claim 24 under 35 U.S.C.
§112, second paragraph. We also affirm the Examiner’s rejections under 35
U.S.C. § 103 (a) of claims 1, 2, ^U10, 12, 1^U18, and 22-25.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv).
AFFIRMED
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