Ex Parte Bruckert et al

Patent Trial and Appeal BoardOct 29, 2012

10953242 (P.T.A.B. Oct. 29, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________________ Ex parte WILLIAM F. BRUCKERT, JAMES S. KLECKA, and JAMES R. SMULLEN ____________________ Appeal 2010-005945 Application 10/953,242 Technology Center 2100 ____________________ Before ALLEN R MACDONALD, KALYAN K. DESHPANDE, and BRYAN F. MOORE, Administrative Patent Judges. DESHPANDE, Administrative Patent Judge. DECISION ON APPEAL Appeal 2010-005945 Application 10/953,242 2 STATEMENT OF CASE 1 The Appellants seek review under 35 U.S.C. § 134(a) of a final rejection of claims 1 and 3-27, the only claims pending in the application on appeal. We have jurisdiction over the appeal pursuant to 35 U.S.C. § 6(b). We AFFIRM. The Appellants invented: [C]omputing system, a plurality of redundant, loosely- coupled processor elements are operational as a logical processor. A logic detects a halt condition of the logical processor and, in response to the halt condition, reintegrates and commences operation in less than all of the processor elements leaving at least one processor element nonoperational. Specification ¶ 0006. An understanding of the invention can be derived from a reading of exemplary claim 1, which is reproduced below: 1. A method for performing a diagnostic memory dump comprising: detecting a halt condition of at least one processor element of multiple redundant processor elements, the processor elements loosely synchronized; maintaining one processor element in a state existing at the halt condition; reloading others of the processor elements whereby the others commence execution; 1 Our decision will make reference to the Appellants’ Appeal Brief (“App. Br.,” filed Dec. 3, 2009) and Reply Brief (“Reply Br.,” filed Mar. 15, 2010), and the Examiner’s Answer (“Ans.,” mailed Feb. 8, 2012), and Final Rejection (“Final Rej.,” mailed Sep. 10, 2008). Appeal 2010-005945 Application 10/953,242 3 copying the state of the maintained one processor element to a storage while the others continue executing, the copying by at least one of the others of the processors; and reintegrating the one processor element when the halt condition copying is complete whereby the one processor element commences execution. REFERENCES The Examiner relies on the following prior art: Hughes Jewett Inaho Gulick US 4,481,578 US 5,295,258 US 5,884,019 US 6,314,501 B1 Nov. 6, 1984 Mar. 15, 1994 Mar. 16, 1999 Nov. 6, 2001 Smullen US 2003/0145157 A1 Jul. 31, 2003 REJECTIONS Claims 1, 4-5, 9, 11, and 25-27 stand rejected under 35 U.S.C. §103(a) as being unpatentable over Smullen, Jewett, and Inaho. Claims 3 and 23-24 stand rejected under 35 U.S.C. §103(a) as being unpatentable over Smullen, Jewett, Inaho, and Hughes. Claims 6 and 12 stand rejected under 35 U.S.C. §103(a) as being unpatentable over Smullen, Jewett, Inaho, and Gulick. Claims 7-8 and 13-22 stand rejected under 35 U.S.C. §103(a) as being unpatentable over Smullen, Jewett, Inaho, Gulick, and Hughes. Appeal 2010-005945 Application 10/953,242 4 ISSUE The issue of whether the Examiner erred in rejecting claims 1 and 3- 27 turns on whether the combination of Smullen, Jewett, and Inaho teaches or suggests “copying the state of the maintained one processor element to a storage while the others continue executing, the copying by at least one of the others of the processors,” and the limitations of claims 3 and 19. ANALYSIS We have reviewed the Examiner’s rejections in light of the Appellants’ contentions that the Examiner has erred. We disagree with the Appellants’ conclusions. We adopt as our own (1) the findings and reasons set forth by the Examiner in the action from which this appeal is taken and (2) the reasons set forth by the Examiner in the Examiner’s Answer in response to the Appellants’ Appeal Brief. We concur with the conclusion reached by the Examiner. We highlight the following arguments for emphasis. Claims 1, 4-5, 9, 11, and 25-27 rejected under 35 U.S.C. §103(a) as being unpatentable over Smullen, Jewett, and Inaho The Appellants contend that the combination of Smullen, Jewett, and Inaho fails to teach or suggest “copying the state of the maintained one processor element to a storage while the others continue executing, the copying by at least one of the others of the processors,” as required by claim 1. App. Br. 11-16 and Reply Br. 1-4. We disagree with the Appellants. The Examine relied on Smullen to describe “copying the state of the maintained one processor element to a Appeal 2010-005945 Application 10/953,242 5 storage while the others continue executing, the copying by at least one of the others of the processors.” Ans. 4-5 (citing Smullen ¶ 0044). The Appellants do not set forth any rationale or evidence to rebut this finding by the Examiner. The Appellants’ arguments point out the deficiencies in Smullen, Jewett, and Inaho regarding features the Examiner has not relied upon these references to describe. App. Br. 11-17 and Reply Br. 2-5. We do not find these arguments to be persuasive because these arguments are tantamount to the Appellants attacking the references individually when the rejection is based on the combination of the cited references. Nonobviousness cannot be established by attacking the references individually when the rejection is predicated upon a combination of prior art disclosures. See In re Merck & Co. Inc., 800 F.2d 1091, 1097 (Fed. Cir. 1986). The Appellants further contend that Smullen and Inaho describe that processor elements not involved in the parallel processing or loose synchronization are responsible for copying of the data dump from the failed processor element and the incorporation of a feature of a processor element involved in loose synchronization is responsible for copying the data dump would change the principle of operation. App. Br. 13. We disagree with the Appellants. Both Smullen and Inaho describe the use of another processor for copying the data dump of the halted or failed processor. Smullen ¶ 0044 and Inaho 3:30-35. As such, Smullen contemplates the use of multiple processors that are either networked or local and does not discourage or discredit the use of the well-known technique of loose synchronization, as described by Jewett. Inaho similarly describes the use of multiple processors in parallel processing and does not explicitly discourage or Appeal 2010-005945 Application 10/953,242 6 discredit having a processor involved in the parallel processing to be responsible for copying the data dump. In other words, a person with ordinary skill in the art would have found it obvious to modify Smullen and Inaho to include the loose synchronization, as described by Jewett, and such a modification of the cited references would yield nothing more than predictable results. As such, the Appellants’ arguments are not found to be persuasive. Claims 3 and 23-24 rejected under 35 U.S.C. §103(a) as being unpatentable over Smullen, Jewett, Inaho, and Hughes The Appellants contend that Inaho fails to describe “the state being copied to a storage while the others continue execution,” as per claim 23. App. Br. 17. The Appellants specifically argue that Inaho describes that processors 12-13 and 15 are halted when they copy data to failed processor 14 and only after they copy dump data to processor 14 are processors 12-13 and 15 restarted. App. Br. 16-17 (citing Inaho 4:19-23). We disagree with the Appellants. Inaho describes that processors 12-13 and 15 are restarted and executing when the data dump from processor 14 is copied. Inaho 4:19- 28. That is, the state of processor 14 is copied while processors 12-13 and 15 continue execution. As such, Inaho describes this feature of claim 23. The Examiner has relied on Hughes to describe Direct Memory Access (DMA) operation. Ans. 15-16 (citing Hughes 1:63-67). As such, the combination of Smullen, Jewett, Inaho, and Hughes teaches or suggests the limitations of claim 23. Appeal 2010-005945 Application 10/953,242 7 Claims 6 and 12 rejected under 35 U.S.C. §103(a) as being unpatentable over Smullen, Jewett, Inaho, and Gulick The Appellants contend that claims 6 and 12 are allowable for the same reasons asserted in support of claim 1. App. Br. 17. We disagree with the Appellants. The Appellants’ arguments in support of claim 1 were not found to be persuasive and are not found to be persuasive here for the same reasons. Claims 7-8 and 13-22 rejected under 35 U.S.C. §103(a) as being unpatentable over Smullen, Jewett, Inaho, Gulick, and Hughes The Appellants first contend that claims 7-8 and 13-18 are allowable for the same reasons asserted in support of claim 1. App. Br. 17. We disagree with the Appellants. The Appellants’ arguments in support of claim 1 were not found to be persuasive and are not found to be persuasive here for the same reasons. The Appellants further contend that Inaho fails to describe “the program causes the first processor element to. . . [transfer] data from one non-executing source processor element of the processor element plurality to buffers in at least one executing target processor element of others in the plurality of processor elements” or “a first processor element of the loosely- coupled processor elements executes the data transfer program,” as recited in claim 19. App. Br. 18. We disagree with the Appellants. The Examiner has relied on the combination of Smullen, Inaho, and Hughes to teach or suggest “the program causes the first processor element to [transfer] data from one non-executing source processor element of the processor element plurality to buffers in at least one executing target processor element of Appeal 2010-005945 Application 10/953,242 8 others in the plurality of processor elements.” Ans. 25-26 and 31. The Examiner further relied on the combination of Smullen, Jewett, and Inaho to teach or suggest “a first processor element of the loosely-coupled processor elements executes the data transfer program.” Ans. 25-26 and 31. As such, the Appellants arguments are not found to be persuasive because the Appellants are attacking the references individually when the rejection is based on the combination of the cited references. Nonobviousness cannot be established by attacking the references individually when the rejection is predicated upon a combination of prior art disclosures. Id. CONCLUSIONS The Examiner did not err in rejecting claims 1 and 3-27. DECISION To summarize, our decision is as follows.  The rejection of claims 1 and 3-27 is sustained. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv) (2011). AFFIRMED ELD