Ex Parte Balakrishnan et al

Patent Trial and Appeal Board

Sep 21, 2012

11319852 (P.T.A.B. Sep. 21, 2012)

UNITED STATES PATENT AND TRADEMARKOFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/319,852 12/28/2005 Ganesh Balakrishnan RPS920050190US1 (029) 7884
50594 7590 09/21/2012
CAREY, RODRIGUEZ, GREENBERG & O''KEEFE, LLP
STEVEN M. GREENBERG
950 PENINSULA CORPORATE CIRCLE
SUITE 2022
BOCA RATON, FL 33487
EXAMINER
LEWIS-TAYLOR, DAYTON A.
ART UNIT PAPER NUMBER
2181
MAIL DATE DELIVERY MODE
09/21/2012 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte GANESH BALAKRISHNAN and JORGE R. RODRIGUEZ
____________

Appeal 2010-006449
Application 11/319,852
Technology Center 2100
____________

Before HOWARD B. BLANKENSHIP, STEPHEN C. SIU, and JENNIFER
S. BISK, Administrative Patent Judges.

SIU, Administrative Patent Judge

DECISION ON APPEAL

This is an appeal under 35 U.S.C. § 134 from the Examiner’s rejection
of claims 1 and 3-9. Claims 2 and 10-19 were cancelled. We have
jurisdiction under 35 U.S.C. § 6(b).

Appeal 2010-006449
Application 11/319,852

2
STATEMENT OF THE CASE

The disclosed invention relates generally to data communications over
networks (Spec. 1). Claim 1 is representative and reads as follows:
1. A data input/output request processing method comprising:
selecting between separate hardware implemented and software
implemented Internet Small Computer System Interface (iSCSI) paths
to process an input/output request, wherein the selecting between
separate hardware implemented and software implemented iSCSI
paths to process an input/output request, comprises:
transmitting a stream of requests to access at least one logical
block address in at least one storage device in an Internet Protocol-
based storage system;
monitoring a utilization of a first processor in a host configured
to transmit the stream of requests, wherein the host comprises a first
iSCSI implementation;
monitoring a utilization of a second processor in an adapter
coupled to the storage device, wherein the adapter comprises a second
iSCSI implementation; and
routing requests in the stream of requests to the first iSCSI
implementation in the host and the second iSCSI implementation in
the adapter based on a value of the utilization of the first processor in
the host and a value of the utilization of the second processor in the
adapter; wherein the first iSCSI implementation is a software iSCSI,
wherein the second iSCSI implementation is a hardware iSCSI.
(App. Br. 15, Claims Appendix).

Claims 1 and 3-8 stand rejected under 35 U.S.C. §103(a) as
unpatentable over Fan (U.S. Patent Publication No. 2004/0158651 A1;
August 12, 2004) and Malpani (US Patent Publication No. 2005/0259632
A1; November 24, 2005.
Appeal 2010-006449
Application 11/319,852

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Claim 9 stands rejected under 35 U.S.C. §103(a) as unpatentable over
Fan, Malpani, and Poynor (U.S. Patent Publication No. 2003/0009548 A1;
January 9, 2003).
Issue
Did the Examiner err in rejecting claims 1 and 3-9?
Principles of Law
The question of obviousness is resolved on the basis of underlying
factual determinations including (1) the scope and content of the prior art,
(2) any differences between the claimed subject matter and the prior art, and
(3) the level of skill in the art. Graham v. John Deere Co. of Kansas City,
383 U.S. 1, 17-18 (1966).
“The combination of familiar elements according to known methods
is likely to be obvious when it does no more than yield predictable results.”
KSR Int’l Co. v. Teleflex, Inc., 550 U.S. 398, 416 (2007).
Analysis
The Examiner presents reasons with supporting factual underpinnings
as to why it would have been obvious to one of ordinary skill in the art to
have combined the Fan and Malpani references (Ans. 6-11). Appellants
disagree (App. Br. 5-8) but do not indicate specific errors with the
Examiner’s rationale. We are therefore not persuaded by Appellants’
argument.
Appeal 2010-006449
Application 11/319,852

4
Claim 1 recites “separate hardware . . . and software . . . paths . . . .”
The Examiner states that Fan discloses “[s]electing between separate
hardware and software implementation” (Ans. 4). Appellants do not dispute
the Examiner’s finding that Fan discloses selecting between hardware and
software paths (App. Br. 9) but argues that “the software path and the
hardware path of Fan are not ‘separate’ . . . paths” (App. Br. 9-10) because,
according to Appellants, a component utilized in the hardware path “is used
in conjunction with software paths 190 and 200” (App. Br. 9). However,
Appellants have not adequately demonstrated that claim 1 requires that each
of the separate hardware and software paths cannot have any components in
common. Rather, claim 1 merely recites paths that are “separate” and does
not appear to require that each of the “separate” paths cannot share any
common elements.
Also, as the Examiner indicates, Fan discloses “offloaded traffic may
be processed and may be transported via the offload system 180” but that
“[t]raffic that is not offloaded . . . may flow between . . . applications 160
and the NIC 120 . . . via the upload path” (¶ [0025]). At least these two
“paths” appear to be different (i.e., “separate”) paths as one path is
transported via “offload system 180” while the other is not.
Claim 1 also recites monitoring a utilization of a first processor in a
host and a second processor in an adapter. Appellants argue that “the Fan
and Malpani references fail to mention or suggest the monitoring of the
utilization of any processor” (App. Br. 12). The Examiner states that “Fan
Appeal 2010-006449
Application 11/319,852

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teaches monitoring traffic through the NICs (processors)” (Ans. 14). Hence,
the Examiner equates the “NICs” of Fan with the “processors” as recited in
claim 1. Appellants do not demonstrate, much less assert, that the “NICs” of
Fan are not the same as the “processors” as recited in claim 1 or that the
utilization of the “NICs” of Fan are not monitored. As such, we cannot agree
with Appellants’ argument that Fan does not disclose or suggest monitoring
a utilization of a first and second “processor” (i.e., “NIC” as indicated by the
Examiner).
Appellants do not provide additional arguments in support of claims
3-9 or arguments with respect to the Poynor reference.
Conclusion of Law
The Examiner did not err in rejecting claims 1 and 3-9 under 35
U.S.C. § 103(a).

SUMMARY
We affirm the Examiner’s rejection of claim 1 and 3-9.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv).

AFFIRMED
rvb