DOYLE, PETER L.Download PDFPatent Trials and Appeals BoardMay 24, 20212019002647 (P.T.A.B. May. 24, 2021) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 14/495,926 09/25/2014 PETER L. DOYLE P69265 9856 88032 7590 05/24/2021 Jordan IP Law, LLC 12501 Prosperity Drive, Suite 401 Silver Spring, MD 20904 EXAMINER BADER, ROBERT N. ART UNIT PAPER NUMBER 2619 NOTIFICATION DATE DELIVERY MODE 05/24/2021 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): admin@jordaniplaw.com info@jordaniplaw.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________________ Ex parte PETER L. DOYLE ____________________ Appeal 2019-002647 Application 14/495,926 Technology Center 2600 ____________________ Before MICHAEL P. TIERNEY, Vice Chief Administrative Patent Judge, JASON M. REPKO, and RUSSELL E. CASS, Administrative Patent Judges. CASS, Administrative Patent Judge. DECISION ON APPEAL Appellant1 seeks our review under 35 U.S.C. § 134(a) of the Examiner’s final rejection of claims 1–23, which constitute all the claims pending in this application. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. 1 We use the word Appellant to refer to “applicant” as defined in 37 C.F.R. § 1.42(a). Appellant identifies the real party in interest as Intel Corporation. Appeal Brief filed August 27, 2018 (“App. Br.”) 3. Appeal 2019-002647 Application 14/495,926 2 STATEMENT OF THE CASE Appellant’s invention relates to rendering 3D computer graphics by dividing a scene into geometric shapes or “patches,” assigning tessellation factors that define how finely each patch is to be rendered, using a tessellator to define multiple domain points within the patch, and sending the output of the tessellator to a domain shader that converts domain points into vertices and tessellated patches into a set of 3D topologies. Spec. ¶ 1, Abstract.2 In particular, the invention is directed to an efficient tessellation cache to improve the performance of the domain shader by selecting a sequence that increases likelihood of shared domain points being encountered while shading regions within the tessellated patch. Spec. ¶¶ 2, 17–18, Title (“Efficient Tessellation Cache”). Claims 1, 8, 13, and 18 are independent. Claim 1 is illustrative of Appellant’s invention and is reproduced below with line breaks added for clarity and disputed limitations emphasized: 1. A computing system comprising: a data interface including one or more of a network controller, a memory controller or a bus, the data interface to obtain an untessellated patch and one or more tessellation factors associated with a three dimensional (3D) scene; a tessellator, implemented at least partly in one or more of configurable logic or fixed-functionality logic hardware using circuit technology, to generate a tessellated patch and one or 2 In addition to the above-mentioned Appeal Brief, our Decision refers to the Examiner’s Answer mailed December 14, 2018 (“Ans.”); Appellant’s Reply Brief filed February 14, 2019; the Final Office Action mailed March 22, 2018 (“Final Act.”); and the original Specification filed September 25, 2014 (“Spec.”). Appeal 2019-002647 Application 14/495,926 3 more domain points based on the untessellated patch and the one or more tessellation factors; and a domain shader, implemented at least partly in one or more of configurable logic or fixed-functionality logic hardware using circuit technology, including: an intra-region cache, an inter-region cache, and a cache controller, implemented at least partly in one or more of configurable logic or fixed-functionality logic hardware using circuit technology, coupled to the intra-region cache and the inter-region cache, the cache controller to conduct a region determination of whether the one or more domain points are shared between multiple region sets of the tessellated patch, interrogate the intra-region cache for non-shared shading data if the one or more domain points are not shared between multiple region sets of the tessellated patch, and interrogate the inter- region cache for shared shading data if the one or more domain points are shared between multiple region sets of the tessellated patch, wherein the multiple region sets each include an inter- region and an intra-region, wherein the inter-region is assigned a higher tessellation factor of the tessellation factors than assigned to the intra-region, wherein the inter-region includes a greater number of the domain points than the intra-region based on the higher tessellation factor, wherein the region sets are sequenced through in an order to increase a likelihood of shared domain points being encountered across regions of the tessellated patch, wherein the tessellator sequences through each of the region sets, including at least a first region set and a second Appeal 2019-002647 Application 14/495,926 4 region set, and for each region set, tessellates each region including the inter-region and the intra-region, wherein the order of sequencing includes tessellation of a first region and thereafter tessellation of a next region adjacent to a previously tessellated region, wherein the tessellator passes the tessellated regions of each of the region sets to the intra-region cache and the inter- region cache, respectively, wherein the order of sequencing ensures that shading data for at least one of the domain points to be identified as shared resides in one or more of the intra-region cache or the inter- region cache at all times during the sequence. App. Br. 31–32 (emphasis added). Claims 1–23 stand rejected under 35 U.S.C. § 112(a) as failing to comply with the written description requirement. Final Act. 2–5. Claims 1–23 stand rejected under 35 U.S.C. § 112(a) as failing to comply with the enablement requirement. Id. at 5–8. Claims 1–23 stand rejected under 35 U.S.C. § 112(b) as indefinite. Id. at 8–9. Based on Appellant’s arguments and our analysis, we determine that the dispositive issues on appeal are: 1) whether the Specification provides written description support for “the region sets are sequenced through in an order to increase a likelihood of shared domain points being encountered across regions of the tessellated patch” and “the order of sequencing ensures that shading data for at least one of the domain points to be identified as shared resides in one or more of the intra-region cache or the inter-region cache at all times during the Appeal 2019-002647 Application 14/495,926 5 sequence,” (collectively, “the sequencing limitations”) as recited in claim 1 and similarly recited in claims 8, 13, and 18 (see App. Br. 11–17); 2) whether the Specification enables the sequencing limitations, as recited in claim 1 and similarly recited in claims 8, 13, and 18 (see id. at 19– 26); and 3) whether the limitation “the region sets are sequenced through in an order to increase a likelihood of shared domain points being encountered across regions of the tessellated patch,” as recited in claim 1, and similarly recited in claims 8, 13, and 18, is indefinite (see id. at 26–27); and 4) whether the limitation “the inter-region cache is sized to hold twice a maximum number of domain points along a region edge,” as recited in claim 6 and similarly recited in claims 12, 17, and 23, is indefinite (see id. at 27–28). ANALYSIS 1. Written Description under 35 U.S.C. § 112(a) The Examiner finds the Specification does not provide written description support for the sequencing limitations recited in claim 1 (emphasized above) and similar limitations of claims 8, 13, and 18. Final Act. 3–5. In particular, the Examiner determines that the Specification does not describe “how to select an order which ‘increase[s] a likelihood of shared domain points being encountered across regions of the tessellated patch’” or “how to determine a sequence ‘wherein the order of sequencing ensures that shading data for at least one of the domain points to be identified as shared resides in one or more of the intra-region cache or the inter-region cache at all times during the sequence.’” Id.; Ans. 4–5. That is, Appeal 2019-002647 Application 14/495,926 6 the claim requires a sequence that achieves a result, and the Specification does not adequately explain how to determine that sequence. As an initial matter, before addressing Appellant’s arguments, the USPTO has explained recently that, “[i]n order to satisfy the written description requirement set forth in 35 U.S.C. 112(a), the specification must describe the claimed invention in sufficient detail such that one skilled in the art can reasonably conclude that the inventor had possession of the claimed invention at the time of filing.” Examining Computer-Implemented Functional Claim Limitations for Compliance With 35 U.S.C. 112, 84 Fed. Reg. 57, 61 (Jan. 7, 2019) (“112 Guidance”) (citing, e.g., Vasudevan Software, Inc. v. Microstrategy, Inc., 782 F.3d 671, 682 (2015); Ariad Pharm., Inc. v. Eli Lilly & Co., 598 F.3d 1336, 1351 (Fed. Cir.2010) (en banc)). Specifically, the 112 Guidance explains that “[f]or computer- implemented functional claims, the determination of the sufficiency of the disclosure will require an inquiry into the sufficiency of both the disclosed hardware and the disclosed software (i.e., ‘how [the claimed function] is achieved’[)].” 112 Guidance at 61 (quoting Vasudevan, 782 F.3d at 683). Here, the claimed invention is directed to methods and systems for operating a tessellation cache in a computer graphics architecture. See App. Br. 31–38 (Claims 1, 8, 13, 18). As such, we agree with the Examiner that it is a computer-implemented invention, in which the claims recite functional objectives (i.e., sequence through “in an order to increase a likelihood” and “wherein the order . . . ensures that”) that must be sufficiently supported by the Specification to show possession of the invention. As the Examiner Appeal 2019-002647 Application 14/495,926 7 notes (see Ans. 3–4), this requirement may be satisfied by disclosure of an algorithm.3 112 Guidance at 61. This much, Appellant does not dispute. Rather, Appellant argues the disclosure is sufficient to show how the claimed function is achieved. Appellant relies on Figures 1–3, and the associated disclosures, to provide “two examples, or algorithms” (see App. Br. 12, 15–16), which relate to tessellating a triangle and a rectangle. See Spec., Figs. 1–3. In the first example, Figures 1 and 2 illustrate sequencing through a triangular patch having specifically defined regions and domain points shared between those regions. Spec. ¶¶ 15–18. We reproduce Figures 1 and 2 below: Figure 1 depicts a triangular-shaped untessellated patch. Figure 2 depicts the triangular-shaped patch tessellated with domain points. Appellant argues that the “sequence [from first region set 12a and 14a, to second region set 12b and 14b, and then to third region set 12c and 14c] used by the tessellator may maximize and increase the likelihood of shared 3 “An algorithm is defined, for example, as ‘a finite sequence of steps for solving a logical or mathematical problem or performing a task.’” 112 Guidance at 61–62 (citing Microsoft Computer Dictionary (5th ed. 2002)). Appeal 2019-002647 Application 14/495,926 8 domain points being encountered across region sets of the tessellated patch” and “may ensure that shading data for at least one shared domain point would reside in the partitioned cache of the domain shader at all times during the sequence.” App. Br. 12–13 (citing Spec. ¶¶ 18–19), 15–16. According to Appellant, “when sequencing from the first region set 12a, 14a to the second region set 12b, 14b, the shading data for the shared domain points 20–23 would reside in the partitioned cache of the domain shader.” Id. at 16 (citing Spec. ¶ 19). In the second example, Figure 3 illustrates sequencing through a rectangle having regions defined in a particular manner. Figure 3 is reproduced below: Figure 3 depicts a rectangular-shaped patch. Appellant contends “one such [sequencing] order” may be to sequence through “the first region set” 42a, 44, and 42b, “then the second region set,” 42c, “and then the third region set,” 42d. App. Br. 13 (citing Spec. ¶ 20). Similar to the first example, Appellant argues that “[s]uch a sequence may increase the likelihood of shared domain points being Appeal 2019-002647 Application 14/495,926 9 encountered.” Id. at 13–14. Based on these examples, Appellant argues that “a person of ordinary skill in the art would understand in view of the specification and the examples, that tessellation of adjacent regions after each other would increase the likelihood of shared domain points being encountered across regions.” Reply Br. 5–6 (emphasis added); App. Br. 13, 16. We first consider the limitation requiring that “the region sets are sequenced through in an order to increase a likelihood of shared domain points being encountered across regions of the tessellated patch.” The examples of Figures 1 and 3 provide a basic set of steps for sequencing through the regions of the respective shapes, and thereby arguably provide an algorithm for certain embodiments falling within this limitation. However, the Examiner’s findings support the rejection because the Specification’s disclosure is not commensurate with the scope of the claims. The claims broadly cover an improvement to the “likelihood of shared domain points being encountered” over any kind of “untessellated patch.” These patches “are geometric shapes (e.g., triangles or rectangles).” Spec. ¶¶ 1, 50. In other words, any geometric shape is within the scope of the term “untessellated patch.” The Examiner finds, however, that the limited descriptions are “in no way generalized such that one of ordinary skill in the art would recognize the possession of a general sequencing algorithm for increasing/maximizing the likelihood of shared domain points being encountered across regions of tessellated patch.” Final Act. 3 (emphasis added). We agree. As the 112 Guidance explains, “the analysis of whether the specification complies with the written description requirement” calls for a Appeal 2019-002647 Application 14/495,926 10 comparison of “the scope of the claim with the scope of the description to determine whether applicant has demonstrated possession of the claimed invention.” 112 Guidance at 61. A “patentee cannot always satisfy the requirements of section 112, in supporting expansive claim language, merely by clearly describing one embodiment of the thing claimed.” LizardTech, Inc. v. Earth Res. Mapping, Inc., 424 F.3d 1336, 1346 (Fed. Cir. 2005). Where the claims describe a genus, as here, “[w]hether the genus is supported vel non depends upon the state of the art and the nature and breadth of the genus.” 112 Guidance at 61 (alteration in original) (quoting Hynix Semiconductor Inc. v. Rambus Inc., 645 F.3d 1336, 1352 (Fed. Cir. 2011) (citing Rivera v. Int’l Trade Comm’n, 857 F.3d 1315, 1319–21 (Fed. Cir. 2017))). In this case, we agree that the examples of Figures 1 and 3 do not provide adequate written description support for the expansive functional language recited by this claim limitation. Here, the claims recite a functionally-defined genus of any sequence for any “untessellated patch” consisting of any geometric shape, and the Specification at best only describes two simple exemplary species that may achieve the claimed sequencing limitations—a triangular patch and a rectangular patch, both having specifically defined regions and domain points shared between those regions. Therefore, we sustain the Examiner’s finding that the Specification does not adequately support the requirement in claim 1 that “the region sets are sequenced through in an order to increase a likelihood of shared domain points being encountered across regions of the tessellated patch.” Next, we turn to the limitation requiring that “the order of sequencing ensures that shading data for at least one of the domain points to be Appeal 2019-002647 Application 14/495,926 11 identified as shared resides in one or more of the intra-region or the inter- region cache at all times during the sequence.” The Specification is not clear that following the sequences in Figures 1 and 3 necessarily results in the claimed function of “ensur[ing]” that shading data for shared domain points resides in the intra-region cache or the inter-region cache at all times during the sequence. Instead, the Specification merely states that the Figure 1 and 3 sequences “may ensure that shading data for at least one shared domain point would reside in the partitioned cache of the domain shader at all times during the sequence.” Spec. ¶ 18 (emphasis added). Indeed, the sequence alone does not determine the likelihood of an encounter because the cache also plays a role. See id. ¶¶ 2, 23, 24. For instance, the likelihood of encountering a shared point increases or decreases with cache size. See id. ¶ 2. Therefore, following the exemplary sequences may not produce the result of ensuring the claimed encounter for all cache configurations. Appellant also contends that certain parts of Figure 4 (namely blocks 50, 56, 58, and 66) describe use of a domain shader with an inter-region cache for storing shared domain points. Reply Br. 5 (citing Spec. ¶ 23); see App. Br. 16–17. As a result, concludes Appellant, “the sequence (tessellation of a regions adjacent to a previously tessellated region) may ensure that at least one shared domain point resides in the inter-region cache at all times.” App. Br. 17. This is not persuasive, however, because none of these blocks and their associated descriptions explains how to determine the claimed sequence. See Ans. 7 (“Appellant[’]s remarks identify an algorithm for a different aspect of the claim, which is not subject to the rejection(s).”). Appeal 2019-002647 Application 14/495,926 12 Therefore, we agree with the Examiner that the Specification does not disclose an algorithm for the claimed “ensur[ing]” function that demonstrates that the inventors were in possession of the claimed invention. For all of the foregoing reasons, we sustain the Examiner’s 35 U.S.C. § 112(a) written description rejection of independent claims 1, 8, 13, and 18; dependent claims 6, 12, 17, and 23;4 and dependent claims 2–5, 7, 9–11, 14– 16, and 19–22, for which Appellant presents no separate patentability arguments. See 37 C.F.R. § 41.37(c)(1)(iv). 2. Enablement under 35 U.S.C. § 112(a) The Examiner finds that the Specification does not enable the full scope of the sequencing limitations in claim 1 and similar limitations in claims 8, 13, and 18. Final Act. 5–8. Analyzing the factors set forth in In re Wands, 858 F.2d 731, 737 (Fed. Cir. 1988), the Examiner determines that “[d]ue to the extreme breadth of the claims, the complexity of the art, and the lack of instruction or working examples provided by the disclosure, it is apparent that one of ordinary skill would be required to perform undue experimentation in order to enable the claimed scope.” Final Act. 6–8; Ans. 14. Before turning to Appellant’s contentions, we note that Appellant does not dispute that the Wands factors provide the correct framework for analyzing the enablement issue. See 112 Guidance at 62 (citing Vasudevan, 4 Because dependent claims 6, 12, 17, and 23 do not add limitations that address the above short-comings of the independent claims, we need not separately address the Examiner’s independent § 112(a) rejections of these claims. See Final Act. 2–3. Appeal 2019-002647 Application 14/495,926 13 782 F.3d at 684). The factors set forth in Wands provide a framework for determining whether experimentation is undue. Id. As set forth in the MPEP,5 the factors are: (A) The breadth of the claims; (B) The nature of the invention; (C) The state of the prior art; (D) The level of one of ordinary skill; (E) The level of predictability; (F) The amount of direction provided by the inventor; (G) The existence of working examples; and (H) The quantity of experimentation needed to make or use the invention based on the content of the disclosure. MPEP § 2164.01(a) (citing Wands, 858 F.2d at 737); 112 Guidance at 62 (same). With respect to factor (A), the Examiner finds “the claim limitation is extremely broad, covering any algorithm for increasing said likelihood.” Final Act. 6. Appellant argues the claims are not “very broad,” when viewed in conjunction with other claim features requiring sequencing at least a first region set and a second region set, tessellating each region including the inter-region and the intra-region, and tessellating through adjacent regions. App. Br. 21–22; Reply Br. 7. We agree with the Examiner. The claims are broad because they recite a desired result (a sequence “to increase a likelihood”) instead of a particular way of achieving it. Therefore, the claim effectively covers all ways of accomplishing this result. For example, the claims cover region sets with any possible shape and in all possible geometric configurations. Also, as discussed above, the Specification indicates that sequence alone does not determine the likelihood 5 As both Appellant and the Examiner follow the MPEP’s enumeration of the factors, we do the same here in the interest of consistency. Appeal 2019-002647 Application 14/495,926 14 of encountering shared domain points—the cache also plays a role. See, e.g., Spec. ¶¶ 2, 23, 24. For instance, it is more likely that shared points will be encountered (i.e., the claimed result) when using a “relatively large” cache. See id. ¶ 2. Here, the claims broadly cover any cache configuration. Appellant is correct that the recited functions require a sequence “to increase a likelihood” and a “the order of sequencing ensures that shading data . . . resides in in one or more of the intra-region cache or the inter- region cache,” which may require “a next region adjacent” according to the claims. See App. Br. 21–22. But as the Examiner points out, it is not clear how much this actually narrows the claim scope because there is a very large number of possible sequences that include at least one adjacent region. See Ans. 12. Because many permutations of sequences are possible when considering the possible ways to tessellate any untessellated geometric shape, we agree that the recited sequencing limitations are very broad. With respect to Wands factors (C) (state of the prior art) and (D) (level of ordinary skill), the Examiner finds that “increasing said likelihood” is an “issue of probabilities of future occurrences” of encountering shared domain points, and a person of ordinary skill in the art would not find this to be simple or trivial, which we find to be supported based on the complexity of the subject matter described in Appellant’s specification and the background of the art described therein. See Final Act. 6; Spec. ¶¶ 1–2. Indeed, as the Examiner points out, Appellant “do[es] not actually dispute the complexity or difficulty of the claimed subject matter.” Ans. 12–13; see Appeal Br. 21. Instead, Appellant argues that “[i]t would be well within the skill of a person of ordinary skill in the art to configure a tessellator to ‘sequence Appeal 2019-002647 Application 14/495,926 15 through the region sets in an order to increase a likelihood of shared domain points being encountered across regions of the tessellated patch’ through ‘tessellation of a first region and thereafter tessellation of a next region adjacent to a previously tessellated region,’ for example.” Appeal Br. 21. However, these remarks are merely attorney argument, and we agree with the Examiner that they “cannot be considered persuasive, because they do not rely on evidence regarding the ability of one of ordinary skill in the art,” or evidence that such a person “would be able to configure the tessellator to achieve the claimed results.” Ans. 13 (citing MPEP § 716.01(c)). Additionally, Appellant does not point to any evidence that the prior art supplies the knowledge that would be required by a person of ordinary skill to achieve the results in the claim. Finally, with respect to Wands factors (F) (direction provided by the inventor) and (G) (existence of working examples), the Examiner finds that one exemplary sequence is not “indicative of a general algorithm.” Id. The Examiner concludes that Due to the extreme breadth of the claims, the complexity of the art, and the lack of instruction or working examples provided by the disclosure, it is apparent that one of ordinary skill would be required to perform undue experimentation in order to enable the claimed scope . . . Id. Appellant responds that the Specification provides several working examples. App. Br. 22. Appellant also contends that, even in unpredictable arts, a disclosure of every operable species is not required; only one operable species is required. Id. (citing MPEP § 2164.02). Appellant notes that, here, “several examples” are provided with respect to Figures 1–3, and a flow chart at Figure 4. Id. at 22–23 (citing Spec. ¶¶ 15–25, Figs. 1–4), 25–26. Appeal 2019-002647 Application 14/495,926 16 We are not persuaded by Appellant’s argument with respect to factors (F) and (G). Id. at 22–23. First, providing one or even two alleged working examples does not guarantee sufficiency for enabling the claimed functional genus. See LizardTech, 424 F.3d at 1344 (“The trouble with allowing claim 21 to cover all ways of performing DWT-based compression processes that lead to a seamless DWT is that there is no support for such a broad claim in the specification. The specification provides only a single way of creating a seamless DWT.”). Instead, “the relevant concern is whether the scope of enablement provided to one skilled in the art by the disclosure is commensurate with the scope of protection sought by the claims.” 112 Guidance at 62. As explained at length above, and reiterated by the Examiner (id.), the two examples of tessellating a triangular and rectangular patch in Appellant’s Specification do not explain how to determine a sequence in accordance with the breadth of the claims, nor do they provide a generalized algorithm that could be used by a person of ordinary skill in the art to practice the full scope of the claims (i.e., any shaped region sets). See MPEP § 2164.03 (“The ‘predictability or lack thereof’ in the art refers to the ability of one skilled in the art to extrapolate the disclosed or known results to the claimed invention.”); 112 Guidance at 62 (“[The] applicant cannot rely on the knowledge of one skilled in the art to supply information that is required to enable the novel aspect of the claimed invention when the enabling knowledge is in fact not known in the art.”). Appellant asserts that one of ordinary skill in the art can determine an algorithm from the two disclosed sequences. App. Br. 22. But the Examiner points out, and we agree, that Appellant’s assertions are unsupported. See Appeal 2019-002647 Application 14/495,926 17 Ans. 12–13. Under Wands factor (F), the record here lacks sufficient direction from the inventor about how to configure a tessellator to produce the claimed result. Thus, we are unpersuaded by Appellant’s arguments relevant to Wands factors (F) and (G). Accordingly, in consideration of the Wands factors, we are not persuaded the Examiner erred in finding that the full scope of “region sets are sequenced through in an order to increase a likelihood of shared domain points being encountered across regions of the tessellated patch” and “the order of sequencing ensures that shading data for at least one of the domain points to be identified as shared resides in one or more of the intra-region cache or the inter-region cache at all times during the sequence,” as recited in claim 1 and similarly recited in claims 8, 13, and 18, is not enabled. Therefore, we sustain the Examiner’s 35 U.S.C. § 112(a) enablement rejection of independent claims 1, 8, 13, and 18, as well as dependent claims 2–7, 9–12, 14–17, and 19–23, for which Appellant presents no separate patentability arguments. See 37 C.F.R. § 41.37(c)(1)(iv). 3. Indefiniteness under 35 U.S.C. § 112(b) Independent Claims 1, 8, 13, and 18 The Examiner concludes the limitation “region sets are sequenced through in an order to increase a likelihood of shared domain points being encountered across regions of the tessellated patch,” as recited in claim 1 and similarly recited in claims 8, 13, and 18, is indefinite. Final Act. 9. In particular, the Examiner argues “the scope of the claimed functional limitation is indefinite” because the claimed “function is only defined by the results obtained . . . and Appellant’s disclosure provides no guidance for Appeal 2019-002647 Application 14/495,926 18 distinguishing [sequencing] orders that do increase the claimed ‘likelihood’ from those that do not.” Ans. 15 (emphasis omitted); Final Act. 9. Appellant references its earlier arguments relating to written description for this claim element, and states that this claim element “may be achieved, as described in the specification.” Appeal Br. 26 (citing Spec. ¶¶ 15–20, Figs. 1–3). Appellant further states that “the specification describes algorithms that mirror the above claimed features and convey to a person of ordinary skill in the art the claim scope and particularly how the sequence is determined, and what sequences corresponds to the increased likelihood sequence.” Id. We are not persuaded by Appellant’s argument. Appellant fails to point to any disclosure in the specification that provides a standard for distinguishing sequencing orders that increase the claimed “likelihood” from those that do not. Nor does Appellant point to any reference or benchmark likelihood in the specification that can be used as a point of comparison to determine whether a particular sequence order involves an “increase” from that reference. Without such a standard or reference, persons skilled in the art would not know from the claim terms what particular sequencing orders are encompassed by the claim. See MPEP § 2173.05(b) (when claim language employs a term of degree, the specification must “provide[] some standard for measuring that degree”). Accordingly, we are not persuaded the Examiner erred in finding that the limitation “region sets are sequenced through in an order to increase a likelihood of shared domain points being encountered across regions of the tessellated patch,” as recited in claim 1 and similarly recited in claims 8, 13, and 18, is indefinite. Therefore, we sustain the Examiner’s 35 U.S.C. Appeal 2019-002647 Application 14/495,926 19 § 112(b) rejection of independent claims 1, 8, 13, and 18, as well as claims 2–5, 7, 9–11, 14–16, and 19–22 which depend from those independent claims. Dependent Claims 6, 12, 17, and 23 The Examiner concludes the limitation “the inter-region cache is sized to hold twice a maximum number of domain points along a region edge,” as recited in claim 6 and similarly recited in claims 12, 17, and 23, is indefinite. Final Act. 8–9; Ans. 16. In particular, the Examiner determines that “there is no explanation of how the maximum number is determined” by the Specification. Final Act. 9; Ans. 16. Appellant argues that, from the specification, “it would be known that a tessellator may identify the maximum number of domain points along a region edge based on the region determination points and the one or more tessellation factors.” App. Br. 27. Appellant points to the disclosure in paragraph 1 of the Specification that “a coarse geometric model may include ‘patches’ that are geometric shapes (e.g., triangles or rectangles), as well as one or more tessellation factors that define how finely each patch is to be rendered in the scene.” Id. (citing Spec. ¶ 1). Appellant further points to the disclosure that the “3D pipeline may use the tessellator to define multiple domain points within the patch based on the tessellation factors and effectively organize the patch into a mesh of smaller geometric shapes having vertices at the domain points.” Id. “Therefore,” Appellant argues, the “tessellator receives the tessellation factors to tessellate the geometric shapes,” and “the tessellation factors are directly related to the number of domain points.” Appeal Br. 27. As such, according to Appellant, “the Appeal 2019-002647 Application 14/495,926 20 tessellator may identify a maximum number of domain points that may occur on the edges of the patches (e.g., the region edge),” and accordingly, “twice a maximum number of domain points along a region edge may also be known.” Id. After considering the claims and Appellant’s arguments, we are persuaded the Examiner’s rejection cannot be sustained. Appellant has presented persuasive evidence from the Specification that, given particular patches, tessellation factors, patches (regions), and domain points, one of ordinary skill could determine a maximum number of domain points that may occur on the edge of a patch (e.g., a region edges). From this maximum, one of ordinary skill could determine a size of twice the maximum, and use it to size a cache appropriately. Accordingly, we are persuaded the Examiner did not sufficiently support the finding that the limitation “the inter-region cache is sized to hold twice a maximum number of domain points along a region edge,” as recited in claim 6 and similarly recited in claims 12, 17, and 23, is indefinite. Therefore, we do not sustain the Examiner’s 35 U.S.C. § 112(b) rejection of dependent claims 6, 12, 17, and 23. Appeal 2019-002647 Application 14/495,926 21 CONCLUSION In conclusion: Claims Rejected 35 U.S.C. § Basis Affirmed Reversed 1–23 112(a) Written Description 1–23 1–23 112(a) Enablement 1–23 1–23 112(b) Indefiniteness 1–5, 7–11, 13–16, 18–22 6, 12, 17, 23 Overall Outcome 1–23 No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED Copy with citationCopy as parenthetical citation