Cirrus Logic International Semiconductor Ltd.

Patent Trials and Appeals Board

Sep 21, 2021

2021000478 (P.T.A.B. Sep. 21, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/432,150 02/14/2017 Sarang VADNERKAR 141841.00527-P3160US00 8306
115799 7590 09/21/2021
Cirrus Logic c/o Jackson Walker LLP
c/o Jackson Walker, L.L.P.
100 Congress Avenue
Suite 1100
Austin, TX 78701
EXAMINER
DE LEON DOMENECH, RAFAEL O
ART UNIT PAPER NUMBER
2838
MAIL DATE DELIVERY MODE
09/21/2021 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte SARANG VADNERKAR,
ULLAS PAZHAYAVEETIL, and
ERIC J. KING
Appeal 2021-000478
Application 15/432,150
Technology Center 2800
Before JAMES C. HOUSEL, MICHELLE N. ANKENBRAND, and
JULIA HEANEY, Administrative Patent Judges.
HEANEY, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the
Examiner’s decision to reject claims 1, 2, 5–24, and 27–44. See Final
Act. 1. We have jurisdiction under 35 U.S.C. § 6(b).
We AFFIRM IN PART.

1 We use the word Appellant to refer to “applicant” as defined in 37 C.F.R.
§ 1.42. Appellant identifies the real party in interest as Cirrus Logic
International Semiconductor Ltd., the assignee of record. Appeal Br. 2.
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CLAIMED SUBJECT MATTER
The claims are directed to circuits for audio devices, such as wireless
telephones and media players, and to a power converter capable of operating
in a forced continuous conduction mode to achieve low power operation.
Spec. 1:4–7.
Claims 1, 12, 23, and 34 are independent claims. Claims 1 and 12 are
representative of the claimed subject matter and are reproduced below:
1. A method of operating a direct current-to-direct
current (DC-DC) switch converter, comprising operating the
DC-DC switch converter in a forced continuous conduction
mode in which for each switching cycle of the DC-DC switch
converter during the forced continuous conduction mode, the
DC-DC switch converter operates in a series of phases including:
a first phase in which a power inductor current flowing in
a power inductor of the DC-DC switch converter increases from
zero to a controlled positive current magnitude with respect to a
first terminal and a second terminal of the power inductor;
a second phase in which the power inductor current
decreases from the controlled positive current magnitude to
approximately zero;
a third phase in which the power inductor current
decreases from approximately zero to a controlled negative
current magnitude with respect to a first terminal and a second
terminal of the power inductor;
a fourth phase in which the power inductor current
increases from the controlled negative current magnitude to
approximately zero; and
a fifth phase in which the power inductor current is zero
for the duration of the fifth phase;
wherein the controlled negative current magnitude is
controlled based on a measurement of the power inductor
current.
Appeal Br. 15 (Claims App.).
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12. A method of operating a direct current-to-direct
current (DCDC) switch converter, comprising operating the DC-
DC switch converter in a forced continuous conduction mode in
which:
for some switching cycles of the DC-DC switch converter
during the forced continuous conduction mode, the DC-DC
switch converter operates in a first series of phases including:
a first phase in which a power inductor current
flowing in a power inductor of the DC-DC switch
converter increases from zero to a controlled positive
current magnitude with respect to a first terminal and a
second terminal of the power inductor;
a second phase in which the power inductor current
decreases from the controlled positive current magnitude
to approximately zero;
a third phase in which the power inductor current
decreases from approximately zero to a controlled
negative current magnitude with respect to a first terminal
and a second terminal of the power inductor; and
a fourth phase in which the power inductor current
increases from the controlled negative current magnitude
to approximately zero, and wherein for such switching
cycles the switching cycles begin with the first phase and
end with the fourth phase, with a first phase of each such
switching cycle immediately following a fourth phase of a
previous switching cycle at such time that the power
inductor current reaches approximately zero; and
for other switching cycles of the DC-DC switch converter
during the forced continuous conduction mode, the DC-DC
switch converter operates in a second series of phases including:
the first phase;
the second phase;
the third phase;
the fourth phase; and
a fifth phase in which the power inductor current is
zero for the duration of the fifth phase, and wherein for
such other switching cycles the switching cycles begin
with the first phase and end with the fifth phase, with a
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first phase of each such other switching cycle immediately
following a fifth phase of a previous other switching cycle.
Appeal Br. 19–20 (Claims App.).
REFERENCE
The prior art upon which the Examiner relies is:
Name Reference Date
Guo US 2014/0320104 A1 Oct. 30, 2014
REJECTION
The Examiner maintains the following rejection on appeal:
Claims 1, 2, 5–24, and 27–44 under 35 U.S.C. § 102(a)(1) as
anticipated by Guo. Final Act. 5–30.

OPINION
Drawing Objection
The Examiner objects to the drawings for not showing every feature
of the invention specified in the claims. Final Act. 3. Appellant presents
arguments to dispute the objection. Appeal Br. 8–9.
As the Examiner states, this is not an appealable matter. Ans. 4. This
matter should have been raised by a timely-filed petition under 37 C.F.R.
§ 1.181. See 37 C.F.R. § 1.113. Petitionable matters are not appealable to
the Patent Trial and Appeal Board. In re Berger, 279 F.3d 975, 984–985
(Fed. Cir. 2002) (citing In re Hengehold, 440 F.2d 1395, 1403 (CCPA
1971)); see also MPEP § 1201.

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Anticipation Rejection
Appellant presents arguments for claims 1 and 23 as a first group and
for claims 12 and 34 as a second group. Appeal Br. 9–13. Claims 2 and 5–
11 depend from claim 1, claims 13–22 depend from claim 12, claims 24 and
27–33 depend from claim 23, and claims 35–44 depend from claim 34. Id.
at 13. Appellant does not argue the dependent claims separately from claims
1, 12, 23, and 34. Id. Therefore, claims 2, 5–11, 24, and 27–33 stand or fall
with claims 1 and 23 and claims 13–22 and 35–44 stand or fall with claims
12 and 34. 37 C.F.R. § 41.37(c)(1)(iv). We discuss the appealed claims
below in two groups, as argued by Appellant.
Claims 1, 2, 5–11, 23, 24, and 27–33
As an initial matter, we note that claim 23 is an apparatus claim that
recites “wherein the controlled negative current magnitude is controlled
based on a measurement of the power inductor current.” Appeal Br. 22
(Claims App.). Although claim 23 does not explicitly recite a control
structure, this limitation implies that the claimed switch converter uses a
controller. Therefore, we interpret claim 23 as requiring a control structure
for the switch converter.
The Examiner finds that Guo discloses a method of operating a direct
current-to-direct current (“DC-DC”) switch converter that operates in a
series of first, second, third, fourth, and fifth phases and that a controlled
negative current magnitude is controlled based on a measurement of the
power inductor current, as claims 1 and 23 recite. Final Act. 5–6, 18–19.
Appellant argues that “what is missing from the Examiner’s analysis
and the Guo reference is an express or inherent teaching that a negative
current magnitude is based on a measurement of power inductor current”
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and “[w]hile the Examiner asserts that current measurements of an inductor
are used to determine whether current is allowed by the system in Guo to go
below zero, nothing suggests that the magnitude of such negative current is
based on an inductor current.” Appeal Br. 9–10.
Appellant’s arguments are unpersuasive. The Examiner responds,
finding that in Guo’s Figure 4, “the sensor circuit 408, measures the current
of the inductor 406 and send CSP and CSN’ to comparator 416 to determine
the operation of the converter circuit 400.” Ans. 5 (citing Guo ¶¶ 35, 36, 44,
45). The Examiner further explains that “by manipulating the RC time
constant of the ripple generation network, the generation of multiple pulses
can be avoided” and control is provided for the negative current magnitude.
Id. at 6 (citing Guo ¶¶ 51–58). The Examiner also finds that “Figure 9c
shows the magnitude of the negative current of the inductor ΔV2.” Id.
Guo’s Figure 4 is reproduced below.

Guo’s Figure 4 depicts a DC-DC voltage regulator circuit
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Guo’s DC-DC voltage regulator circuit 400 includes a pulse width
modulation (PWM) control circuit 401, transistors 402 and 404 that are
controlled by PWM control circuit 401, inductor 406 to supply load
capacitance 410 and load resistance 412, and current sample and hold circuit
408 coupled in parallel with inductor 406 to produce current sense signals
CSP and CSN’. Guo ¶¶ 35, 45. Transistor 402 is coupled between supply
voltage VDD and voltage terminal VSW and transistor 404 is coupled between
voltage terminal VSW and reference supply voltage terminal VSS. Id. ¶ 35.
Guo explains that output voltage VOUT is fed back to a voltage divider that is
formed by resistors R1 and R2 to produce feedback voltage VFB at node 435.
Id. ¶ 36.
Comparator circuit 416 compares output voltage VOUT with reference
voltage VREF and compares signal CSP with signal CSN’. Id. Guo discloses
that, based on these comparisons, comparator circuit 416 produces a signal
EN, which is applied to PWM control circuit 400. Id. ¶¶ 36, 44. Guo also
teaches that the signal EN goes high when the feedback voltage VFB is less
than the reference voltage VREF or when the current sense signal CSP is less
than current sense signal CSN’. Id. ¶ 45. Therefore, because Guo teaches
that signal EN (which is applied to PWM control circuit 400 for controlling
transistors 402 and 404) is based on current sense signals CSP and CSN’
from inductor 408, Guo’s teachings support the Examiner’s finding that Guo
discloses control based on a measurement of a power inductor current.
As noted above, Appellant argues that Guo does not suggest that the
magnitude of a negative current is based on an inductor current
measurement. Appeal Br. 9–10. The Examiner cites Guo’s Figure 9C for
this aspect, which is reproduced below. Ans. 6.
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Guo’s Figure 9C shows waveforms for differences between the voltage
feedback and the voltage references and between the current sense signals
The bottom waveform in Figure 9C illustrates a difference between current
sense signal CSP and current sense signal CSN’ (and therefore a current for
inductor 406) that has a negative region, which increases and decreases in
magnitude. Therefore, Guo’s teachings regarding the control of transistors
402 and 404 based on the current sense signals CSP and CSN’ and Guo’s
Figure 9C support the Examiner’s finding that Guo suggests controlling a
controlled negative current magnitude on the basis of a measurement of a
measured power inductor current, as claims 1 and 23 recite.
Appellant responds to the Examiner’s explanation in the Answer by
arguing that the Examiner asserts “that ‘by manipulating the RC constant of
the ripple generation network, the generation of multiple pulses can be
avoided . . ., therefore controlling the negative amplitude. . .of the inductor
current measured by the sensor circuit 408’” but “[q]uite simply,
manipulating an RC time constant to control current is not equivalent to
controlling current based on a measured current, as recited in Claims 1 and
23.” Reply Br. 2. Although this argument appears to address the
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Examiner’s explanation regarding Guo’s teachings in paragraphs 51–58 (see
Ans. 6), it does not respond to the Examiner’s findings relying on Guo’s
teachings in paragraphs 35, 36, 44, and 45 and in Figure 9C. Id. at 5–6.
Therefore, Appellant does not identify a reversible error in the Examiner’s
rejection of claims 1 and 23.
Accordingly, we sustain the rejection of claims 1, 2, 5–11, 23, 24, and
27–33
Claims 12–22 and 34–44
As an initial matter, we note that claim 34 is an apparatus claim that
recites the operation of a switch converter in a forced continuous conduction
mode for some switching cycles and another forced continuous conduction
mode for other switching cycles. Appeal Br. 27–28 (Claims App.).
Furthermore, these modes include phases that involve “a controlled positive
current magnitude” and “a controlled negative current magnitude.”
Although claim 34 does not explicitly recite a control structure, the claimed
operations for the switch controller imply that the switch converter uses a
controller. Therefore, we interpret claim 34 as requiring a control structure
for the switch converter.
The Examiner finds that Guo discloses operating a DC-DC switch
converter in a forced continuous conduction mode that, for some switching
cycles, includes a series of four phases, and, for other switching cycles,
includes a series of five phases. Final Act. 10–13, 23–26. The Examiner’s
rejection includes an annotated copy of waveform 940 from Guo’s Figure
9B, which is reproduced below.
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Examiner’s annotated copy of waveform 940 in Guo’s Figure 9B.

The Examiner explains that the fourth phase for the first claimed type of
switching cycle (which includes four phases) includes the period when “the
inductor current goes from its negative peak value to zero amps and stay[s]
at that value until the next switching cycle (therefore the fourth phase
includes T4 and T5).” Id. at 11, 24. The Examiner finds that for the “other
switching cycles” recited in the claims, Figure 9B shows the cycle’s five
phases, including the fourth phase when “the inductor goes from its negative
peak value to zero amps” and the fifth phase when “the power inductor
current is zero for the duration of the fifth phase.” Id. at 12, 25.
The Examiner reiterates this position in the Answer and finds that
“Appellant has disclosed in the description of claim 12 that all of the
respective cycles and their respective phases are disclosed in Figure 5.” Id.
at 10–12. The Examiner further finds that “[t]he respective phases and
cycles disclosed in Figure 9 of Guo are similar to Applicant’s description of
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claim 12 in figure 5” and cites this finding to support the rejection of claims
12 and 34. Id. at 14–15.
Appellant asserts that the Examiner’s claim construction “is wholly
divorced from the language” of claims 12 and 34. Appeal Br. 10.
Specifically, Appellant contends that claims 12 and 34 recite “a first phase
of each such switching cycle immediately following a fourth phase of a
previous switching cycle at such time that the power inductor current
reaches approximately zero” and the phase that “the Examiner equates to the
‘first phase’ does not ‘immediately follow . . . at such time that the power
inductor current reaches approximately zero,’” due to the period the
Examiner identifies as time T5. Appeal Br. 10 (emphasis omitted).
Appellant also argues that claims 12 and 34 claim an operation for some
cycles in which four phases are used and an operation for other cycles in
which five phases are used, but the Examiner construes these claim terms to
mean the same thing, which effectively reads out language in claims 12 and
34. Id. at 11–12.
Appellant’s arguments are persuasive. Claims 12 and 34 recite that,
“for some switching cycles,” a DC-DC switch converter operates in a series
that includes four phases, “with a first phase of each such switching cycle
immediately following a fourth phase of a previous switching cycle at such
time that the power inductor current reaches approximately zero.” The
Examiner’s interpretation, which equates the periods T4 and T5 in Guo’s
Figure 9B above to the claimed fourth phase, does not give proper weight to
these limitations. The Examiner’s interpretation of the second first phase in
the annotated copy of Figure 9B (beginning at the second T1 period) as
“immediately following” the fourth phase of the previous cycle “at such time
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that the power inductor current reaches approximately zero” is not
reasonable, because the Examiner’s fourth phase of the previous cycle
includes period T5 shown in Figure 9B, which includes a time period of zero
current. Further, the Examiner’s interpretation that the same operation
shown in Guo’s Figure 9B reads on the two operations recited in claims 12
and 34 (i.e., the operation including four phases “for some switching cycles”
and the operation including five phases “for other switching cycles”) also
does not give proper weight to the two claimed operations.
In addition, the Examiner’s reasoning that all cycles and their phases
are shown in Appellant’s Figure 5 and that Guo’s Figure 9B is similar to
Appellant’s description for the embodiment that corresponds to claim 12 is
incorrect. Ans. 12, 14. The bottom waveform in Figure 5 depicts an
operation that includes five phases, as described in Appellant’s
Specification. Spec. 11:4–12:21. However, Appellant’s Specification also
discloses the following:
In some embodiments of the present disclosure, boost
converter 100 may operate such that for some switching cycles
of boost converter 100 during operation in FCCM, boost
converter 100 may operate in a first series of repeating phases
including the first phase, the second phase, the third phase, and
the fourth phase (e.g., the fifth phase has zero duration during
such switching cycles), and for other switching cycles of boost
converter 100 during operation in FCCM, boost converter 100
may operate in a second series of repeating phases including the
first phase, the second phase, the third phase, the fourth phase,
and the fifth phase. By varying the number of switching cycles
in which the fifth phase has a non-zero duration, even greater
control of the operating range of boost converter 100 (e.g., range
of boosted supply voltage VSUPPLY) may be realized.
Spec. 13:1–10.
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Therefore, the Specification discloses further embodiments in which
some cycles use four phases (with a fifth phase having zero duration) and
other cycles use five phases. Although the bottom waveform in Appellant’s
Figure 5 depicts cycles with five phases, it does not depict a cycle in which
the fifth phase has zero duration and the fourth phase of that cycle is
immediately followed by a first phase of a following cycle at such time that
inductor current reaches approximately zero, as claims 12 and 34 recite.
Accordingly, we reverse the rejection of claims 12–22 and 34–44.
CONCLUSION
The rejections are affirmed in part.
DECISION SUMMARY
In summary:
Claim(s)
Rejected
35 U.S.C.
§
Reference(s)/Basis Affirmed Reversed
1, 2, 5–24,
27–44
102(a)(1) Guo 1, 2, 5–11,
23, 24,
27–33
12–22,
34–44

TIME PERIOD FOR RESPONSE
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv).
AFFIRMED IN PART