Cellect, LLCDownload PDFPatent Trials and Appeals BoardAug 17, 2021IPR2020-00475 (P.T.A.B. Aug. 17, 2021) Copy Citation Trials@uspto.gov Paper 32 571-272-7822 Date: August 17, 2021 UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD SAMSUNG ELECTRONICS CO., LTD. and SAMSUNG ELECTRONICS AMERICA, INC., Petitioner, v. CELLECT, LLC, Patent Owner. IPR2020-00475 Patent 9,186,052 B1 Before JAMESON LEE, PATRICK M. BOUCHER, and JOHN R. KENNY, Administrative Patent Judges. KENNY, Administrative Patent Judge. JUDGMENT Final Written Decision Determining All Challenged Claims Unpatentable 35 U.S.C. § 318(a) IPR2020-00475 Patent 9,186,052 B1 2 I. INTRODUCTION Samsung Electronics Co., Ltd. and Samsung Electronics America, Inc. (“Petitioner”) filed a Petition to institute an inter partes review of claims 1, 3, and 7 (the “challenged claims”) of U.S. Patent No. 9,186,052 B1 (Ex. 1001, the “’052 patent”) pursuant to 35 U.S.C. § 311 et seq. Paper 2 (“Pet.”). Cellect, LLC (“Patent Owner”) filed a Preliminary Response. Paper 6. With our authorization, Petitioner filed a Preliminary Reply (Paper 10) and Patent Owner filed a Preliminary Sur-reply (Paper 13). On August 18, 2020, we instituted inter partes review of all challenged claims. Paper 15. Patent Owner filed a Patent Owner’s Response (Paper 18, “PO Resp.”). Petitioner filed a Reply to Patent Owner’s Response (Paper 21, “Reply”), and Patent Owner filed a Sur-reply (Paper 24, “Sur-reply”). At the parties’ request (Papers 26, 27), an Oral Hearing was held on May 26, 2021, a transcript of which is included in the record. Paper 31 (“Tr.”). We have jurisdiction to conduct this inter partes review under 35 U.S.C. § 6. For the reasons discussed herein, we determine that Petitioner has shown, by a preponderance of the evidence, that claims 1, 3, and 7 of the ’052 patent are unpatentable. A. Related Matters The parties identify the following related district court litigation: Cellect, LLC v. Samsung Electronics Co., Ltd. et al., 1-19-cv-00438 (D. Colo.). Pet. 5; Paper 5, 1.1 1 That action has been stayed by order of the district court. Paper 11 (Appx. A). IPR2020-00475 Patent 9,186,052 B1 3 The parties note that the challenged patent is also the subject of IPR2020-00512. Pet. 6; Paper 5, 1. Petitioner further identifies the following related patents and respective proceedings: Patent Proceeding(s) 6,043,839 IPR2020-00472 6,275,255 B1 IPR2020-00473 6,982,740 B2 IPR2020-00474 ex parte reexamination 9,198,565 B2 IPR2020-00476 9,667,896 B2 IPR2020-00477 6,982,742 B2 IPR2020-00559 IPR2020-00560 IPR2020-00561 ex parte reexamination 6,424,369 B1 IPR2020-00562 IPR2020-00563 IPR2020-00564 ex parte reexamination 6,452,626 B1 IPR2020-00565 IPR2020-0566 IPR2020-00567 ex parte reexamination 6,862,036 B2 IPR2020-00568 IPR2020-00569 7,002,621 B2 IPR2020-00571 IPR2020-00572 ex parte reexamination Pet. 6–7. B. The ’052 Patent The ’052 patent is titled “Reduced Area Imaging Device Incorporated Within Endoscopic Devices.” Ex. 1001, code (54). By way of background, the ’052 patent explains that “endoscopic surgery has become the accepted standard for conducting many types of surgical procedures.” Id. at 1:40–42. IPR2020-00475 Patent 9,186,052 B1 4 Solid state imaging technology is increasingly replacing the rod lens endoscope, due to “its cost of manufacture, failure rate, and requirement to be housed within a rigid and straight housing.” Id. at 1:52–57. Solid state imaging technology “enables the image sensor to be placed at the distal tip of the investigating device.” Id. Complementary metal oxide semiconductor (CMOS) imaging devices are solid state imaging devices that “offer improved functionality and simplified system interfacing” and “can be manufactured at a fraction of the cost of other solid state imaging technologies.” Ex. 1001, 1:61–65. However, despite improved CMOS imaging devices that permit a “camera on a chip” concept (see id. at 2:1–3:21), the ’052 patent reports that “a need still exists for a reduced area imaging device which can be used in even the smallest type of endoscopic instruments.” Id. at 3:25–31. The ’052 patent purports to improve “camera on a chip” technology by “rearrang[ing] the circuitry in a stacked relationship so that there is a minimum profile presented when used within a surgical instrument or other investigative device.” Ex. 1001, 3:31–37. In an embodiment, an imaging device may be entirely self-contained in the distal end of an endoscope. Id. at 9:53–57. Figure 2a shows a cross-sectional view of an endoscope with an imaging device incorporated into the distal tip of the endoscope, and Figure 2b shows a partially exploded perspective view of the distal end of the endoscope shown in Figure 2a, both of which are reproduced below (Ex. 1001, 6:55–61): IPR2020-00475 Patent 9,186,052 B1 5 As shown in Figure 2b above, an imaging device in distal end 16 of endoscope 10 may include image sensor 40 electrically coupled, via pin connectors 62, to video processing board 50 and optional supplementary board 60. Ex. 1001, 9:58–10:8. Image sensor 40 may be bonded to lens system 42. Id. at 10:16–19. Figure 4a, reproduced below, shows a detailed schematic diagram of image sensor 40 (Ex. 1001, 12:26–28): IPR2020-00475 Patent 9,186,052 B1 6 As shown in Figure 4a above, image sensor 40 contains array of pixels 90 and timing and control circuits 92. Ex. 1001, 12:40–42. Array of pixels 90 is an active pixel group, and “[e]ach pixel circuit has its own amplifier which is controlled by the timing and control circuitry.” Id. at 12:45–64. C. Challenged Claims Petitioner challenges claims 1, 3, and 7. Pet. 1. Claims 1 and 3 are independent, and claim 7 depends from claim 3. Ex. 1001, 21:23–63, 22:38–23:19; 23:29–31. Claims 1 and 3 read: 1. An imaging device comprising: a housing; an image sensor mounted in said housing, said image sensor including a first circuit board having a length and a width thereto, wherein said length and width of said first circuit board define a first plane, said first circuit board including an array of CMOS pixels thereon, wherein a plurality of CMOS pixels within said array of CMOS pixels each include an amplifier, said first circuit IPR2020-00475 Patent 9,186,052 B1 7 board further including timing and control circuitry thereon, said timing and control circuitry being coupled to said array of CMOS pixels, said image sensor producing a pre-video signal; a second circuit board mounted in said housing, said second circuit board being electrically coupled to said first circuit board, said second circuit board having a length and a width thereto, wherein said length and width of said second circuit board define a second plane, said second circuit board including circuitry thereon to convert said pre-video signal to a post-video signal, said second circuit board being offset from said first circuit board, said second plane of said second circuit board being substantially parallel to said first plane of said first circuit board; a lens mounted in said housing, said lens being integral with said imaging device, said lens focusing images on said array of CMOS pixels of said image sensor; a video screen, said video screen being electrically coupled to said second circuit board, said video screen receiving said post- video signal and displaying images from said post-video signal; and a power supply mounted in said housing, said power supply being electrically coupled to said first circuit board to provide power to said array of CMOS pixels and said timing and control circuitry, said power supply also being electrically coupled to said second circuit board to provide power thereto; wherein said image sensor has a generally square shape along said first plane; and wherein a largest dimension of said image sensor along said first plane is between 2 and 12 millimeters. 3. An imaging device comprising: a housing; an image sensor mounted in said housing, said image sensor including a planar substrate having a length and a width thereto, wherein said length and width of said planar substrate define a first plane, said planar substrate including an array of CMOS IPR2020-00475 Patent 9,186,052 B1 8 pixels thereon, wherein a plurality of CMOS pixels within said array of CMOS pixels each include an amplifier, said image sensor further including a first circuit board having a length and a width thereto, wherein said length and width of said first circuit board define a second plane, said first circuit board including timing and control circuitry thereon, said timing and control circuitry being coupled to said array of CMOS pixels, said first circuit board being positioned in a stacked arrangement with respect to said planar substrate, said second plane of said first circuit board being substantially parallel to said first plane of said planar substrate, said image sensor producing a pre-video signal; a second circuit board mounted in said housing, said second circuit board being electrically coupled to said planar substrate and to said first circuit board, said second circuit board having a length and a width thereto, wherein said length and width of said second circuit board define a third plane, said second circuit board including circuitry thereon to convert said pre-video signal to a post-video signal, said second circuit board being offset from said first circuit board and from said planar substrate, said third plane of said second circuit board being substantially parallel to said second plane of said first circuit board and to said first plane of said planar substrate; a lens mounted in said housing, said lens being integral with said imaging device, said lens focusing images on said array of CMOS pixels of said image sensor; a video screen, said video screen being electrically coupled to said second circuit board, said video screen receiving said post- video signal and displaying images from said post-video signal; and a power supply mounted said housing, said power supply being electrically coupled to said planar substrate to provide power to said array of CMOS pixels, said power supply also being electrically coupled to said first circuit board to provide power to said timing and control circuitry, said power supply also being electrically coupled to said second circuit board to provide power thereto; IPR2020-00475 Patent 9,186,052 B1 9 wherein a largest dimension of said image sensor along said first plane is between 2 and 12 millimeters. D. Asserted Grounds Petitioner challenges claims 1, 3, and 7 based on the grounds set forth in the table below: Claims Challenged 35 U.S.C. § References 1 103 Wakabayashi,2 Ackland3 1 103 Wakabayashi, Ackland, Suzuki4 3, 7 103 Wakabayashi, Ricquier,5 Dierickx6 Pet. 11. Petitioner relies on the Declaration (Ex. 1004) and the Reply Declaration (Ex. 1086) (“Reply Declaration”) of Dr. Dean P. Neikirk. Patent Owner relies on the Declaration of Dr. Michael Lebby (Ex. 2088). 2 U.S. Patent 5,903,706, filed Aug. 22, 1995, issued May 11, 1999 (Ex. 1027). 3 U.S. Patent 5,835,141, filed July 3, 1996, issued Nov. 10, 1998 (Ex. 1006). 4 U.S. Patent 5,233,426, filed December 12, 1991, issued August 3, 1993 (Ex. 1015). 5 Ricquier, N., et al. “CIVIS Sensor: A Flexible Smart Imager with Programmable Resolution,” Charge-Coupled Devices and Solid State Optical Sensors IV. Vol. 2172. International Society for Optics and Photonics, 1994. Petitioner submitted two copies of this article, each with an accompanying declaration, as Exhibits 1033 and 1038. According to the accompanying declarations, Exhibits 1033 and 1038 are copies of the article obtained from SPIE and from the University of Wisconsin, respectively. Ex. 1033, 1; Ex. 1038, 1–2 (these cites are to Petitioner’s added page numbers). In this decision, we cite to Exhibit 1038, which Petitioner identifies as “Ricquier,” using the article’s original page numbers unless noted otherwise. 6 US Application Publication 2001/0010551 A1, filed October 31, 1996, published August 2, 2001 (Ex. 1041). IPR2020-00475 Patent 9,186,052 B1 10 II. LEVEL OF SKILL IN THE ART AND CLAIM CONSTRUCTION A. Level of Ordinary Skill in the Art Petitioner asserts that on or before October 6, 1997, a person of ordinary skill in the art (“POSITA”), would have had a minimum of “a Bachelor’s degree in Electrical Engineering, Physics, or a related field,” and “approximately two years of professional experience in the field of imaging devices.” Pet. 13 (citing Ex. 1004 ¶¶ 34–37). Patent Owner asserts: “a person of ordinary skill in the art in October 6, 1997 (the earliest effective date of the ’052 patent) would have had a Bachelor’s degree in Electrical Engineering, Physics, or a related field, and approximately three years of professional experience in the field of visible optical imaging devices.” PO Resp. 17 (citing Ex. 2088 ¶ 46). Neither party identifies any material differences between a skill level corresponding to approximately two years of professional experience in the field of imaging devices and approximately three years of professional experience in the field of visible optical imaging devices, or any difference in the field of imaging devices and the field of visible optical imaging devices. On this record, there is none. We determine that the level of ordinary skill in the art is at the level of that of one who would have had a Bachelor’s degree in Electrical Engineering, Physics, or a related field, and approximately two to three years of professional experience in the field of visible optical imaging devices.7 This definition is consistent with the prior art of record. Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001). 7 We do not adopt Petitioner’s inclusion of the qualifier “minimum” to keep IPR2020-00475 Patent 9,186,052 B1 11 B. Claim Construction “[I]n an inter partes review proceeding, a claim of a patent . . . shall be construed using the same claim construction standard that would be used to construe the claim in a civil action under 35 U.S.C. [§] 282(b), including construing the claim in accordance with the ordinary and customary meaning of such claim as understood by one of ordinary skill in the art and the prosecution history pertaining to the patent.” 37 C.F.R. § 42.100(b) (2019). In applying a district court-type claim construction, we are guided by the principle that the words of a claim “are generally given their ordinary and customary meaning,” as would have been understood by a person of ordinary skill in the art at the time of the invention. Phillips v. AWH Corp., 415 F.3d 1303, 1312–13 (Fed. Cir. 2005) (en banc) (citation omitted). “In determining the meaning of the disputed claim limitation, we look principally to the intrinsic evidence of record, examining the claim language itself, the written description, and the prosecution history, if in evidence.” DePuy Spine, Inc. v. Medtronic Sofamor Danek, Inc., 469 F.3d 1005, 1014 (Fed. Cir. 2006) (citing Phillips, 415 F.3d at 1312–17). There is a “heavy presumption,” however, that a claim term carries its ordinary and customary meaning. CCS Fitness, Inc. v. Brunswick Corp., 288 F.3d 1359, 1366 (Fed. Cir. 2002). We also are guided by the principle that we only construe claim terms if, and to the extent that, it is necessary for this proceeding. See, e.g., Nidec Motor Corp. v. Zhongshan Broad Ocean Motor Co., 868 F.3d 1013, 1017 (Fed. Cir. 2017) (“[W]e need only construe terms ‘that are in controversy, the specified level of skill more definite. IPR2020-00475 Patent 9,186,052 B1 12 and only to the extent necessary to resolve the controversy.’” (quoting Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999)). Neither party requests the construction of any claim term. Pet. 13; PO Resp. 16–17. Further, we do not find that any claim term requires express construction. III. ANALYSIS OF ASSERTED GROUNDS OF UNPATENTABILITY A. Principles of Law To prevail in its challenge to Patent Owner’s claims, Petitioner must demonstrate by a preponderance of the evidence that the claims are unpatentable.8 35 U.S.C. § 316(e) (2018); 37 C.F.R. § 42.1(d). That burden never shifts to the patentee. Dynamic Drinkware, LLC v. Nat’l Graphics, Inc., 800 F.3d 1375, 1378 (Fed. Cir. 2015). A patent claim is unpatentable under 35 U.S.C. § 103 if the differences between the claimed subject matter and the prior art are such that the subject matter, as a whole, would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 406 (2007). The question of obviousness is resolved on the basis of underlying factual determinations including (1) the scope and content of the prior art; (2) any differences between the claimed subject matter and the prior art; (3) the level of ordinary skill in the art; and (4) when in evidence, objective 8 The burden of showing something by a preponderance of the evidence requires the trier of fact to believe that the existence of a fact is more probable than its nonexistence before the trier of fact may find in favor of the party who carries the burden. Concrete Pipe & Prods. of Cal., Inc. v. Constr. Laborers Pension Tr. for S. Cal., 508 U.S. 602, 622 (1993). IPR2020-00475 Patent 9,186,052 B1 13 evidence of nonobviousness. Graham v. John Deere Co., 383 U.S. 1, 17–18 (1966). With these principles in mind, we make our determination of patentability based on the entirety of the evidence before us, both for and against obviousness. Below, we first address the evidence of nonobviousness submitted by Patent Owner. With that evidence in mind, we then address the parties’ contentions and evidence regarding the prior art references. B. Patent Owner’s Evidence of Nonobviousness Patent Owner asserts that the following secondary considerations support nonobviousness in this case: (1) commercial success, (2) satisfaction of a long-felt but unresolved need, (3) industry skepticism, (4) unexpected results, (5) industry praise, and (6) proceeding contrary to accepted wisdom. PO Resp. 56–62. It is well established that to accord substantial weight to secondary considerations in an obviousness analysis, the evidence of secondary considerations must have a nexus to the challenged claims, i.e., there must be a legally and factually sufficient connection between the evidence and the patented invention. Fox Factory, Inc. v. SRAM, LLC, 944 F.3d 1366, 1373 (Fed. Cir. 2019). A patentee is entitled to a presumption of nexus when the patentee shows that the asserted objective evidence is tied to a specific product and that product embodies the claimed features, and is coextensive with them. Id. Even where nexus cannot be presumed, “the patent owner is still afforded an opportunity to prove nexus by showing that the evidence of secondary considerations is the ‘direct result of the unique characteristics of IPR2020-00475 Patent 9,186,052 B1 14 the claimed invention.’” Id. (quoting In re Huang, 100 F.3d 135, 140 (Fed. 1996)). 1. Alleged Commercial Success As evidence of commercial success, Patent Owner asserts that “companies have taken a license to the ’052 Patent.” PO Resp. 60. Patent Owner asserts: Patent Owner and its parent, Micro-Imaging Solutions has licensed its patented reduced-area imaging device to several companies including: Gyrus Group PLC, Cook Inc., Cook Medical Technologies LLC, Coopersurgical, Inc., Ethicon Endo- Surgery, Inc., Fujikura Ltd., Microtek Medical, Inc., Endosee Corp., Karl Storz Imaging, Inc., and Voyage Medical Inc. See Ex. 2074. Id. at 61. Patent Owner does not indicate which of the above-identified entities, or how many, have taken a license to the ’052 patent nor has Patent Owner identified what, if any, other patents were subject to the licenses involving these companies. Exhibit 2074, cited by Patent Owner, is unexplained by Patent Owner with regard to its nature, source, origin, and authorship, and does not identify or refer to any specific licensed patent or licensee (except Fujikura Ltd.). Exhibit 2074 does not demonstrate that any entity has taken a license to any claim of the ’052 patent, much less for what specific reason. There is only Patent Owner’s bare assertion that companies have taken a license to the ’052 patent. This is not sufficient to create a presumption of nexus between any license and the merits of the ’052 patent, and Patent Owner has not separately proved a nexus between any license and the ’052 patent. In that regard, the Court of Appeals for the Federal Circuit has stated: Antor, beyond alleging the existence of a number of licenses, has not asserted any nexus between the merits of the invention and IPR2020-00475 Patent 9,186,052 B1 15 the licenses themselves. See In re GPAC Inc., 57 F.3d 1573, 1580 (Fed. Cir. 1995). Antor merely lists the licensees and their respective sales revenue. The licenses themselves are not even part of the record. Antor provides no evidence showing that the licensing program was successful either because of the merits of the claimed invention or because they were entered into as business decisions to avoid litigation, because of prior business relationships, or for other economic reasons. In re Antor Media Corp., 689 F.3d 1282, 1293–94 (Fed. Cir. 2012). Here, Patent Owner’s assertions are even less than that of the patentee in Antor, in that Patent Owner has not identified any specific licensee of the ’052 patent. Also, as in Antor, Patent Owner has not submitted any actual license, redacted or non-redacted, for any patent, into the record. Thus, there is no presumption of nexus and Patent Owner has not separately proved the required nexus for the alleged licensing and commercial success. Accordingly, there is not a legally and factually sufficient connection between the evidence of licensing and the patented invention. 2. Alleged Satisfaction of Long-Felt but Unresolved Need Patent Owner also asserts that the ’052 patent satisfied a long-felt but unresolved pressing “need for [a] smaller, more cost effective and reliable endoscope.” PO Resp. 61. Patent Owner cites an article by Orthopaedic Product News as recognizing Patent Owner’s incorporation of a reduced- area CMOS imaging device. Id. at 62. The article states: A Denver-based company has developed and patented high resolution, sturdy and inexpensive CMOS sensors (Complimentary Metal Oxide Semiconductors) that are actually built into the distal tip of arthroscopes, as well as other commonly used endoscopes. IPR2020-00475 Patent 9,186,052 B1 16 It is evident that we have needed an appropriate and thoughtful improvement to the scope and video system as we currently know it. The development of the CMOS sensor has addressed the needs of the surgeon, surgical facility and the patient while addressing the important issues of video image, thoughtful design and cost-effectiveness. This disposable scope system represents a significant advancement for arthroscopists, cost- conscious hospitals and surgeon centers and I believe it will be embraced by the endoscopy companies. The justification that my peers and I always recall is that if we can’t see . . . we can’t do the procedure. Ex. 2089, 2–3 (cited at PO Resp. 62). For numerous reasons, Patent Owner’s assertion that the claimed invention of the ’052 patent satisfied a long-felt but unresolved need is not supported by the evidence of record. A long-felt need can be established by objective evidence that the invention has provided a long-awaited, widely accepted, and promptly adopted solution to a problem extant in the art, or that others had tried but failed to solve that problem. In re Mixon, 470 F.2d 1374, 1377 (CCPA 1973); In re Allen, 324 F.2d 993, 997 (CCPA 1963). Patent Owner has not provided such evidence. First, Patent Owner does not explain why we should find that the referenced Denver-based company in the news article is the Patent Owner. Second, Patent Owner does not explain whether the referenced tips of arthroscopes and endoscopes with a built-in CMOS sensor make use of the claimed invention of the ’052 patent, and if so, which claims. Third, Patent Owner does not indicate whether any significant features are included in the referenced tips of arthroscopes and endoscopes, which are not recited in any claim of the ’052 patent. Fourth, Patent Owner does not explain how long a pressing need purportedly existed for a smaller, more cost effective and reliable endoscope. Fifth, Patent Owner has not identified any prompt IPR2020-00475 Patent 9,186,052 B1 17 adoption of the claimed invention by anyone nor has Patent Owner identified any specific prior failed attempts to resolve the alleged need. Sixth, this single article does not sufficiently demonstrate widespread recognition by those with ordinary skill in the art that there was a problem without a solution in the industry. Finally, even assuming that there was a long-felt but unresolved need for a smaller and more cost-effective arthroscope or endoscope, Patent Owner has not shown a nexus to the claimed invention, and none can be presumed. None of the challenged claims requires either an arthroscope or endoscope. Assuming that the article is referring to a product of Patent Owner, Patent Owner has not shown that the product is “coextensive” with any challenged claim from the perspective of satisfaction of a long-felt but unresolved need. See Fox Factory, 944 F.3d at 1373. For the foregoing reasons, there is not a legally and factually sufficient connection between the alleged long- felt but unresolved need and the claimed invention. 3. Alleged Industry Skepticism Patent Owner further asserts that, at the time of the invention of the ’052 patent, the industry was skeptical regarding the use of CMOS imagers for medical imaging because CMOS imager quality was “meaningfully lower than [the image quality] available with CCD [charged coupled device] imager devices.” PO Resp. 63. Patent Owner cites a declaration of a named inventor of the ’052 patent that was submitted in a related patent application. Id. In that declaration, the inventor states: There has been great skepticism in the industry as to the capability to use CMOS technology in medical imaging applications. CMOS imagers have been characterized as not IPR2020-00475 Patent 9,186,052 B1 18 being capable of producing high quality images. Despite this skepticism, we were able to locate companies developing CMOS technology that might be useable within an imaging device . . . [that] utilized a CMOS pixel array with timing and control placed together on one plane or circuit board, and remaining processing circuitry either placed in a remote control box, or on other circuit boards placed closely adjacent the CMOS pixel array. Ex. 1003, 84–85 (¶¶ 7–8). Patent Owner has not shown sufficient nexus between the alleged industry skepticism and the claimed invention. As Petitioner correctly observes (Reply 28–29), the alleged industry skepticism pertains to the image quality of CMOS image sensors incorporated in medical devices. Yet, the challenged claims do not require incorporation of the CMOS image sensor in a medical device, such as an endoscope, and the challenged claims do not require a minimum or threshold level of image quality. The claimed features are not coextensive or commensurate in scope with the purported industry skepticism. See Fox Factory, 944 F.3d at 1373. Further, the testimony by the inventor that the claimed invention overcame the alleged skepticism is conclusory. Ex. 1003, 84–85. The inventor states that the industry was skeptical that CMOS imagers could produce high quality images and that he and his co-inventors produced an imaging device that produced an extremely high quality image, but he cites no evidence to support this testimony. Id. Further, he does not provide any indication of what he means by an extremely high quality image or what improvement with respect to imaging quality the claimed invention allegedly obtained. Id. Thus, for these reasons, the proffered alleged industry skepticism provides little objective evidence of non-obviousness. IPR2020-00475 Patent 9,186,052 B1 19 4. Alleged Unexpected Results According to Patent Owner, its named inventors discovered an unknown but very important advantage that the claimed invention has over CCD type imagers, i.e., the capability to reject radio frequency interference (RFI) emitted by electrosurgical generators used during surgery. PO Resp. 64. Patent Owner notes that an inventor declaration, submitted during prosecution of a related application, stated that CCD devices cannot be used near an electrical surgical generator without requiring significant shielding, and that even with shielding, RFI levels are only brought to a reasonable level, which may still result in an obstructed view of the surgical area. Id. (citing Ex. 1003, 85 (¶ 11)). Patent Owner further notes that the declaration further states that “[a]fter testing several types of CMOS configurations, we concluded that remoting the processing circuitry from the CMOS imager and timing and control circuits eliminated the need for shielding.” Id. (citing Ex. 1003, 85 (¶ 12)). We find that Patent Owner has not shown a sufficient nexus between the alleged unexpected result and any of the challenged claims. The alleged unexpected result is based on RFI caused by electrosurgical generators used during surgery. However, none of the claimed imaging devices recite incorporation in a medical surgical device, such as an endoscope. Thus, the unexpected result, even if true, is not commensurate in scope with what has been claimed. “In order to establish unexpected results for a claimed invention, objective evidence of non-obviousness must be commensurate in scope with the claims which the evidence is offered to support.” In re Clemens, 622 F.2d 1029, 1035 (CCPA 1980) (citations omitted). IPR2020-00475 Patent 9,186,052 B1 20 Further, to establish a showing of unexpected results, Patent Owner has to compare the claimed invention with the closest prior art. In re Fracalossi, 681 F.2d 792, 794 (CCPA 1982); In re Fenn, 639 F.2d 762, 763 (CCPA 1981). Patent Owner has not shown that the closest prior art is a CCD imager. According to Patent Owner, CMOS technology and CCD technology are very different from each other. PO Resp. 11–16. On that basis, it would appear that closer prior art than a CCD device would be a CMOS imager, such as that disclosed in Ackland, or WO 95/34988, Published December 21, 1995 (“Swift” (Ex. 1005)), or US. Pat. 5,919,130, filed March 17, 1997 (“Monroe” (Ex. 1007)).9 Additionally, Dr. Neikirk testifies that the alleged discovery was not unexpected but, rather, predictable. Ex. 1004 ¶ 299. Dr. Neikirk explains as follows: [A]s the declaration notes, they were using endoscopic cameras around an “electrosurgical generator” that was used to “cut or cauterize” tissue. ’839 File History, 85. It would have been understood by a person of ordinary skill in the art that such an electrosurgical generator would create a large amount of electromagnetic (“EM”) radiation. Moreover, while the declaration does not clearly state how many wires were in the CCD system at issue, a person of ordinary skill in the art would have understood that such EM radiation would cause radio frequency interference (“RFI”) in a system, and would have a more significant adverse effect on a system with more wires than a system with fewer wires. It was also known that a CCD sensor could have many more wires than a CMOS sensor. For example, according to the declaration, the prior art CCD sensor identified in the declaration (“Pelchy”) includes “a large number of transmission wires 33 which interconnect the circuit boards 9 Swift and Monroe are cited in the Petition to show CMOS sensor configurations already known in the art. Pet. 26. IPR2020-00475 Patent 9,186,052 B1 21 placed perpendicular to the pixel array with an external processor 13.” ’839 File History, 92. Thus, in a CCD sensor with many wires, the radio frequency interference would have a relatively large effect on the quality of images produced by the image sensor. On the other hand, CMOS sensors require only a few wires to connect to the pixel array, and thus interference created in a CMOS image sensor would be much smaller than in such a CCD arrangement. Ex. 1004 ¶ 299. This testimony is not rebutted by Patent Owner’s expert, Dr. Lebby. Patent Owner does not identify any testimony of Dr. Lebby conveying that it would have been unexpected to one of ordinary skill in the art that a CMOS sensor with remotely located processing circuitry would have no need for RFI shielding. Dr. Neikirk’s testimony is rational, and we credit his testimony over the testimony of Patent Owner’s inventor, who provides no explanation as to why it was purportedly unexpected that, as compared to CCD devices, a CMOS imager with remotely located processing circuitry requires no RFI shielding. For the foregoing reasons, Patent Owner has not established that the alleged unexpected result truly would have been unexpected to an ordinarily skilled artisan. Even assuming the alleged unexpected result truly would have been unexpected to an ordinarily skilled artisan, Patent Owner has not shown sufficient nexus between the unexpected result and the claimed invention. 5. Alleged Industry Praise Patent Owner asserts that it has received industry praise. PO Resp. 65. Specifically, Patent Owner states: Micro-Imaging Systems won the Orthopedics This Week’s 2016 Sports Medicine Technology Award for its “Distally mounted IPR2020-00475 Patent 9,186,052 B1 22 CMOS Sensor for disposable/reusable and rigid/flexible scopes” which features the claimed reduced-area imaging device, Orthopedics This Week noted the benefits of Patent Owner’s CMOS sensors that could be placed in the tip of an endoscope. Id. (citing Ex. 2090, 14–15). The cited portion of Exhibit 2090 reads as follows: Current cameras and endoscopes (all types) have remained unchanged for decades and degrade from “Day 1” of utilization thus causing undesirably compromise of visual clarity at an extremely inconvenient time! This technology allows for flexible or rigid applications as a reusable or a disposable with significant value. Utilization of this technology can eliminate the five things that degrade current and problematic technology. It has the real benefit of reducing repair costs as well as OR “down time” and the need to acquire costly surplus inventory to avoid catastrophes. Ex. 2090, 14–15 (quoted by PO Resp. 65). Patent Owner has not identified a sufficient nexus between the above- quoted text in Exhibit 2090 and the features of the invention claimed in the ’052 patent, and between the “award” and the features of the invention claimed in the ’052 patent. There is insufficient detail in the above-quoted text to associate that which is praised to the features claimed in the ’052 patent. The references to “this technology” do not reveal specific features of what is being praised. Even assuming that “this technology” includes the features of the claimed invention, the praise also is directed to additional features not recited in the challenged claims, i.e., an imaging device mounted on an endoscope. None of the challenged claims requires the image sensor to be mounted on or affixed to an endoscope. Thus, Patent Owner has not shown that the alleged industry praise is “coextensive” with any challenged claim. See Fox Factory, 944 F.3d at 1373. There is not a IPR2020-00475 Patent 9,186,052 B1 23 legally and factually sufficient connection between the alleged industry praise and the claimed invention. 6. Allegedly Proceeding Contrary to Accepted Wisdom Patent Owner argues: Prior to the ’052 Patent, the accepted wisdom in the art was that CMOS imagers should be implemented in an on-chip integration manner. Dr. Eric Fossum10 spearheaded the development of the CMOS camera on a chip design efforts. Fossum’s design would enable full realization of the benefits of a CMOS imager boasting numerous benefits over the dominant CCD image sensor. For example, the CMOS camera on a chip would enable designers to “make a camera small and cheap enough to open vast new markets for everything from dolls that [‘]see[’] to rear-bumpers cameras that would help drivers back up.” Ex. 1060. However, Patent Owner recognized that a need still existed for a reduced area imaging device which could be used in even smaller devices, such as endoscopic instruments, in order to view areas that are particularly difficult to access, and to further minimize patient trauma by an even smaller diameter invasive instrument. As a result, the ’052 Patent describes and claims a reduced area imaging device which took advantage of Fossum’s revolutionary “camera on a chip” technology, but rearranged the circuitry to separate out circuitry so that a further minimum profile could be achieved. PO Resp. 66–67. Patent Owner does not cite to any expert testimony that supports the position that a CMOS imager with off-chip circuitry was inoperative, unworkable, or undesirable. In fact, the record evidence is to the contrary. Dr. Neikirk specifically identifies examples of prior-art disclosures of 10Dr. Fossum is the author of the article titled “Active-pixel sensors challenge CCDs,” published in Laser Focus World. Ex. 1048. Another exhibit (Ex. 1060), a Business Week article, discusses a design for a “camera-on-a-chip” by Dr. Fossum. Ex. 1060, 1. IPR2020-00475 Patent 9,186,052 B1 24 CMOS imagers with off-chip configurations. Ex. 1004 ¶¶ 40 (identifying Swift and Monroe) 77 (“Monroe teaches a CMOS imager”), 229. Further, the record evidence does not support Patent Owner’s assertion that the accepted wisdom in the art was that CMOS imagers should be implemented only in an on-chip integration manner, and we do not find that to be so. Also, Patent Owner appears to have not accounted for the basic skills or fundamental engineering principles that would have been possessed by one with ordinary skill in the art, e.g., offloading some components to another chip or another circuit board would decrease the required size for the containing chip or circuit board. For example, Dr. Neikirk testifies that “a person of ordinary skill would have known that components could be placed on a number of circuit boards and arranged in any number of different ‘planes’ based on the design needs and intended applications of a given device.” Ex. 1004 ¶ 40. Patent Owner does not identify any contrary testimony from its expert, Dr. Lebby, and we credit this testimony from Dr. Neikirk. For the foregoing reasons, Patent Owner’s argument that it proceeded against accepted wisdom adds very little to the strength of its evidence on objective indicia of nonobviousness. 7. Summary of Objective Evidence of Nonobviousness For the foregoing reasons, the objective evidence of nonobviousness relied on by Patent Owner is weak. As set forth below, we have considered this evidence together with the evidence discussed below, to arrive at a conclusion of whether Petitioner has proven that the challenged claims would have been obvious. IPR2020-00475 Patent 9,186,052 B1 25 C. Asserted Obviousness of Claim 1 over Wakabayashi and Ackland Petitioner asserts that claim 1 would have been obvious over Wakabayashi and Ackland. Pet. 9, 15–55. We need not to determine whether Petitioner has met its burden of proof for this ground, in light of our determinations regarding Petitioner’s other asserted grounds. D. Asserted Obviousness of Claim 1 over Wakabayashi, Ackland, and Suzuki Petitioner asserts that claim 1 would have been obvious over Wakabayashi, Ackland, and Suzuki. Pet. 56–58. 1. Wakabayashi Wakabayashi was filed on August 22, 1995, and issued on May 11, 1999. Ex. 1027, codes (22), (45). The earliest priority date claimed for the ’052 patent is based on the priority filing date of U.S. Patent Application No. 08/944,322, which is October 6, 1997. Ex. 1001, code (63). Thus, Wakabayashi is prior art to the ’052 patent under 35 U.S.C. § 102(e). Patent Owner does not contest the prior art status of Wakabayashi. See generally PO Resp. Wakabayashi is titled “Imager Apparatus with Rotatable Camera Head.” Ex. 1027, code (54). Wakabayashi is directed to “a portable imager apparatus which includes a video camera as an imager unit, a direct-view type flat display as an electronic view finder or display, and a semiconductor memory or video tape recorder (VTR) as a storage or recording unit.” Id. at 1:5–9. Figure 3, showing a cross-sectional view of an imager apparatus, is reproduced below (Ex. 1027, 3:49–57): IPR2020-00475 Patent 9,186,052 B1 26 As shown in Figure 3 above, camera case 16, formed with imaging hole 18, contains video camera 22, which includes shutter 23, lens case 24, lens 25, quartz filter 26, imager device 27, mounting plate 28, and camera circuit board 29. Ex. 1027, 5:49–58. 2. Ackland Ackland was filed on July 3, 1996, and issued on November 10, 1998. Ex. 1006, codes (22), (45). Thus, Ackland is prior art to the ’052 patent under 35 U.S.C. § 102(e). Ex. 1001, code (63). Patent Owner does not contest the prior art status of Ackland. See generally PO Resp. Ackland is titled “Single-Polysilicon CMOS Active Pixel Image Sensor” and is directed to a “[a] CMOS active pixel characterized by a single layer of polysilicon for forming the photo gate and the transfer gate . . . , a method for operating the pixel, and pixel arrays based on such a IPR2020-00475 Patent 9,186,052 B1 27 pixel.” Ex. 1006, code (54), 2:19–22. Ackland describes an array of pixels arranged in first and second groups representing a row and column, respectively. Id. at 2:46–50. A first common conductor conducts control signals for the first group, while a second common conductor selectively transmits, to output nodes, electronic data signals that correspond to portions of an image to be converted. Id. at 2:50–55. Figure 6, showing an active pixel image sensor (Ex. 1006, 3:6–7), is reproduced below: As shown above, the Figure 6 embodiment, which may be used as a solid- state camera, includes “array 5 of active pixels, a row decoder 10 and a plurality of output amplifiers 18.” Ex. 1006, 7:62–65. Common conductor 55 also serves as a control line for each row 25 of pixels. Id. at 8:10–11. Common conductor 65 further serves as an output line to a particular amplifier 18 for each column 30 of pixels. Id. at 8:18–20. “[A] timing controller 20 provides timing signals to the row decoder 10.” Id. at 8:24–25. In response to the timing signals, “the decoder 10 sequentially activates each row 25 of active pixels 35 via the control lines 55 to detect light intensity IPR2020-00475 Patent 9,186,052 B1 28 and to generate corresponding output voltage signals during each frame interval.” Id. at 8:25–29. Further, “[t]he output voltage signals generated by the activated row 35 are simultaneously provided to the corresponding amplifiers 18 via the column output line 65.” Id. at 8:45–48. 3. Suzuki Suzuki issued on August 3, 1993. Ex. 1015, code (45). Thus, Suzuki is prior art to the ’052 patent under 35 U.S.C. § 102(b). Ex. 1001, code (63). Patent Owner does not contest the prior art status of Suzuki. See generally PO Resp. Suzuki is directed to a “Reduced Diameter Camera Head for [a] Solid- State Image Pickup Device And Method of Producing the Same.” Ex. 1015, code (54). Figure 2, reproduced below, is a cross-sectional view of camera head 2: Figure 2 above shows camera head 2 with image pickup unit 22, the latter of which comprises solid-state image pickup chip 221 and circuit module 222. IPR2020-00475 Patent 9,186,052 B1 29 Id. at 2:38–41. Suzuki discloses the use of an 8.5 mm solid-state image pickup chip with an outer camera head diameter of about 10 mm. Id. at 4:6– 12. 4. Combination of Wakabayashi and Ackland Petitioner argues that an ordinarily skilled artisan would have combined Wakabayashi’s and Ackland’s teachings. Pet. 15–26. In particular, as set forth below, Petitioner asserts that an ordinarily skilled artisan would have combined Wakabayashi’s teachings of a solid state imager device and driving circuit to generate an opto-electrically converted signal with Ackland’s teachings of: a CMOS pixel array, pixels with amplifiers, and a timing control circuit for use in an imaging system. Id. at 27–28. Petitioner argues that although Wakabayashi discloses that “the image sensor uses a ‘solid-state imager device’ and a ‘circuit for driving the solid- state imager device’ to ‘generate[] an opto-electrically converted signal’ Wakabayashi does not expressly state that its ‘imager device 27 [] electrically connected to the camera circuit board 29’ includes an array of CMOS pixels.” Pet. 27. Petitioner relies on Ackland as teaching “‘an imaging system . . . used as a solid-state camera,’ which includes a ‘CMOS . . . pixel array’ for receiving images thereon.” Id. Petitioner further argues that Wakabayashi does not expressly disclose that its pixels each include an amplifier. Pet. 27. Petitioner relies on Ackland for that arrangement. Id. Petitioner further asserts that “Wakabayashi does not detail the timing and control circuitry of its imager device 27 [] electrically connected to the camera circuit board 29.” Id. at 28. Petitioner relies on Ackland as IPR2020-00475 Patent 9,186,052 B1 30 describing circuitry including a ‘timing controller 20 provid[ing] timing signals’ that control the imaging system ‘to achieve a desired frame rate.’” Id. Further, Petitioner argues that “Wakabayashi does not detail the timing and control circuitry of its ‘imager device 27 [] electrically connected to the camera circuit board 29.”’ Pet. 28. Petitioner relies on Ackland as describing circuitry including a “timing controller 20 provid[ing] timing signals” that control the imaging system “to achieve a desired frame rate.” Pet. 28. The parties’ arguments regarding whether an ordinarily skilled artisan would have been motivated to combine these teachings and would have had a reasonable expectation of success in doing so are addressed in the element- by-element analysis of claim 1 in Section III.D.6 below. 5. Combination of Suzuki with Wakabayashi and Ackland Petitioner argues that an ordinarily skilled artisan would have combined Suzuki’s teachings with those of Wakabayashi and Ackland. Pet. 56–58. In particular, Petitioner asserts that an ordinarily skilled artisan would have combined Wakabayashi’s imager apparatus (as modified by Ackland) with Suzuki’s teachings of a printed circuit board with a solid-state image pickup chip of 8.5 mm and a chassis with an outer diameter of about 10 mm. Id. The parties’ arguments regarding whether an ordinarily skilled artisan would have been motivated to combine these teachings and would have had a reasonable expectation of success in doing so are addressed in the element-by-element analysis of claim 1 in Section III.D.6 below. IPR2020-00475 Patent 9,186,052 B1 31 6. Element-by-Element Analysis of Claim 1 The parties dispute whether Wakabayashi, Ackland, and Suzuki teach the following limitations in claim 1: (i) “said first circuit board including an array of CMOS pixels thereon,” (ii) “a second circuit board mounted in said housing, said second circuit board being electrically coupled to said first circuit board, said second circuit board having a length and a width thereto, wherein said length and width of said second circuit board define a second plane, said second circuit board including circuitry thereon to convert said pre-video signal to a post-video signal, said second circuit board being offset from said first circuit board, said second plane of said second circuit board being substantially parallel to said first plane of said first circuit board,” and (iii) “wherein a largest dimension of said image sensor along said first plane is between 2 and 12 millimeters.” Pet. 38–44, 48–50; PO Resp. 21–25, 35– 38. We address both the disputed and undisputed limitations of claim 1 below. The disputed limitations are limitations 1.b, 1.f, and 1.k11 and are respectively addressed in sections III.D.6.c, III.D.6.g, and III.D.6.l below. a. [1.pre] an imaging device Petitioner contends that Wakabayashi teaches an imaging device. Pet. 32 (“To the extent the preamble is limiting, Wakabayashi discloses an imaging device (e.g., ‘a portable imager apparatus’).”). Patent Owner does not dispute this assertion. See generally PO Resp. Wakabayashi discloses that it “relates to a portable imager apparatus which includes a video camera as an imager unit.” Ex. 1027, 1:6–7 11 For ease of reference, we use the labels provided in the Petition for the preambles and limitations of claims 3 and 7. Pet. 32–55, 65. IPR2020-00475 Patent 9,186,052 B1 32 (emphasis added); see also Figs. 1 and 2. Thus, we find that Wakabayashi teaches an imaging device.12 Ex. 1004 ¶¶ 98–99. b. [1.a] a housing Petitioner argues that Wakabayashi teaches limitation 1.a. Pet. 33–35. Petitioner argues that Wakabayashi discloses that the housing for its imager apparatus is formed by housing 3 (including the front panel 2a and rear panel 2b), camera case 16, and battery-cover 11. Id. at 33. Petitioner provides an annotated version of Figure 2 of Wakabayashi, which is reproduced below: Pet. 34. In the above annotated figure, Petitioner colors what it maps as the recited housing in yellow. Id. Patent Owner does not dispute Petitioner’s assertion that Wakabayashi teaches limitation 1.a. PO Resp. 25–51. We find that Wakabayashi teaches the recited housing. In particular, in Wakabayashi, the recited housing is housing 3, including panels 2a and 2b, camera case 16, and battery cover-plate 11. Ex. 1004 ¶¶ 100–102. c. [1.b] an image sensor mounted in said housing, said image sensor including a first circuit board having a length and a width thereto, wherein said length and width of said first circuit board define a first plane, said 12Thus, we do not need to determine whether the preamble of claim 1 is limiting. IPR2020-00475 Patent 9,186,052 B1 33 first circuit board including an array of CMOS pixels thereon We address limitation 1.b. in two parts, which we label 1.b.i and 1.b.ii. i. [1.b.i] an image sensor mounted in said housing, said image sensor including a first circuit board having a length and a width thereto, wherein said length and width of said first circuit board define a first plane Petitioner argues that Wakabayashi teaches limitation 1.b.i. Pet. 35– 38. Petitioner provides annotated versions of Figures 3 and 7 of Wakabayashi (reproduced below) that illustrate Petitioner’s mapping for this limitation: Id. at 37–38. Figures 3 and 7 above are annotated versions of cross-sectional views of an imager apparatus. Ex. 1027, 5:48–49, 6:20–21. Petitioner argues that imager device 27 is soldered to circuit board 29, which is the recited first circuit board. Id. at 35. Petitioner asserts that the combination of imager device 27 and circuit board 29 is the recited image sensor. Id. Further, Petitioner asserts that circuit board 29 is fixed on mounting plate 28, IPR2020-00475 Patent 9,186,052 B1 34 which is fixed to camera case 16. Id. Petitioner argues that, thus, the recited image sensor is mounted inside the housing. Id. Petitioner further asserts that circuit board 29 has a length and width that define a first plane as depicted in Figure 7. Id. Patent Owner does not dispute that Wakabayashi teaches limitation 1.b.i. PO Resp. 25–51. We find that Wakabayashi teaches limitation 1.b.i. Wakabayashi discloses that “imager device 27 is electrically connected to the camera circuit board 29 by soldering.” Ex. 1027, 6:47–49. Wakabayashi further discloses that “video camera 22 includes . . . an imager device 27 . . . and a camera circuit board 29.” Id. at 5:56–61. Further, Figure 7, reproduced above, shows that camera circuit board 29 has a plane defined by its length and width. Thus, Wakabayashi teaches limitation 1.b.i. Ex. 1004 ¶¶ 103– 110. ii. [1.b.ii] said first circuit board including an array of CMOS pixels thereon Petitioner argues that Wakabayashi and Ackland combined teach limitation 1.b.ii. Pet. 38–40. As discussed above, Petitioner argues Wakabayashi teaches “said first circuit board.” Petitioner argues Ackland teaches an “imaging system” that includes a “CMOS . . . pixel array” for receiving images thereon. Id. at 43; see also Ex. 1006, 1:35–38. Petitioner provides an annotated version of Figure 6 of Ackland (reproduced below), which depicts an array of CMOS pixels: IPR2020-00475 Patent 9,186,052 B1 35 Id. at 40; Ex. 1006, 7:59–8:8. As shown in Figure 6 above, the array of CMOS pixels (array 5) includes columns 30 and rows 25 of active pixels 35, which are CMOS pixels.13 Ex. 1006, 3:15–17, 7:65–67. Petitioner further argues that the combined disclosures of Wakabayashi’s circuit board and Ackland’s CMOS array teach limitation 1.b.ii. Pet. 38–40. Patent Owner does not dispute that Ackland teaches an array of CMOS pixels or that the combination of Wakabayashi and Ackland teaches limitation 1.b. PO Resp. 25–51. Patent Owner, however, disputes that an ordinarily skilled artisan would have combined Ackland’s CMOS array with Wakabayashi’s imager apparatus and that an ordinarily skilled artisan would have had a reasonable expectation of success in making this combination. Id. Patent Owner also argues that Petitioner’s proposed combination relies on impermissible hindsight. Id. 13 The reference to active pixels 35 in array 5 may be a typographical error. Ackland refers to the pixels in that array as “single polysilicon active pixels 36,” whereas pixels 35 are double polysilicon pixels. Ex. 1006, 3:15–17, 7:59–62, 8:5–8. Active pixels 36, however, are also CMOS pixels, so the typographical error, if it exists, is of no significance. Id. at 3:11–14. IPR2020-00475 Patent 9,186,052 B1 36 We find that the combination of Wakabayashi and Ackland teaches limitation 1.b.ii. Ex. 1004 ¶¶ 111–113; Ex. 1006, 2:66–67; 3:20–25; 5:7–10, 7:44–47; 7:59–67, Fig. 3; Fig. 6; see also section III.D.6.c. We address the parties’ arguments regarding a motivation to combine, alleged inoperability for Ackland’s intended purpose, a reasonable expectation of success, and alleged hindsight below. a. Motivation to Combine Ackland’s CMOS Array Teachings with Wakabayashi’s Imager Apparatus Petitioner argues that Wakabayashi and Ackland are in the same field of art and are analogous art to the ’052 patent. Pet. 30. Petitioner further argues that Wakabayashi and Ackland are also reasonably pertinent to the problems identified in the ’052 patent. Id. Patent Owner does not dispute that Wakabayashi and Ackland are analogous art. PO Resp. 25–50. With regard to combining the relevant teachings of Wakabayashi and Ackland, the Petition states: While Wakabayashi discloses that the image sensor uses a “solid-state imager device” and a “circuit for driving the solid- state imager device” to “generate[] an opto-electrically converted signal” (Wakabayashi, 9:11-15), Wakabayashi does not expressly state that its “imager device 27 [] electrically connected to the camera circuit board 29” includes an array of CMOS pixels. Ackland expressly provides this additional implementation detail for “an imaging system . . . used as a solid- state camera.” E.g., Ackland, 7:62-63. Specifically, Ackland teaches that the “imaging system” includes a “CMOS…pixel array” for receiving images thereon. Ackland, 1:35-38 . . . . Pet. 27. The Petition further states: “[an ordinarily skilled artisan] would have been motivated to apply Ackland’s known teachings of an array of CMOS active pixels in an image sensor in implementing Wakabayashi’s IPR2020-00475 Patent 9,186,052 B1 37 ‘imager device 27 [] electrically connected to the camera circuit board 29.’” Id. at 39.14 Patent Owner disputes that an ordinarily skilled artisan would have had a motivation to combine Wakabayashi and Ackland. PO Resp. 37– 42. We find Petitioner’s reason, described above, for combining Ackland’s CMOS array with Wakabayashi’s imager apparatus persuasive. Wakabayashi describes its imager device as a “solid state imager device,” but does not specify the particular type of solid state imager device, e.g., CCD, CMOS, etc. Ex. 1027, 9:10–14. Petitioner’s expert, Dr. Neikirk, testifies that a CMOS based imager is a solid state imager. Ex. 1004 ¶¶ 42– 44; Ex. 1086 ¶ 44 (“CMOS image sensors were well-known examples of solid-state imagers”). The ’052 patent acknowledges that CMOS imagers use solid state imaging technology. Ex. 1001, 1:57–65. Further, Ackland discloses that: “Another class of solid state image sensors is a CMOS active pixel array.” Ex. 1006, 1:33–34. Further, Ackland describes only two other classes of solid state imager devices: CCDs and MOS diode arrays. Id. at 1:14–34. Ackland further teaches the CMOS pixel arrays “may be used as a solid-state camera.” See id. at 7:63. These teachings at least suggest implementing Wakabayashi’s imager apparatus using a CMOS array as taught by Ackland. 14 Petitioner argues that an ordinarily skilled artisan would have had additional motivations for combining Wakabayashi and Ackland, but in light of our finding regarding the above motivation, we do not need to address those additional motivations. Pet. 26–32. IPR2020-00475 Patent 9,186,052 B1 38 Patent Owner presents several reasons why it contends Petitioner has not shown that an ordinarily skilled artisan would have been motivated to combine Wakabayashi’s imager apparatus with Ackland’s CMOS array. First, Patent Owner argues that Petitioner’s main rationale for combining Wakabayashi and Ackland is that they are in the same field. PO Resp. 37. Patent Owner argues that merely being in the same field is not enough to provide a motivation to combine. Id. Although we agree that the mere fact that Wakabayashi and Ackland are in the same field does not provide the requisite motivation to combine, that fact does establish that Wakabayashi and Ackland are analogous art. Further, as discussed above, Petitioner has set forth a motivation to combine (i.e., Wakabayashi describes its imager device as a “solid state imager device,” but does not specify the particular type of solid state imager device, while Ackland discloses a CMOS pixel array as a solid state imager for use in a solid state camera).15 Second, Patent Owner asserts that Petitioner does not identify how Wakabayashi’s and Ackland’s components would be arranged. PO Resp. 41. We disagree. As noted above, Petitioner asserts that “[a] POSITA thus would have been motivated to apply Ackland’s known teachings described above in implementing Wakabayashi’s ‘imaging apparatus.’” Pet. 30, 41– 42. The teachings of Ackland “described above” are its array of CMOS pixels, the amplifiers coupled to each pixel, and associated timing controller 15Patent Owner also asserts that Petitioner’s proffered motivations of simpler fabrication, overcoming a large load offered by common output conductor 65, and lower costs for CMOS chips are insufficient to support the combination. PO Resp. 39–40. We do not need to address this assertion or those purported motivations in light of our findings regarding the solid-state- imager motivation discussed above. IPR2020-00475 Patent 9,186,052 B1 39 20, i.e., the pixel array and circuitry for obtaining a readout from the array to output a pre-video signal. Id. at 30–31. Third, Patent Owner asserts in its Sur-reply that the presence of a mounting plate 28 between the imager device and circuit board in Wakabayashi and Wakabayashi’s usage of its image arrangement convertor circuit 104 suggest that Wakabayashi’s camera architecture is only for a CCD sensor, and not for a CMOS sensor. Sur-reply 13–14. We do not find this argument persuasive, even if we were to assume that the specific embodiment described must be a CCD sensor. Similar to what is discussed immediately above, a specific disclosure of a CCD embodiment does not take away or undermine Wakabayashi’s broader express disclosure that a solid state imager may be used. Wakabayashi does not have to specifically describe a CMOS imager embodiment for its reference to “solid state imager” to have suggested a CMOS imager to an ordinarily skilled artisan. There is no inconsistency between specifically disclosing a CCD embodiment and also reasonably suggesting using a CMOS imager by having broader disclosure. The term “CCD” or “charge-coupled device” nowhere appears in the disclosure of Wakabayashi, and Wakabayashi expressly teaches the use of a solid-state imager. Ex. 1027, 9:9–14, 12:47–51. We have determined above that a CMOS imager is a solid-state imager. Patent Owner does not assert and Dr. Lebby does not testify that an off-chip design for locating processing circuitry is usable exclusively by CCD devices. Even Dr. Lebby, Patent Owner’s expert, testifies that Wakabayashi’s disclosed circuit architecture “would have been understood to use CCD, MOS, or CID image sensors.” Ex. 2088 ¶ 115. Thus, Patent Owner’s argument that Wakabayashi’s off- IPR2020-00475 Patent 9,186,052 B1 40 chip design for processing circuitry is conventional for CCD devices misses the mark in countering Petitioner’s stated rationale for using Ackland’s CMOS imager 5, amplifiers 18, and timing controller 20 to implement Wakabayashi’s imager device 27. Further, Petitioner in the Petition and in the Reply asserts that CMOS image sensors with off-chip processing circuitry were well known, citing as examples WO 95/34988, published December 21, 1995 (Ex. 1005) (“Swift”) and U.S. Patent 5,919,130, filed March 17, 1997 (Ex. 1007) (“Monroe”). Pet. 25; Reply 3. Patent Owner in its Patent Owner Response and Sur-reply does not argue that Swift and Monroe do not disclose what Petitioner asserts they disclose, i.e., a CMOS imager in which the processing circuitry is located off-chip and separate from the CMOS pixel array. Instead, in its Sur-reply, Patent Owner argues that Petitioner engaged in “an attempt to apply general knowledge of one skilled in the art to supply the missing motivation [to] combine” but Petitioner and Dr. Neikirk fail to explain how Swift and Monroe evidence general knowledge rather than the details of specific embodiments. Sur-reply 7. Although Swift and Monroe may disclose specific embodiments, both disclose a CMOS imager in which the processing circuitry is located off-chip. Ex. 1005, 8:33–9:21, 10:12–16, 1825–33, Fig. 2; Ex. 1007, 3:36–62, 8:8–11, Fig. 3; Ex. 1004 ¶ 77. Thus, they support Petitioner’s contention that CMOS imager sensors with off-chip processing circuitry were known and support Dr. Neikirk’s broader testimony. Pet. 25; Pet. Reply 3; Ex. 1004 ¶ 77. Even according to Patent Owner, a CMOS sensor provides the “ability to integrate much of the camera timing, control and signal processing circuitry onto the same silicon die.” PO Resp. 15 (emphasis added). Patent IPR2020-00475 Patent 9,186,052 B1 41 Owner does not assert and Dr. Lebby does not testify that a CMOS sensor requires all such components to be integrated onto the same die or chip. Providing an ability does not and cannot be equated to imposing a requirement. For the foregoing reasons, Petitioner’s stated rationale for using Ackland’s CMOS imager as Wakabayashi’s solid-state imager is not undermined by Patent Owner’s argument that Wakabayashi’s illustrated circuit design is conventional for CCD devices and thus one with ordinary skill in the art would have understood that Wakabayashi describes a CCD device. The scope of “solid-state imager” as referenced in Wakabayashi is broader and would have reasonably suggested a CMOS imager, particularly in light of Ackland’s CMOS imager that is described as being for a “solid state camera.” Fifth, citing Wasica Finance GmbH v. Continental Auto Systems, 853 F.3d 1272, 1285 (Fed. Cir. 2017) and Metabolite Labs., Inc. v. Lab. Corp. of Am. Holdings, 370 F.3d 1354, 1367 (Fed. Cir. 2004), Patent Owner notes: “The Federal Circuit has made clear that the disclosure of a genus is not necessarily a disclosure of a species.” Sur-reply 4. The observation is correct but misplaced. Petitioner does not assert, and we do not find, that Wakabayashi’s disclosure of a “solid-state imager” is a specific disclosure of a CMOS imager. Rather, Petitioner asserts obviousness based on Wakabayashi’s express teaching of using a “solid-state imager,” Ackland’s teaching that its CMOS imager is used in a “solid-state camera,” and the fact that a CMOS imager is a solid state imager. Further, Patent Owner does not assert and the record does not show that the genus or class of solid-state imagers is made up of species members so innumerable that no one member IPR2020-00475 Patent 9,186,052 B1 42 can reasonably be deemed to have been rendered obvious by disclosure of the genus or class. Dr. Lebby identifies four types of solid state imagers; CMOS being one. Ex. 2088 ¶¶ 63–84 (identifying MOS, CCD, CID, and CMOS solid-state image sensors). Dr. Neikirk also identifies four types of solid state imagers. Ex. 1004 ¶ 42 (identifying that solid-state imagers employing CCD, CID, PDA, and CMOS sensors). Ackland itself identifies three types of solid-state image sensors. Ex. 1006, 1:14–34 (CCDs, MOS, CMOS). Further, Petitioner relies on more than just a genus/species relationship for its obviousness assertion. Ackland specifically describes that its CMOS imaging system may be used for a “solid-state camera.” Ex. 1006, 7:59–64. Sixth, Patent Owner further relies on Exhibit 2052—a website printout from a page called “Digital Photography Review” that lists various digital cameras that were released in 1997—to support its argument that “all major digital cameras” at the time of the invention had CCD sensors, not CMOS sensors. PO Resp. 31. However, there is no indication in Exhibit 2052 of what type of sensors (CCD or CMOS) are utilized in the listed cameras. Further, we agree with Petitioner that “[e]ven assuming this website [from which Exhibit 2052 is a printout] were a reliable source (which PO has not shown), it never mentions anything about CCD or CMOS sensors, nor does it indicate its list is exhaustive.” Reply 6-7. In its Sur- reply, Patent Owner does not rebut this observation by Petitioner. Dr. Lebby also does not provide any indication of what types of sensors (CCD or CMOS) are used by the listed cameras in Exhibit 2052. Furthermore, Petitioner lists at least three digital cameras that used CMOS sensors in 1997: Toshiba’s Allegretto PDR-2, Sound Vision’s IPR2020-00475 Patent 9,186,052 B1 43 SVmini 209, and the ViviCam 3000. Reply 7 (citing Ex. 1091; Ex. 1088, 7; Ex. 1087, 34; Ex. 1086 ¶ 29). Patent Owner provides no rebuttal in that regard in its Sur-reply. For all of these reasons, we do not find, as Patent Owner asserts, that “all major digital cameras” in 1997 used CCD but not CMOS imaging sensors. Seventh, Patent Owner also provides Exhibit 2036, a report titled “Global Electronics Industry Market Report and Forecast,” which contains a figure showing the presence and use of various types of imagers over more than forty years. Ex. 2036, 222. Figure 7.5 of Exhibit 2036 is reproduced below, with a red circle added by Petitioner to show that CMOS imagers came into existence starting in the mid-1990s (Reply 8): The figure above shows the presence and use of various types of imager sensors over a period of over forty years. In this figure, CMOS imagers are represented by a neon-green color (see, e.g., the CMOS label in the lower right-hand area of the figure). Patent Owner asserts that Figure 7.5 IPR2020-00475 Patent 9,186,052 B1 44 illustrates the image sensor market in the relevant time frame, showing that CCD imagers (“green-yellow,” see, e.g., “CCD” label in the middle of the figure) dominated the market in the 1990s and into the early 2000s, with CMOS imagers (neon green) only starting to gain market share in the late 1990s. PO Resp. 10-11. Figure 7.5, however, does not show the complete absence of CMOS imagers in 1997. Reply 8. It shows that CMOS imagers came into existence in the mid-1990’s, certainly by 1997. Id. Eighth, Patent Owner submits Exhibit 2060, a Wall Street Journal article dated August 21, 1998 and titled “Advances in CMOS Chips Help Sales of Digital Cameras.” Patent Owner cites Exhibit 2060 for the proposition that a POSITA would have understood that known CMOS image sensors at the time of the invention would not be suitable for use in a portable camera for capturing digital videos and photographs. PO Resp. 30– 31. Although Exhibit 2060 describes that CMOS imagers experienced noise, that does not mean CMOS imagers provided such poor image quality that one with ordinary skill in the art in 1997 would have recognized that a CMOS imager does not deliver sufficient image quality to enable taking a picture in a portable camera. The cited portion of Exhibit 2060 states: First, CMOS designers must work out the kinks, including “noise,” the industry’s term for annoying little dots or scratches on photos. “These chips have to work in low light and deliver the same vivid colors your eye sees. They have to do that running off a watch battery, for a price that everybody can afford,” says Don Lake, general manager of Vision’s U.S. unit. “There are a lot of smart people in the world, but no one’s completely figured it out yet.” IPR2020-00475 Patent 9,186,052 B1 45 Ex. 2060, 3–4. The description is given not from the perspective of operability and workability but competitiveness in image quality and cost. None of the claims requires a minimum level of image quality no matter the level of ambient light, and none of the claims requires certain threshold for providing vivid colors just as the human eyes can see. The article also states that “CMOS sensors have a way to go before they can match the CCD’s sharp pictures.” Id. at 3. This simply indicates that a picture taken with a CMOS image sensor is not as sharp as one taken with a CCD image sensor, not that a CMOS image sensor is incapable of being used in a portable camera to take a picture at all. Notably, Patent Owner does not identify any testimony from its expert, Dr. Lebby, that an ordinarily skilled artisan in 1997 regarded CMOS image sensors as providing such poor image quality that it was not usable in a portable camera for taking a picture. Further, Petitioner’s identification of three cameras on the market in 1997 that used a CMOS image sensor refutes any contention that an ordinarily skilled artisan in 1997 would have regarded CMOS image sensors as providing such poor image quality that it was not usable in a portable camera for taking a picture. Additionally, Swift and Monroe each separately refute any such contention.16 Petitioner asserts that “the ’052 [patent] admits that it was known that CMOS active pixel sensor imagers result in lower noise than CCD or other solid state imagers.” Pet. 29 (citing Ex. 1001, 1:65–2:19). In response, Patent Owner cites evidence alleging the opposite—that CMOS imagers 16 Monroe was filed on March 17, 1997. Ex. 1007. Swift was published on December 21, 1995. Ex. 1005. IPR2020-00475 Patent 9,186,052 B1 46 have higher noise than CCD imagers. PO Resp. 15–16, 30 (citing Ex. 1060, 55; Ex. 2063, 1–2; Ex. 2060, 3–4). In its Sur-reply, Patent Owner asserts that the “lower noise” description in the ’052 patent is directed only to CMOS camera-on-a-chip designs known at the time of the invention, not all CMOS image sensors. Sur-reply 9. We do not find that the ’052 patent describes that CMOS image sensors of all types have lower noise than CCDs or other solid state imagers, as Petitioner asserts. Even if it does, Patent Owner is not precluded from submitting evidence to indicate that one with ordinary skill in the art would not recognize that to be so. To the extent Petitioner asserts that CMOS imagers at the time at issue provided lower noise and thus better image quality than CCDs, it has not provided sufficient evidence to establish that to be true. Thus, it cannot rely on that assertion as motivation or suggestion for one of ordinary skill in the art to use Ackland’s CMOS imager to implement Wakabayashi’s imager device 27. However, Petitioner need not rely on that assertion to establish a sufficient motivation or suggestion for one of ordinary skill in the art to use Ackland’s CMOS imager to implement Wakabayashi’s imager device 27. It already has articulated a sufficient motivation, as discussed above, based on Wakabayashi’s teaching for using a “solid-state imager,” CMOS imager being a solid state imager, and Ackland’s describing that its pixel array is for use in a “solid state camera.” IPR2020-00475 Patent 9,186,052 B1 47 In sum, and for the additional reasons expressed below, we find that an ordinarily skilled artisan would have been motivated to combine Ackland’s CMOS array teachings with Wakabayashi’s imager.17 b. Alleged Inoperability for Wakabayashi’s and Ackland’s Intended Purpose (i) Alleged Inoperability for Wakabayashi’s Intended Purpose Patent Owner argues that Petitioner’s proposed combination of Wakabayashi and Ackland “would render Wakabayashi inoperable for its intended purpose.” PO Resp. 27. Specifically, Patent Owner asserts: “Petitioner’s proposed modification to incorporate Ackland’s CMOS camera-on-a-chip sensor would fundamentally change Wakabayashi’s principle of operation as a CCD imaging device, thereby requiring substantial reconstruction and redesign.” Id. at 28. The assertion is premised on Patent Owner’s underlying contention that Wakabayashi’s disclosure is limited only to a CCD imaging device. Patent Owner states: As discussed above, a POSITA would understand that the portable digital camera disclosed in Wakabayashi to be a CCD sensor device. See supra § VI(A). For example, the fact that Wakabayashi includes an off-chip signal processing circuit separate from the imager pixel array tells a POSITA that Wakabayashi describes a CCD imaging sensor. 17 We make our findings and determinations, and perform our analysis regarding the asserted obviousness of the challenged claims, with full consideration of the objective evidence of nonobviousness discussed in Section III.B, above. IPR2020-00475 Patent 9,186,052 B1 48 Id. We disagree with this contention, and, as discussed above, we are persuaded by Petitioner that Wakabayashi describes the use of a solid-state imager and is not limited to CCD type imaging sensors. We have reviewed Patent Owner’s contentions in Section VI(A) of the Patent Owner Response, as alluded to in the above-quoted argument. In that section, Patent Owner asserts: [A]s explained in the accompanying declaration of Dr. Michael Lebby, a POSITA would understand Wakabayashi to be a CCD device, as Wakabayashi refers to a solid-state imager and describes a conventional CCD device design used in 1995 (when Wakabayashi was filed), for several reasons.” Lebby Decl., ¶¶ 100-103, 107, 108, 119. Therefore, Wakabayashi refers to a solid-state imager and describes a conventional CCD device design used in 1995 (when Wakabayashi was filed). PO Resp. 19. The argument is misplaced, as it is misdirected to a different subject, i.e., whether Wakabayashi’s disclosed circuit configuration reflects what is conventional for a CCD device. Even if the circuit design reflects what was conventional at the time for CCD devices, that does not preclude Wakabayashi from reasonably also suggesting the use of a CMOS imager in that configuration. The question is not a binary choice between CCD and CMOS. Wakabayashi reasonably could have (and did) suggest both. Indeed, that Wakabayashi reasonably would have suggested use of CCD imager in that disclosed configuration does not mean it reasonably would not have also suggested the use of a CMOS imager in that configuration. There is no inconsistency between Wakabayashi’s disclosed circuit design being conventional for CCD devices and Wakabayashi’s reasonably suggesting the use of a CMOS imager by referencing not a CCD device but a “solid-state imager.” IPR2020-00475 Patent 9,186,052 B1 49 Patent Owner additionally argues that “Petitioner’s proposed modification to incorporate Ackland’s CMOS sensor would nevertheless make Wakabayashi’s imaging apparatus unsuitable for its intended purpose as a portable digital camera for taking videos and photographs.” PO Resp. 32–34. Patent Owner asserts that “[a] POSITA would understand that known CMOS image sensors at the time the invention was made were not suitable for [capturing digital videos and photographs] purposes.” Id. at 32. Specifically, according to Patent Owner, CMOS image sensors at the time of the invention “produced images having high noise levels corresponding to poor image quality.” PO Resp. 32–33 (citing Exhibits 1041, 1060, 2060, 2063). But relatively poorer quality as compared to other technologies at the time does not mean or equate to inability to produce an image. Patent Owner does not assert that CMOS image sensors are incapable of producing an image, i.e., a picture or photograph. Exhibits 1060 and 2063 indicate that CMOS image sensors do produce images, just not as good, at the time, as CCD devices. Ex. 1060, 55; Ex. 2063, 1–2. Exhibit 2060 indicates that CMOS image sensors do produce images but include “annoying little dots or scratches on photos.” Ex. 2060, 3–4. Even the testimony of Patent Owner’s expert, Dr. Lebby, confirms that CMOS image sensors at the time of the invention were usable for taking pictures. Ex. 2088 ¶ 121 (“[A]doption of CMOS sensors in 1997 were limited to applications where the quality of the image was less important . . . .”). Patent Owner further asserts: The unsuitability of CMOS image sensors for digital cameras is confirmed by a review of all major digital cameras released in 1997, which showed all digital cameras having CCD sensors and not CMOS sensors. See Ex. 2052 (showing a IPR2020-00475 Patent 9,186,052 B1 50 timeline of digital cameras released in 1997). This review even identified a digital camera, Casio QV-700, which has a swiveling lens similar to that of Wakabayashi, that has a CCD sensor. PO Resp. 33. We do not agree with this argument. That all major digital cameras released in 1997 used CCD sensors and not CMOS sensors, even if true, does not mean CMOS sensors were incapable of being used for taking a picture or photograph. As noted above, Exhibits 1060, 2060, and 2063, as well as the testimony of Patent Owner’s expert Dr. Lebby, all indicate that CMOS sensors were capable of producing an image, i.e., a picture or photograph. For major commercial products, it may be that sensors producing higher quality images may be used. But that does not mean sensors outputting a lower quality image are incapable of producing a picture or photograph or that current commercialization is the standard for obviousness. In any event, Patent Owner does not point to any description in Wakabayashi that specifies a minimum level of image quality that must be obtained by Wakabayashi’s imaging apparatus. Even if it did, a prior art reference must be considered for everything it teaches by way of technology and is not limited to the particular invention it is describing and attempting to protect. EWP Corp. v. Reliance Universal Inc., 755 F.2d 898, 907 (Fed. Cir. 1985); In re Heck, 699 F.2d 1331, 1333 (Fed. Cir. 1983). Thus, suitability for the intended purpose of taking a picture or photograph does not require producing an image of very high quality. The claims of the ’052 patent also do not require any particular level of image quality. For the foregoing reasons, Petitioner’s stated rationale for using Ackland’s CMOS imager as Wakabayashi’s solid-state imager is not undermined by Patent Owner’s argument that Petitioner’s combination of IPR2020-00475 Patent 9,186,052 B1 51 Wakabayashi and Ackland “would render Wakabayashi inoperable for its intended purpose.” (ii) Alleged Inoperability for Ackland’s Intended Purpose Patent Owner asserts that Petitioner’s combination of Wakabayashi and Ackland “would render the CMOS sensor of Ackland inoperable for its intended purpose.” PO Resp. 34. Specifically, Patent Owner asserts: The CMOS technology disclosed by Ackland has the intended purpose of producing an image sensor with an integrated (“on- chip”) design. A POSITA would understand that the intended purpose of CMOS image sensors, such as that disclosed by Ackland, would be to integrate all of its circuitry and components on a single semiconductor chip or one plane. Ex. 2050, 24 (stating that “the most important advantage of the CMOS APS approach, however, is the ability to integrate much of the camera timing, control and signal processing circuitry onto the same silicon die”); Ex. 2066, 178 (“A CMOS imager integrates the sensor technology and digital control functions on a single chip.”); Ex. 2067, 38 (describing Figure 1 as “The Active-Pixel Image Sensor includes not only the photosensors but also the timing, control, and redundant readout circuits, integrated on one chip.”); Lebby Decl., ¶¶ 115–139, 145–147. Id. at 34 (emphasis original). For numerous reasons, we disagree. First, in Petitioner’s proposed combination discussed above, the entirety of what are shown in Ackland’s Figure 6, labeled as “ACTIVE PIXEL IMAGING SYSTEM” and enclosed in dashed lines, are adopted for use as Wakabayashi’s imager device 27, which is on one chip and substrate. Petitioner has not proposed to leave anything off or drop anything from what are shown in Ackland’s Figure 6. Second, Ackland does not describe or refer to “on chip” or “single chip” with respect to its circuits, certainly not the “processing circuitry” absent IPR2020-00475 Patent 9,186,052 B1 52 from Figure 6. Ackland also does not describe that the intended purpose for the CMOS imager is to have it integrated on the same chip as the processing circuitry. The evidence does not support Patent Owner’s contention that Ackland’s “processing circuitry” is required to be on the same chip as the circuits shown in Ackland’s Figure 6 for Ackland’s CMOS sensor to work. The evidence also does not support Patent Owner’s contention that the intended purpose of CMOS image sensors, such as those disclosed by Ackland, would be to integrate all of its circuitry and components on a single semiconductor chip or one plane. Exhibit 2050, a paper authored by two co-authors who are also named co-inventors of Ackland, indicates that an important advantage of CMOS sensors is “the ability to integrate much of the camera timing, control and signal processing circuitry onto the same silicon die,” but an ability is not a requirement. Ex. 2050, 3. Similarly, neither Exhibit 2066 nor 2067 indicates such a requirement. Further, Dr. Lebby, Patent Owner’s expert, does not testify that a CMOS sensor, in order to function, requires all such components to be integrated onto the same die or chip. Also, Petitioner’s assertion that a CMOS imager in which the processing circuitry is located off-chip and separate from the CMOS pixel array was well known, as exemplified by Swift and Monroe, stands unrebutted by Patent Owner, as discussed above. We are cognizant that Exhibit 2050 states: “Cost, size, and power constraints require integrating the image sensor along with analog and digital signal processing and interfacing elements onto the same die, as shown in Figure 2.” Ex. 2050, 22. The sentence must be read in context, IPR2020-00475 Patent 9,186,052 B1 53 i.e., relating to the performance level that may be desired in a particular situation. In other words, if there is a certain cost ceiling, and a maximum size and/or power consumption for an application, it may be necessary to integrate the CMOS sensor together with its processing circuitry all on a single chip or silicon die. It does not mean such a requirement applies to all CMOS sensors. Patent Owner has not identified anything in Ackland that expresses a cost ceiling, maximum size, or limit of power consumption for its disclosed image sensor. Claim 1 also includes no limitation on the cost, size, or power consumption of the image sensor. Further, as discussed above, Swift and Monroe are examples of CMOS sensors that operate with off-chip processing circuitry. In any event, Petitioner is not proposing to implement the invention of Ackland, but just to use the CMOS imager disclosed in Ackland. We note that a prior art reference must be considered for everything it teaches by way of technology and is not limited to the particular invention it is describing and attempting to protect. EWP Corp., 755 F.2d at 907. The use of patents as references is not limited to what the patentees describe as their own inventions or to the problems with which they are concerned, as they are a part of the literature and are relevant for all they contain. Heck, 699 F.2d at 1333. Whatever is the intended purpose of Ackland’s invention, it is of little relevance here. For the foregoing reasons, Petitioner’s stated rationale for using Ackland’s CMOS imager as Wakabayashi’s solid-state imager is not undermined by Patent Owner’s argument that Petitioner’s combination of Wakabayashi and Ackland “would render the CMOS sensor of Ackland inoperable for its intended purpose.” IPR2020-00475 Patent 9,186,052 B1 54 c. Reasonable Expectation of Success Petitioner argues that an ordinarily skilled artisan would have had a reasonable expectation of success in combining Wakabayashi’s and Ackland’s teachings. Pet. 31–32. Petitioner cites Dr. Neikirk’s testimony that it would have been routine and straightforward to make that combination and that the combination would predictably work and provide expected functionality. Id. (citing Ex. 1004 ¶¶ 74–77, 84–97). Patent Owner disagrees, arguing: Petitioner’s proposed combination of Wakabayashi and Ackland does not have a reasonable expectation of success because [an ordinarily skilled artisan] would understand that such a combination would retain the disadvantages of both Wakabayashi’s imaging apparatus and Ackland’s CMOS image sensor, while losing all of their respective benefits. “For the obviousness inquiry, “the Board must weigh the benefits and drawbacks of the modification against each other, to determine whether there would be a motivation to combine.” Arctic Cat Inc. v. Polaris Indus., Inc., 795 F.App’x 827, 833 (Fed. Cir. 2019). Here, there are several significant drawbacks [which] would strongly dissuade rather than motivate a[n ordinarily skilled artisan] from considering the alleged combination. PO Resp. 43 (emphasis added). Patent Owner explains: “[An ordinarily skilled artisan] would understand that such a modification [the proposed combination] would instead have low image quality that was available with CMOS pixel arrays at the time, as well as not obtaining the benefit of on- chip integration of timing, control, and image processing that was the recognized advantage of using a CMOS pixel array.” Id. at 44. Patent Owner further asserts: “No [ordinarily skilled artisan] would be motivated to make such a modification of Wakabayashi to result in a device that was no IPR2020-00475 Patent 9,186,052 B1 55 more efficient, smaller or less expensive and produced an inferior image output.” Id. We agree with Petitioner on these issues. None of the contentions noted above indicates a CMOS imager with separately located processing circuitry would not work to take a picture or photograph. They actually confirm that a CMOS imager with separately located processing circuitry can, indeed, take a picture or photograph. Patent Owner cites no authority, and we know of none, that equates a lack of reasonable expectation of success to merely having certain disadvantages relative to other configurations. Further, Patent Owner does not discuss disadvantages of a CCD imager as compared to CMOS imager with separately located processing circuitry. For instance, Dr. Lebby, Patent Owner’s expert, testifies that for a CCD pixel array, the entire CCD array must be driven to achieve the output of a single pixel. Ex. 2088 ¶ 72. Dr. Lebby further testifies to advantages of CMOS imagers not tied to complete integration of all associated components, i.e., lower power requirements, increased resistance to radio frequency interference (RFI) and electromagnetic interference (EMI), and flexible readout of the signal charge without destroying the accumulated charge. Ex. 2088 ¶¶ 77, 83. Thus, a CMOS imager at the time was even better than a CCD imager in some ways even with separately located processing circuitry, and was indisputably operable to take an image. Further, the law does not require a proposed combination of prior art teachings to lead to the preferred or the most desirable implementation to support a sufficient motivation to combine. In re Fulton, 391 F.3d 1195, 1200–01 (Fed. Cir. 2004). That better alternatives exist in the prior IPR2020-00475 Patent 9,186,052 B1 56 art does not mean the proposed and allegedly inferior combination would not have been obvious. In re Mouttet, 686 F.3d 1322, 1334 (Fed. Cir. 2012). Additionally, Patent Owner’s reference to a modification of Wakabayashi to make the combination proposed by Petitioner also is misplaced. PO Resp. 29–30. There is no modification of Wakabayashi in Petitioner’s proposal for using Ackland’s CMOS imager as Wakabayashi’s imager device. That is because Wakabayashi explicitly describes the use of a “solid-state imager.” Ex. 1006, 9:10–14. As discussed above, a CMOS imager is a solid-state imager. Thus, using a CMOS imager is according to the design of Wakabayashi and whatever is needed to implement a CMOS imager is not a “modification” of Wakabayashi but a specific implementation. Whatever is the cost factor, the image quality factor, and the integration of parts factor associated with CMOS imagers are already included in the contemplation of Wakabayashi that solid-state imagers are used. This is not a situation in which only a CCD imager is disclosed and Petitioner is proposing to use, instead, a CMOS imager. Similarly, we disagree with Patent Owner’s assertion that Petitioner’s proposed combination of Wakabayashi and Ackland would require substantial reconstruction and redesign of Wakabayashi. PO Resp. 28–31; Sur-reply 16–18. There is nothing to reconstruct or redesign. Wakabayashi explicitly describes the use of a “solid-state imager.” Ex. 1006, 9:10–14. Using a CMOS imager is directly according to the design of Wakabayashi and whatever is needed to implement a IPR2020-00475 Patent 9,186,052 B1 57 CMOS imager is not a “reconstruction” or “redesign” of Wakabayashi but a specific implementation of what Wakabayashi expressly teaches. Patent Owner asserts that Petitioner’s expert, Dr. Neikirk, acknowledged during deposition that a redesign of circuitry is required for a proposed modification that plugged into a CMOS chip. PO Resp. 31 (citing Ex. 2076, 85:15–86:5, Ex. 2075, 209:16–20). We have read the cited portions of the deposition and do not see acknowledgement that a “redesign” of Wakabayashi’s disclosed system is required. We see no testimony from Dr. Neikirk that Wakabayashi’s design is specifically for a CCD imager and that an implementation of a CMOS imager in Wakabayashi requires “redesign” of Wakabayashi. Instead, we find Dr. Neikirk to be indicating that realizing any specific implementation requires design. See Ex. 2075, 209:13–20 (“One of ordinary skill in the art is going to have to use their knowledge to implement all of that circuitry. . . . It requires -- design regardless.”). We find that an ordinarily skilled artisan would have had a reasonable expectation of success in combining Wakabayashi’s and Ackland’s teachings. Ex. 1004 ¶¶ 74–77, 84–97. d. Alleged Hindsight Patent Owner additionally argues that Petitioner’s challenge improperly looks at the prior art with the benefit of hindsight, by attempting to use the ’052 patent as an instruction manual or template to piece together the teachings of the prior art such that the claimed invention is rendered obvious. PO Resp. 45. Citing the cross- examination of Dr. Neikirk, Petitioner’s expert, Patent Owner asserts that Dr. Neikirk “repeatedly testified that he used the disclosure of the ’052 IPR2020-00475 Patent 9,186,052 B1 58 Patent as the basis for interpreting the Wakabayashi and Ackland references for his obviousness analysis.” Id. (citing Ex. 2076, 64:18– 65:5, 97:1–98:19). Patent Owner also points out that Petitioner’s arguments refer to the teachings of the ’565 patent and its purported objectives. Id. at 46 (citing Pet. 27, 29). We do not find that Petitioner’s challenge relies on impermissible hindsight. The law does not prohibit, in an obviousness analysis, all references to the disclosure of the challenged patent. It depends on the particular use of that disclosure. For instance, claim interpretation is necessarily based on the disclosure of the challenged patent. The same is true with respect to what is acknowledged in the Specification as previously known. What Patent Owner has directed us to does not indicate that Petitioner has exceeded the permissible scope of referencing the Specification of the challenged patent. Any judgment on obviousness is necessarily a reconstruction based upon hindsight reasoning, but so long as it takes into account only knowledge that was within the level of ordinary skill at the time the claimed invention was made and does not include knowledge gleaned only from the challenged patent’s disclosure, such a reconstruction is proper. In re McLaughlin, 443 F.2d, 1392, 1313-14 (CCPA 1971). That is the case here. Petitioner relies on Wakabayashi’s disclosure of using a “solid-state imager,” and Ackland’s disclosure that its CMOS pixel array is for use as a “solid-state camera.” Pet. 27 (citing Ex. 1027, 9:11–15, Ex. 1006, 7:59–65). That is all the motivation needed for one of ordinary skill in the art to use Ackland’s CMOS pixel array and associated timing and readout circuitry as Wakabayashi’s imager device 27 as discussed above. IPR2020-00475 Patent 9,186,052 B1 59 iii. Summary In sum, we find that an ordinarily skilled artisan would have been motivated to combine Wakabayashi and Ackland’s teachings and would have had a reasonable expectation of success in so doing. We further find that the combination of Wakabayashi and Ackland teaches limitation 1.b.ii. Ex. 1004 ¶¶ 103–110. d. [1.c] wherein a plurality of CMOS pixels within said array of CMOS pixels each include an amplifier Petitioner argues that Ackland teaches limitation 1.c. Pet. 40–42. Petitioner cites Ackland’s disclosure that “active pixel 35 further includes . . . an amplifier formed by a voltage follower-transistor 125 . . . Typically, the active pixel 35 will be one of a plurality of such active pixels forming an array.” Id. at 40; Ex. 1006, 3:22–29. Petitioner further provides the following annotated version of Figure 3 of Ackland (at Pet. 41), illustrating Petitioner’s mapping of an amplifier in a CMOS pixel in that figure: Figure 3 above is a schematic of an active pixel. Ex. 1006, 2:66–67. IPR2020-00475 Patent 9,186,052 B1 60 Petitioner argues that an ordinarily skilled artisan “would have been motivated to apply Ackland’s known teachings of an array of CMOS active pixels each including an amplifier in implementing Wakabayashi’s ‘imager apparatus’ to advantageously amplify the ‘video signal,’ e.g., in order to ‘overcome the relatively large load offered by the common output conductor 65.’” Pet. 31 (quoting Ex. 1006, 5:7–10; citing Ex. 1004 ¶ 96); see also id. at 40. Petitioner further argues that an ordinarily skilled artisan would have had a reasonable expectation of success in making this combination. Id. at 31–32. Patent Owner does not dispute that Ackland teaches limitation 1.c. PO Resp. 25–51. Patent Owner, however, disputes that an ordinarily skilled artisan would have combined Wakabayashi’s imager device with Ackland’s CMOS array. Id. at 25–47. We find that Ackland teaches limitation 1.c. Ex. 1004 ¶¶ 111–113; Ex. 1006, 3:22–29. Further, as set forth in Section III.D.6.c, we find that an ordinarily skilled artisan would have combined Wakabayashi’s imager device with Ackland’s CMOS array and would have had a reasonable expectation of success in so doing. See also Ex. 1004 ¶ 96; Ex. 1006, 5:7– 10. e. [1.d] said first circuit board further including timing and control circuitry thereon, said timing and control circuitry being coupled to said array of CMOS pixels Petitioner argues Wakabayashi and Ackland combined teach limitation 1.d. Pet. 42–43 (citing Ex. 1004 ¶¶ 114–118). Petitioner argues Wakabayashi teaches the recited first circuit board. Pet. 46; see also annotated Figs. 3 and 7 (reproduced above). Petitioner argues Ackland teaches the recited timing and control circuitry and an active pixel imaging IPR2020-00475 Patent 9,186,052 B1 61 system with timing controller 20. Pet. 42. Petitioner further argues that timing controller 20 provides timing signals that control Ackland’s imaging system so it will achieve a desired frame rate. Id. (citing Ex. 1004, 8:24– 35). Further, Petitioner argues that timing controller 20 is coupled to Ackland’s “CMOS . . . pixel array” through row decoder 10 in the exemplary active pixel image sensor shown in Ackland Fig. 6. Id. Petitioner further argues that Ackland describes using the timing controller 20 to achieve a desired frame rate and thus an ordinarily skilled artisan would have been motivated to include timing controller 20 with Ackland’s CMOS array when modifying Wakabayashi. Id. at 28, 30. Petitioner also argues that an ordinarily skilled artisan would have had a reasonable expectation of success in combining Wakabayashi’s and Ackland’s teachings. Id. at 31–32. Patent Owner does not dispute that timing controller 20 is timing and control circuitry coupled to an array of CMOS pixels. PO Resp. 25–47. Patent Owner also does not dispute that, if an ordinarily skilled artisan combined Wakabayashi’s imager apparatus with Ackland’s CMOS array, the ordinarily skilled artisan would have been motivated to include Ackland’s timing controller 20 with the CMOS array. Id. As discussed in Section III.D.6.c, however, Patent Owner disputes that an ordinarily skilled artisan would have combined Wakabayashi’s imager apparatus with Ackland’s CMOS array. As discussed in Section III.D.6.c, we find that an ordinarily skilled artisan would have made that combination. As further discussed in Section III.D.6.c, we find that Wakabayashi’s circuit board 29 is the recited first circuit board. Further, we find that Ackland’s timing controller 20 is the recited timing and control circuitry. IPR2020-00475 Patent 9,186,052 B1 62 Ackland discloses that timing controller 20 provides timing signals that activate pixels and this timing is controlled to achieve a desired frame rate: [T]iming controller 20 provides timing signals to the row decoder 10. In response, the decoder 10 sequentially activates each row 25 of active pixels 35 via the control lines 55 to detect light intensity and to generate corresponding output voltage signals during each frame interval . . . . The timing of the imaging system is controlled to achieve a desired frame rate. Ex. 1006, 8:24–35. Ackland further describes “timing control signals from the timing control 20.” Id. at 8:42–52. Figure 6 of Ackland further shows timing controller 20 coupled to array 5 of CMOS pixels. Id. at Fig. 6; see also Ex. 1006, 3:39–54, 4:45–49; Ex. 1003 ¶¶ 114–119. We further find that an ordinarily skilled artisan would have been motivated to combine timing controller 20 with Wakabayashi’s circuit board 29 and array 5 of CMOS pixels to achieve desired frame rates. Ex. 1006, 8:24–35; Ex. 1004 ¶¶ 87, 116, 119. Further, we find that an ordinarily skilled artisan would have had a reasonable expectation of success in combining Wakabayashi’s and Ackland’s teachings. Id. ¶ 119. Thus, we find that Wakabayashi and Ackland combined teach limitation 1.d. Id. ¶¶ 114–119. f. [1.e] said image sensor producing a pre-video signal Petitioner argues that Ackland teaches limitation 1.e. Pet. 44 (citing Ex. 1004 ¶¶ 120–122). Petitioner asserts that the output signal of Ackland’s active pixel imaging system is a pre-video signal. Id. Petitioner provides an annotated version of Figure 6 of Ackland, reproduced below: IPR2020-00475 Patent 9,186,052 B1 63 Pet. 44. This annotated figure shows Ackland’s CMOS imager device, color annotated by Petitioner to indicate production of a pre-video signal that is to be provided to downstream processing circuitry. Id. Patent Owner does not dispute that the output signal of Ackland’s active pixel imaging system is a pre-video signal. PO Resp. 25–51. We find that the output signal of Ackland’s active pixel imaging system is a pre-video signal and thus Ackland teaches limitation 1.f. The ’052 patent refers to the image signal transmitted from the image sensor to video processing circuitry as a pre-video signal. Ex. 1001, 9:26–35. As shown in the annotated version of Figure 6 above, the output signal of Ackland’s active pixel imaging system is provided to processing circuity. In describing this output signal, Ackland states: “Output signals from the amplifiers 18 are provided to the common output line 19 in serial fashion . . . .” Id. (quoting Ex. 1006, 8:44–51). Ackland continues that “[t]he output signals are routed to suitable processing circuitry.” Id. (quoting Ex. 1006, 8:44–51). As a result, these output signals are pre-video signals. Id. Thus, Ackland teaches limitation 1.e. Ex. 1004 ¶¶ 120–122. IPR2020-00475 Patent 9,186,052 B1 64 g. [1.f] a second circuit board mounted in said housing, said second circuit board being electrically coupled to said first circuit board, said second circuit board having a length and a width thereto, wherein said length and width of said second circuit board define a second plane, said second circuit board including circuitry thereon to convert said pre-video signal to a post-video signal, said second circuit board being offset from said first circuit board, said second plane of said second circuit board being substantially parallel to said first plane of said first circuit board Petitioner argues that Wakabayashi suggests limitation 1.f. Pet. 45– 49. According to Petitioner, Wakabayashi discloses every element in limitation 1.f, except for the requirement that the second circuit board includes circuitry to convert the pre-video signal to a post-video signal. Id. at 49. Patent Owner does not argue otherwise. We are persuaded that Wakabayashi discloses all elements in the above-quoted recitation, except for the requirement that the second circuit board includes the circuitry to convert the pre-video signal to a post-video signal. For instance, Wakabayashi’s first circuit board 27 is both offset from and substantially parallel to Wakabayashi’s second circuit board 29. Ex. 1027, Figs. 3, 7. Further, first circuit board 29 is electrically connected to second circuit board 39 by flexible board 51, which includes coil-shaped margin 56. Id. at 6:48–52. With regard to circuitry that converts the pre-video signal from the first circuit board to a post-video signal, Petitioner asserts that camera head 100 and camera circuit 102 together constitute the video camera unit of Wakabayashi’s imager apparatus. Pet. 22 (citing Ex. 1027, 9:18–21). Petitioner further notes that Wakabayashi describes camera circuit 102 as IPR2020-00475 Patent 9,186,052 B1 65 converting an opto-electrically converted signal into a “video circuit 103 in a television signal format” and outputs the signal to the “video monitor unit.” Id. at 23. According to Petitioner, Wakabayashi discloses that the video camera includes a camera signal processing circuit, but “it would have been an obvious implementation choice to instead locate this circuitry to convert the pre-video signal to a post-video signal on circuit board 39 and couple it to the power supply unit,” for several reasons. Id. (citing Ex. 1004 ¶¶ 73– 77). First, Petitioner notes that Wakabayashi has an expressed objective of making the video camera unit small, such that it is composed of minimally necessary parts and is compact to realize a reduction in weight of the rotating mechanism. Pet. 23–24 (citing Ex. 1027, code (57), 2:37–39, 3:40– 44, 14:6–10; Ex. 1004 ¶ 74). Dr. Neikirk testifies that placement of the signal converting circuitry on circuit board 39 furthers that objective. Ex. 1004 ¶ 74. Petitioner explains that circuit board 39 is the larger of the two circuit boards and it provides more space than the camera head mounted on circuit board 29. Pet. 23 (citing Ex. 1027, 6:5–10, 9:15–19, Figs. 3, 5; Ex. 1004 ¶ 73). Petitioner further explains that “by mounting the signal converting circuitry on circuit board 39 instead of circuit board 29, the size of circuit board 29 is advantageously reduced and the video camera unit that rotates is made smaller.” Id. (citing Ex. 1027, Abstr., 2:37–39, 3:40–44, 14:6–10, Fig. 3, 5; Ex. 1004 ¶ 73). Second, Petitioner explains that the number of circuit boards and configuration of circuity across the circuit boards “was a well-known engineering consideration guided by the intended housing’s dimensions.” IPR2020-00475 Patent 9,186,052 B1 66 Pet. 24 (citing Ex. 1005, 10:12–16; Ex. 1030, 43:38–44; Ex. 1031, 13:30– 35; Ex. 1032, 15:35–46; Ex. 1004 ¶ 74). Third, Petitioner further explains that, with respect to circuitry to convert pre-video signals to post-video signals, “it was a well-known engineering consideration to move the circuitry from a circuit board directly attached to the image sensor chip to one that is remote to the image sensor chip.” Pet. 24 (citing Ex. 1004 ¶¶ 75, 76; Ex. 1005, 8:33–9:21, 10:12–16, 18:25–33, Fig. 2; Ex. 1006, 8:48–53, Fig. 6; Ex. 1007, 3:36–62, 8:8–11, Fig. 3). Dr. Neikirk testifies that one with ordinary skill in the art would have had a reasonable expectation of success for locating the converting circuitry on a separate circuit board. Ex. 1004 ¶ 76. Petitioner’s assertions are rational and supported by the cited evidence. Notwithstanding Patent Owner’s contrary arguments, discussed below, we are persuaded that an ordinarily skilled artisan would have been motivated to locate Wakabayashi’s camera circuit 102, which converts a pre- video signal to a post-video signal, on Wakabayashi’s second circuit board 39. Ex. 1004 ¶¶ 73–76. Patent Owner argues: Ackland’s CMOS image sensor, which Petitioner relies on for the timing and control circuitry limitation, teaches an on-chip design architecture including the pixel array, timing control and signal processing on-chip that contradicts, or teaches away from, Petitioner’s proposed modification of Wakabayashi to have the second circuit board include the signal processing circuitry to convert the pre-video signal to post-video signal. For example, even if a POSITA would be motivate[d] by “the size of circuit board 29 [being] advantageously reduced and the video camera unit that rotates [being] made smaller,” as alleged by Petitioner, a POSITA would implement an on-chip CMOS design described by Ackland, which would place all of the IPR2020-00475 Patent 9,186,052 B1 67 timing and control circuitry and signal processing circuitry to convert pre-video signal to a post-video signal on a single chip or plane, rather than place them on separate circuit boards as Petitioner proposes. Petition, 23-24. Lebby Decl., ¶¶ 137–138. PO Resp. 48–49. We disagree for several reasons. As discussed in Section III.D.6.c.ii above, Ackland does not describe that its processing circuitry is implemented on the same chip as the CMOS pixel array. As discussed in that section, we do not agree with Patent Owner’s contention that Ackland would have been understood by one with ordinary skill in the art as specifically describing an on-chip design in which timing and control circuitry, signal processing circuitry, and CMOS pixel array are all located on the same chip. Further, even if Ackland had described that its CMOS pixel array and the processing circuitry that converts a pre-video to post-video circuit are located on the same chip, a prior art reference must be considered for everything it teaches by way of technology and is not limited to the particular invention it is describing and attempting to protect. EWP Corp., 755 F.2d at 907; In re Heck, 699 F.2d at 1333. Petitioner is not proposing to make the invention of Ackland, but to take Ackland’s CMOS pixel array and associated timing and readout circuitry, as shown in Ackland’s Figure 6, and use them as Wakabayashi’s imager device 27. The evidence of record does not support a finding that Ackland’s CMOS pixel array can only be useful in an imager device if it is located on the same chip as the processing circuitry which converts a pre-video signal from the pixel array to a post-video signal. There is no such “teaching away” or “contrary” disclosure in Ackland. In contrast, Petitioner has presented reasoning with rational underpinning why one IPR2020-00475 Patent 9,186,052 B1 68 with ordinary skill in the art would have wanted to place the processing circuitry of Wakabayashi on circuit board 39 and would have had a reasonable expectation of success in so doing. Patent Owner also argues: Petitioner’s asserted rationale of making the video camera unit small that is “composed of minimally necessary parts” contradicts Petitioner’s proposal that places Ackland’s alleged timing and control circuitry on the circuit board 29 because Petitioner’s argument increases the number of components that then would be required by actually implementing Ackland’s on- chip integration for the CMOS imager. Petition, 23-24 (citing Wakabayashi, Abstract, 2:37–39, 3:40–44, 14:6–10). Following Petitioner’s rationale further, a POSITA would also have moved the timing and control circuitry to the other circuit board 39, to make the video camera unit smaller, which would result in the timing and control circuitry and the circuitry to convert pre-video signal to a post-video signal on the same circuit board 39, rather than on separate circuit boards as required by the Challenged Claims. Lebby Decl., ¶ 138. PO Resp. 49. The argument is misplaced. That Petitioner’s argument, if applied to the timing and control circuitry, would lead to a conclusion that it also would have been obvious to one with ordinary skill in the art to locate the timing and control circuitry on circuit board 39, does not undermine anything Petitioner has proposed. Petitioner did not rely on this rationale to locate Ackland’s timing controller 20 on Wakabayashi’s circuit board 29. Obviousness does not necessarily lead to only a single result, e.g., where to place the timing and control circuitry. There is no conflict between the timing and control circuitry being placeable on circuit board 29 under one rationale, and the video processing circuitry on circuit board 39 under another rationale. Both positioning well could have been obvious to one of IPR2020-00475 Patent 9,186,052 B1 69 ordinary skill in the art. In this case, we find that placing the video processing circuitry on circuit board 39 was obvious. Patent Owner further asserts that for Petitioner erroneously cites to Ackland for its argument that “it was a well-known engineering consideration to move the [processing] circuitry from a circuit board directly attached to the image sensor chip to one that is remote to the image sensor chip.” PO Resp. 50 (citing Pet. 24). Patent Owner asserts that Ackland provides no teaching that its processing circuitry is remote to the image sensor chip. Id. at 49. We agree with Patent Owner, in part, in that we find Ackland does not describe the referenced processing circuitry to be located on a circuit board separate from the circuit board containing Ackland’s pixel array as Petitioner contends. However, this mischaracterization of Ackland is harmless, because Dr. Neikirk, Petitioner’s expert, as well as Petitioner, provides other examples of such remotely located processing circuitry, e.g., Swift and Monroe (Exs. 1005, 1006). Pet. 27, 28; Ex. 1004 ¶ 76. These other examples are not controverted, on this record, by Patent Owner or Patent Owner’s expert, Dr. Lebby. We find that Wakabayashi suggests limitation 1.f. Ex. 1004 ¶¶ 123– 128. h. [1.g] a lens mounted in said housing, said lens being integral with said imaging device, said lens focusing images on said array of CMOS pixels of said image sensor Petitioner argues that Wakabayashi and Ackland combined teach limitation 1.g. Pet. 50–51 (citing Ex. 1027, 2:51–54, 5:56–65, 6:11–19, Fig. 3; Ex. 1004 ¶¶ 129–133). Specifically, Petitioner maps the recited lens to Wakabayashi’s lens 25, which is in lens case 24 secured to mounting plate IPR2020-00475 Patent 9,186,052 B1 70 28 fixed to camera case 16. Id. at 50. Petitioner explains that lens 25 focuses images on imager device 27. Id. Petitioner provides an annotated version of Figure 3 of Wakabayashi reproduced below: Id. at 51. The annotated figure above shows a cross-sectional view of Wakabayashi’s imager apparatus and includes Petitioner’s annotation identifying a “lens being integral with said imaging device.” Ex. 1027, 3:49–56; Pet. 51. Further, Petitioner argues that Ackland teaches an array of CMOS pixels. Pet. 51. Patent Owner does not present any argument regarding this limitation, separate from its argument already discussed above regarding Wakabayashi and CMOS pixels, which we disagree with. We find that the cited evidence supports Petitioner’s arguments, and Wakabayashi and Ackland combined teach limitation 1.g. Ex. 1004 ¶¶ 129–133. i. [1.h] a video screen, said video screen being electrically coupled to said second circuit board, said video screen IPR2020-00475 Patent 9,186,052 B1 71 receiving said post-video signal and displaying images from said post-video signal Petitioner argues that Wakabayashi teaches limitation 1.h. Pet. 52–53 (citing Ex. 1027, Abstr., 1:6–15, 2:40–45, 4:44–46, 5:7–12, 9:14–38, 10:1– 7, 10:15–17, Figs. 1–3, 10, 11; Ex. 1004 ¶¶ 134–138). Specifically, Petitioner identifies Wakabayashi’s liquid crystal display 6 as having liquid crystal panel 38 coupled to circuit board 39. Id. at 52. Petitioner further asserts that Wakabayashi describes that the imager allows a user to monitor an image on a display to adjust the angle of the video camera while imaging a subject. Id. at 1:6–15. Further, Petitioner argues that liquid crystal display 6 is accommodated within housing 3. Id. at 4:44–46. In addition, Dr. Neikirk testifies that Wakabayashi’s circuit board 39 includes a driver circuit for liquid crystal panel 38 and that Wakabayashi’s liquid crystal display 6 displays images from video signal 111 outputted from circuit board 39 and allows a user to monitor an image. Ex. 1004 ¶ 133. Patent Owner provides no counterargument for this limitation. Petitioner’s assertions are consistent with and supported by the cited evidence. We find Wakabayashi teaches limitation 1.h. Ex. 1004 ¶¶ 134– 138. j. [1.i] a power supply mounted in said housing, said power supply being electrically coupled to said first circuit board to provide power to said array of CMOS pixels and said timing and control circuitry, said power supply also being electrically coupled to said second circuit board to provide power thereto Petitioner argues that Wakabayashi and Ackland combined teach limitation 1.i. Pet. 53–54 (citing Ex. 1027, 4:44–49, 6:7–10, 6:21–27, Fig. 5; Ex. 1004 ¶¶ 137–140). Specifically, Petitioner argues that IPR2020-00475 Patent 9,186,052 B1 72 Wakabayashi discloses that its portable imager apparatus is powered by battery 45 disposed within housing 3. Id. at 58 (citing Ex. 1027, 6:21–27). Petitioner further argues that one with ordinary skill in the art would have understood that, because battery 45 is the only disclosed source of power, it would provide power to both circuit board 29 and circuit board 39. Id.; see also Ex. 1004 ¶ 139. Further, Petitioner asserts that Ackland teaches an array of CMOS sensors. Pet. 54. Patent Owner provides no counterargument with respect to limitation 1.i. Petitioner’s assertions are consistent with and supported by the cited evidence. We find that Wakabayashi and Ackland combined teach limitation 1.i. Ex. 1004 ¶¶ 139–142. k. [1.j] wherein said image sensor has a generally square shape along said first plane; Petitioner argues that Wakabayashi teaches limitation 1.j. Pet 54–55. Petitioner argues that, collectively, imager device 27 and circuit board 29 in Wakabayashi are generally square shaped along a first plane as shown in Figure 7 of Wakabayashi. Id. at 54. Petitioner provides the following annotated version of Figure 7 of Wakabayashi: IPR2020-00475 Patent 9,186,052 B1 73 Id. at 55. The annotated figure above shows the structure of a video camera with Petitioner’s annotations indicating that imager device 27 and camera circuit board 29 are the recited imager sensor with a generally square shape along a first plane. Id.; Ex. 1027, 3:64–65. Patent Owner provides no counterargument for this limitation. Petitioner’s assertions are consistent with and supported by the cited evidence. As shown in Figure 7 of Wakabayashi, imager device 27 and circuit board 29 (collectively, the image sensor) are generally square along a first plane. We find that Wakabayashi teaches limitation 1.j. Ex. 1004 ¶¶ 143–145. l. [1.k] wherein a largest dimension of said image sensor along said first plane is between 2 and 12 millimeters. For this limitation, we address the parties’ arguments and then the experts’ testimony. Then, we provide our analysis. IPR2020-00475 Patent 9,186,052 B1 74 i. Parties’ Arguments Petitioner argues that Wakabayashi and Suzuki combined teach limitation 1.k. Pet. 55–58. Petitioner acknowledges that Wakabayashi does not expressly disclose the dimensions of circuit board 29. Id. at 55. For this ground, however, Petitioner argues that an ordinarily skilled artisan would have been motivated to combine Suzuki’s teachings of a sensor with requisite dimensions with Wakabayashi’s image sensor as modified by Ackland. Id. at 57. Petitioner also argues that an ordinarily skilled artisan would have found the combination to be straightforward and routine and would have known that it would predictably work. Id. at 58. Petitioner further argues that Suzuki discloses an image sensor, the largest dimension of which is between 2 and 12 millimeters. Id. at 56. Petitioner asserts that Suzuki teaches an image pickup chip 221 bonded to chip connecting board 226, circuit board 227, and connector board 228. Id. Petitioner further asserts that these elements are all aligned with each other and inserted into chassis 24. Id. Further, Petitioner argues that Suzuki teaches that, with this configuration, an image pickup chip of 8.5 mm can be used when the outer diameter of the chassis is about 10 mm. Id. Thus, Petitioner contends that, with the 8.5 mm chip and about 10 mm chassis, the greatest dimension of the image sensor’s chip-connecting board 226 is between 8.5 and about 10 millimeters. Id. at 58 (citing Ex. 1004 ¶¶ 149– 153). Petitioner argues that an ordinarily skilled artisan would have been motivated to combine Suzuki’s teachings with Wakabayashi’s imager apparatus because Suzuki discloses that its arrangement of an image sensor and circuit board allows for a camera head to have an outer diameter closer IPR2020-00475 Patent 9,186,052 B1 75 to the diagonal length of the solid-state image, which furthers Wakabayashi’s objective of making its camera unit compact and stable and reliable. Pet. 57. Patent Owner does not dispute that the largest dimension of Suzuki’s image sensor is between 2 and 12 millimeters. PO Resp. 50–51. Citing Dr. Lebby’s testimony, however, Patent Owner argues that Suzuki’s image sensor size is not suitable for a CMOS image sensor. Id. Patent Owner also relies on its argument previously addressed that an ordinarily skilled artisan would not combine CMOS and CCD technologies to reach the claimed invention. Id. Petitioner responds that Suzuki describes a solid-state image pickup device and does not limit that device to a CCD. Reply 21. Petitioner cites Dr. Neikirk’s testimony that Suzuki does not limit its image sensor teachings to CCDs. Id. Patent Owner responds that the generic disclosure of a solid- state image pickup device in Suzuki is insufficient to include a CMOS image sensor, as is true for Wakabayashi. Sur-reply 21–22. ii. Expert Testimony Dr. Neikirk testifies that the largest dimension of Suzuki’s image sensor is between 2 and 12 millimeters because Suzuki discloses the use of 1/3 inch solid-state imager and an outer diameter of a camera head of about 10 mm. Ex. 1004 ¶ 153. Dr. Neikirk further testifies that the term solid state imager includes CMOS imagers. Id. ¶ 42. Further, Dr. Neikirk testifies that an ordinarily skilled artisan would have been motivated to apply Suzuki’s teachings of an image sensor between 8.5 and 10 mm in implementing Wakabayashi’s image apparatus as modified by Ackland. Id. ¶ 159. Dr. Neikirk also testifies that an ordinarily skilled artisan would have IPR2020-00475 Patent 9,186,052 B1 76 found the combination to be straightforward and routine and would have known that it would predictably work. Id. Dr. Lebby testifies that, based on the structure described in Suzuki, an ordinarily skilled artisan would understand that Suzuki’s image sensor is a conventional CCD sensor. Ex. 2088 ¶¶ 19, 106. Dr. Lebby further testifies that Suzuki’s reference to driving a solid-state imaging pickup chip 221 and a circuit for amplifying the video signal separate from the image pickup chip indicate that Suzuki’s solid-state image pickup chip is a CCD. Id. ¶ 19. Dr. Lebby also testifies that an 8.5 mm CCD sensor provided sufficient performance and image quality for a camera, but a corresponding CMOS image sensor would not be satisfactory because CMOS pixels were much larger. Id. Further, Dr. Lebby testifies that Hitachi sold a 390,000 pixel CCD image sensor in 1997, not a CMOS sensor. Id. Dr. Lebby further testifies that Suzuki’s pickup chip is 1/3 inch optical format chip. Ex. 2088 ¶ 147. Dr. Lebby further testifies that at the time of the invention typical resolutions for image sensors were 640 x 480 (300,000 pixels). Id. According to Dr. Lebby, that pixel resolution for a 1/3 inch chip yields a pixel size of approximately 7.4 µm, but at that timeframe, pixel sizes for CMOS APS image sensors was about 20 µm. Id. Dr. Lebby testifies that, with “a pixel size of 20 µm, the resolution of a 1.3” optical format sensor would be 4000 pixels (72 x 55), which is not effective or robust. Id. In his Reply Declaration, Dr. Neikirk disagrees with much of Dr. Lebby’s testimony. Ex. 1086 ¶ 44. Dr. Neikirk testifies that CMOS image sensors were disclosed prior to the filing of Suzuki, testifying that Renshaw (Ex. 1090) and Shizukuishi (Ex. 1089) both disclose CMOS image sensors. IPR2020-00475 Patent 9,186,052 B1 77 Id. Dr. Neikirk also testifies that Suzuki’s reference to off-chip driving and amplification circuits does not limit Suzuki to a CCD. Id. ¶ 45. Dr. Neikirk further testifies that driving circuitry can refer to an external driving circuit for power which a CMOS imager would use. Id. Further, Dr. Neikirk testifies that using CMOS imagers with off-chip circuitry was well known, testifying that Swift (Ex. 1005), Monroe (Ex. 1007), and Ackland (Ex. 1006) all disclose CMOS imagers with off-chip circuitry. Id. ¶¶ 13, 45. Dr. Neikirk further testifies that CMOS pixels of the size of 6 to 15 µm were available in 1997. Ex. 1086 ¶ 46. Dr. Neikirk testifies that a Laser Focus World article, which was published in June 1993, discloses CMOS pixels as small as 7.3 x 7.6 µm. Id. Dr. Neikirk also testifies that neither claim 1 nor Wakabayashi specify a requisite level of resolution, noise, or image quality. Id. Further, he testifies that handheld digital cameras with CMOS image sensors were available in 1997 and were described as delivering ultrahigh quality digital images. Id. (citing Ex. 1087 (Byte Magazine Review), 34). iii. Analysis We find that Suzuki discloses an image sensor with a largest dimension between 2 and 12 millimeters. For instance, Suzuki teaches the use of an image pickup chip with an 8.5 mm dimension. Ex. 1015, 4:6–11 (“solid-state image pickup chip of 1/3 inch (8.5 mm)”). Suzuki further teaches that the outer diameter of the camera head with that image pickup chip is about 10 mm. Id. (“outer diameter of the camera head is about 10 mm.”). This means that the largest dimension of Suzuki’s image sensor is between 8.5 and about 10 mm, which is within the recited range of 2 to 12 mm. Ex. 1004 ¶¶ 66, 152–153. IPR2020-00475 Patent 9,186,052 B1 78 We also find that Suzuki’s teachings regarding image sensor size apply to CMOS sensors, as well as CCD sensors. Suzuki describes its sensor as a solid state image pickup chip, rather than referring to it as CCD. Ex. 1015, 4:6–11; Ex. 1086 ¶ 43. In fact, Suzuki does not mention CCDs. See generally Ex. 1015; Ex. 1086 ¶ 43. The term solid state image sensor encompasses both CMOS and CCD sensors. Ex. 1004 ¶¶ 42, 48. We also credit Dr. Neikirk’s testimony that CMOS sensors were known before the filing of Suzuki. Ex. 1086 ¶ 44. Renshaw (Ex. 1090), which was publicly available in May 1990, and Shizukuishi (Ex. 1089), which issued in 1989, both disclose CMOS image sensors. Id.; Ex. 1090, 2, 4 (“Two image array sensors designed and fabricated using a standard two level metal ASIC CMOS process.”); Ex. 1089, code (45), 2:46–50 (“the present invention uses a CMOS IC manufacturing process to provide a solid state pickup device.”) We further credit Dr. Neikirk’s testimony that, by the 1997 filing of the earliest priority application for the ’052 patent, CMOS pixels with the dimensions of 7.3 x 7.6 µm were known. Ex. 1086 ¶ 46; Ex. 1048, 3 (June 1993 publication), 9 (CMD APS sensor with a pixel size of 7.3 x 7.6 µm); see also Ex. 1041 ¶ 5 (“[I]t is possible to realize complex CMOS- or MOS- based pixels as small as CCD-based pixels.”). Further, we credit Dr. Neikirk’s testimony that handheld digital cameras were available in 1997 and were described as delivering high-quality images. Ex. 1086 ¶ 46; Ex. 1087, 6 (November 1997), 8 (“[T]he SVmini-209, delivers ultrahigh- quality digital images . . . . The key to this camera is its CMOS sensor.”). We also note that claim 1 does not recite any minimum resolution for its image sensor. IPR2020-00475 Patent 9,186,052 B1 79 We do not credit Dr. Lebby’s testimony that an ordinarily skilled artisan would not apply Suzuki’s teachings to CMOS sensors. Ex. 2088 ¶ 19. As discussed above, Suzuki refers to solid state image sensors, which encompasses CMOS sensors. Ex. 1004 ¶¶ 42, 48; Ex. 1086 ¶ 43. Further, we do not credit Dr. Lebby’s testimony that the pixel size for CMOS sensors were too large to be used for image sensors, such as those disclosed in Suzuki. Ex. 2088 ¶ 147. As mentioned, claim 1 has no minimum resolution requirement. Further, as mentioned, a CMOS image sensor with a pixel size of 7.3 x 7.6 µm had been described. Ex. 1048, 3, 9. In addition, as discussed above, a camera with a CMOS image sensor was available that was described as producing “ultrahigh-quality images.” Ex. 1087, 6, 8. We further find that an ordinarily skilled would have been motivated to combine Suzuki’s teachings with Wakabayashi’s imager apparatus (as modified by Ackland) because Suzuki discloses that its arrangement of an image sensor and circuit board allows for a camera head to have an outer diameter closer to the diagonal length of the solid-state image, which furthers Wakabayashi’s objective of making its camera unit compact and stable and reliable. Ex. 1004 ¶ 154; Ex. 1015, 1:53–56, 4:6–11 (“where the solid-state image pickup chip of 1/3 inch (8.5 mm) is used, the outer diameter of the camera head is about 10 mm, and therefore is smaller about 5 mm than that of the conventional camera head.”), 4:58–65 (“[T]he outer diameter of the camera head can be reduced to a small size close to the diagonal length of the solid-state image pickup chip. This provides an advantage that an image of a narrow portion, such as the interior of a pipe and the interior of a precision machine, can be picked up.”); Ex. 1027, code IPR2020-00475 Patent 9,186,052 B1 80 (57) (“A video camera unit made compact to realize a reduction in weight of a video camera rotating mechanism . . . . allows the user to adjust the angle of the video camera unit only with the thumb and index finger.”), 3:39–46 (“The video camera unit is made small . . . so that a less strength is required for joining members and accordingly the joining members can be reduced in size and weight. This structure also allows the user to manipulate the video camera with a thumb or index finger for setting an imaging angle of the video camera unit.”), 14:6–10. We also find that an ordinarily skilled artisan would have had a reasonable expectation of success in combining the teachings of Suzuki and Wakabayashi as modified by Ackland. Ex. 1004 ¶ 159. In sum, we find that the combination of Wakabayashi and Suzuki teaches limitation 1.k. m. Summary For the foregoing reasons, after considering and balancing the evidence presented by the parties, both for and against obviousness, we determine that Petitioner has proved, by a preponderance of the evidence, that claim 1 would have been obvious over Wakabayashi, Ackland, and Suzuki. E. Asserted Obviousness of Claims 3 and 7 over Wakabayashi, Ricquier, and Dierickx Petitioner asserts that claims 3 and 7 would have been obvious over Wakabayashi, Ricquier, and Dierickx. Pet. 58–84. 1. Ricquier Ricquier is a conference paper. Exs. 1033, 1038. According to declarations submitted by Petitioner, Ricquier was disseminated and IPR2020-00475 Patent 9,186,052 B1 81 available in a library by May 1994. Ex. 1004 ¶¶ 302–308; Ex. 1033, 1; Ex. 1038, 1.18 Ricquier, thus, is prior art to the ’052 patent under 35 U.S.C. § 102(b). Ex. 1001, code (63). Patent Owner does not contest the prior art status of Ricquier. See generally PO Resp. Ricquier describes a dedicated imager for a camera operating in several resolutions. Ex. 1038, 2. The imager includes a CMOS array of 256 x 256 pixels addressable by column and row using a timing controller on an off-chip driving unit. Id. at 2–4. Petitioner provides an annotated copy of Figure 1 of Ricquier, reproduced below: Pet. 59. The annotated figure above includes a schematic representation of Ricquier’s sensor architecture. Ex. 1038, 3. As illustrated, Petitioner maps the recited pre-video signal of claim 3 to the image data output of this sensor 18 These cites to Exhibits 1033 and 1038 refer to the page numbers added by Petitioner. IPR2020-00475 Patent 9,186,052 B1 82 architecture. Pet. 59–60. Petitioner argues that readout in this sensor architecture is done by controlling the clock scheme using a timing controller on an off-chip driving unit for driving the row slection, column selection, and reset signal inputs. Id. at 60. Those inputs are identified via annotations in the figure above. Id. at 59. 2. Dierickx Dierickx is a patent application publication that was filed in October 1996. Ex. 1041, codes (21, 22). Thus, Dierickx is prior art to the ’052 patent under 35 U.S.C. § 102(e). Patent Owner does not contest the prior art status of Dierickx. See generally PO Resp. Dierickx teaches CMOS image sensors with active pixels, where each active pixel includes a photo detector and an amplifying part of the pixel. Ex. 1041 ¶¶ 2, 6, Fig. 6. Petitioner submitted an annotated copy of Figure 6 of Dierickx, reproduced below: IPR2020-00475 Patent 9,186,052 B1 83 Pet. 63. Figure 6 above illustrates an array of two pixels with photodiodes 81 and 82 and amplifying parts 91 and 92. Ex. 1041 ¶ 53. 3. Combination of Wakabayashi and Ricquier Petitioner argues that an ordinarily skilled artisan would have combined the teachings of Wakabayashi and Ricquier. Pet. 58–62. For this proposed combination, we first address the parties’ arguments regarding whether an ordinarily skilled artisan would have been motivated to make this combination and would have had a reasonable expectation of success in so doing. Then we address the expert testimony on those issues; then, we provide our analysis. a. Parties’ Arguments Petitioner asserts that an ordinarily skilled artisan would have combined the teachings of Wakabayashi’s image sensor with Ricquier’s teachings of CMOS pixel array driven by a timing controller. Pet. 60. Petitioner argues that an ordinarily skilled would have been motivated to apply Ricquier’s teachings to Wakabayashi because Ricquier discloses the advantages of selective addressability and multiple resolutions. Id. at 61 (citing Ex. 1038, 2; Ex. 1004 ¶ 170). Petitioner also argues that an ordinarily skilled artisan would have known that this combination would predictably work and would provide the expected functionality. Id. (citing Ex. 1004 ¶ 171). Patent Owner argues that Ricquier was specifically developed for use in industrial machine vision applications. PO Resp. 52. Patent Owner further argues that Ricquier’s selective addressability and multiple resolutions address problems that are specific to industrial machine vision applications. Id. Patent Owner argues that Petitioner fails to explain why IPR2020-00475 Patent 9,186,052 B1 84 these benefits for industrial machine vision applications would apply to the consumer imaging apparatus of Wakabayashi. Id. at 53. Further, Patent Owner refers to the arguments it presented for claim 1 that an ordinarily skilled artisan would not combine the teachings of a device with a CCD sensor with teachings regarding the circuitry of a CMOS sensor. Id. at 54. Patent Owner also refers to the arguments it presented for claim 1 that combining CCD and CMOS teachings would render the references inoperable for their intended purpose, change their principle of operation, would lack a reasonable expectation of success, and would only result from hindsight. Id. at 54, 55. Petitioner argues that selective addressability and multiple resolutions are features of all CMOS imagers and are often the reason why CMOS is chosen over CCD. Reply 23. Petitioner further argues that Patent Owner made that argument in the related proceeding of IPR2020-00512 (“’512 IPR”), which also challenges the ’052 patent. Id. Petitioner also argues that it presented two additional rationales for combining Wakabayashi and Ricquier in addition to the rationale of obtaining selective addressability and multiple resolutions. Id. In its Sur-reply, Patent Owner argues that Petitioner only advanced the rationale of obtaining selective addressability and multiple resolutions in its Petition. Sur-reply 22. b. Expert Testimony In summarizing the experts’ testimony and in providing our analysis in Section III.E.3.c, we focus on the rationale that Petitioner indisputably IPR2020-00475 Patent 9,186,052 B1 85 raised in the Petition: selective addressability and multiple resolutions. Pet. 61. Dr. Neikirk testifies that an ordinarily skilled artisan would have been motivated to apply Ricquier’s teachings of selective addressability and multiple resolutions to Wakabayashi’s imager to allow the captured resolution and frame rate to be changed. Ex. 1004 ¶ 170. Dr. Neikirk further testifies that, as a result of the ability to change resolution, the frame rate of the image sensor can be advantageously changed on the fly. Id. Dr. Neikirk also testifies that ordinarily skilled artisan would have known that this combination would predictably work and would provide the expected functionality. Id. ¶ 171. Dr. Lebby disagrees, testifying that an ordinarily skilled artisan would understand that a consumer level digital camera would not benefit from low- image quality machine vision features, such as selective addressability and multiple resolutions. Ex. 2088 ¶ 152. In his Reply Declaration, Dr. Neikirk testifies that “‘selective addressability (i.e., windowing feature)’ would advantageously provide a consumer camera the capability to digitally zoom in on distant objects.” Ex. 1086 ¶ 48.19 Dr. Neikirk further testifies that an ordinarily skilled artisan would also have recognized that the “multiple-resolutions feature” would advantageously allow a consumer camera to be able to advantageously change “the frame rate of the image sensor . . . on the fly”—this would allow 19 The paragraph does not provide any cites for the quotes referenced in this sentence. Ex. 1048 ¶ 43. IPR2020-00475 Patent 9,186,052 B1 86 for slow-motion video capture since it would allow for faster image acquisition. Id. c. Analysis We find that an ordinarily skilled artisan would have combined the Wakabayashi’s teachings of an image sensor with Ricquier’s teachings of CMOS pixel array driven by a timing controller. An ordinarily skilled artisan would have been motivated to make that combination to obtain the advantages of selective addressability and multiple resolutions disclosed by Ricquier. Ex. 1004 ¶ 170. Ricquier discloses that its sensor has “selective addressability.” Ex. 1033, 10 (“A CMOS technology was chosen because it offers the selective addressability.”). Ricquier further discloses that its sensor can produce multiple resolutions. Id. at 17 (“possibility to change the resolution,” “low resolution mode”). We credit Dr. Neikirk’s testimony that an ordinarily skilled artisan would recognize that selective addressability and the ability to change resolutions would be of benefit for Wakabayashi’s imager because it would allow the frame rate of the image sensor can be advantageously changed on the fly and would provide a windowing feature that would allow, for example, digital zoom. Ex. 1086 ¶ 48. We also credit Dr. Neikirk’s testimony that an ordinarily skilled artisan would have had a reasonable expectation of success in making this combination. Ex. 1004 ¶ 171. We do not credit Dr. Lebby’s testimony that selective addressability and multiple resolutions would not have been advantageous for a consumer level digital camera, such as Wakabayashi. Ex. 2088 ¶ 152. Dr. Lebby does not explain why a consumer level digital camera would not benefit from selective addressability and multiple resolutions. Id. Further, in the ’512 IPR2020-00475 Patent 9,186,052 B1 87 IPR, Dr. Lebby indicates that x-y addressability and multiple resolution capability is an important advantage for cameras with CMOS imagers, testifying: “this X-Y addressability and multiple resolution capability disclosed in Ricquier is a feature of all CMOS imagers and is the reason CMOS was chosen over CCD in the first instance.” Ex. 1094 (’512 IPR, Ex. 2088) ¶ 120. Dr. Lebby further testifies: [b]ecause Swift discloses a camera based on Dr. Fossum’s CMOS imager, its pixel array already enjoys that advantage.” Id. As mentioned, Patent Owner also relies on the arguments it presented for claim 1 that combining CCD and CMOS teachings would render the references inoperable for their intended purpose, change their principle of operation, would lack a reasonable expectation of success, and would only result from hindsight. PO Resp. 54, 55. For the reasons set forth in Sections III.D.4–6, we disagree with those arguments. We find that an ordinarily skilled artisan would have been motivated to combine Wakabayashi’s and Ricquier’s teachings and would have had a reasonable expectation of success in doing so. Ex. 1004 ¶¶ 170–171. 4. Combination of Dierickx with Wakabayashi and Ricquier For Petitioner’s proposed combination of Dierickx with Wakabayashi and Ricquier, we first address the parties’ arguments regarding whether an ordinarily skilled artisan would have been motivated to make this combination and would have had a reasonable expectation of success in so doing. Then we address the expert testimony on those issues; then, we provide our analysis. IPR2020-00475 Patent 9,186,052 B1 88 a. Parties’ Arguments Petitioner asserts that an ordinarily skilled artisan would have been motivated to combine Dierickx’s teaching of an active CMOS pixel array, where each pixel has an amplifier, with Wakabayashi’s imager apparatus. Pet. 63–64. Petitioner argues that Dierickx indicates such an application would result in high image quality and would improve the functionality of Wakabayashi’s video camera without increasing size or weight. Id. at 64. Further, Petitioner asserts that Dierickx teaches that by using a CMOS image sensor with active pixels, instead of the passive pixels taught by Ricquier, the sensor is less sensitive to noise fluctuations. Id. In addition, Petitioner asserts that Dierickx teaches that its active pixels can include additional electronics that permit the image sensor to execute more sophisticated functions and operate at a higher speed or in more extreme illumination conditions. Id. Petitioner also argues that an ordinarily skilled artisan would have known that this combination would predictably work and would provide the expected functionality. Id. at 64–65 (citing Ex. 1004 ¶¶ 172– 175). Patent Owner disagrees, arguing that Dierickx teaches away from the proposed combination. PO Resp. 55. Patent Owner asserts that “Dierickx discloses an active pixel array—a subset of CMOS technology that [an ordinarily skilled artisan] would understand to be distinct and separate from, and therefore not readily compatible with, the passive-pixel technology as disclosed in Ricquier.” Id. Further, Patent Owner argues that Dierickx IPR2020-00475 Patent 9,186,052 B1 89 teaches CCD-based cameras have higher image quality than CMOS-based cameras. Id. at 55–56. Petitioner responds that its proposed combination combines Ricquier’s CMOS array with Dierickx’s teachings that active pixel image sensors are less sensitive to noise fluctuations and can execute more sophisticated functions. Reply 25. Petitioner argues that these disclosed attributes of active pixel image sensors would motivate an ordinarily skilled artisan to convert Ricquier’s passive pixels to active pixels (where each pixel has an amplifier). Id. Petitioner also argues that ’052 patent admits that active pixel type imagers have lower noise levels than CCDs. Id. Further, Petitioner argues the fact that Dierickx may have mentioned one possible advantage of CCD sensors does not teach away from active CMOS sensors. Id. at 26. In its Sur-reply, Patent Owner does not respond to Petitioner’s arguments concerning an ordinarily skilled artisan’s motivation to combine Dierickx with Ricquier and Wakabayashi. Sur-reply 22–24. (As set forth in Section III.E.3, the Sur-reply addresses an ordinarily skilled artisan’s motivation to combine Ricquier and Wakabayashi. Id.) b. Expert Testimony Dr. Neikirk testifies that an ordinarily skilled artisan would have been motivated to apply Dierickx’s teachings of an array of active CMOS pixels, each having an amplifier, in implementing Wakabayashi’s video camera (as modified by Ricquier’s teachings). Ex. 1004 ¶ 174. Dr. Neikirk further testifies that Dierickx teaches that CMOS image sensors with active pixels, rather than passive pixels, are less sensitive to noise fluctuations. Id. Further, Dr. Neikirk testifies that Dierickx teaches that active pixels can IPR2020-00475 Patent 9,186,052 B1 90 include additional electronics that allow the image sensor to execute more sophisticated functions and operate at higher speed or in more extreme illumination conditions. Id. In addition, Dr. Neikirk testifies that an ordinarily skilled artisan would have found it routine to make the combination and would have known that the combination would predictably work and provide expected functionality. Id. ¶ 175. Dr. Lebby testifies that an ordinarily skilled artisan would not have combined the passive pixels in Ricquier with the active pixels in Dierickx because such pixels are fundamentally different. Ex. 2088 ¶ 153. Dr. Lebby also testifies that Dierickx discloses a specialized timing and control pattern contrary to the simplified off-chip clock driver used in Ricquier. Id. Dr. Lebby testifies that Ricquier’s simplified off-chip clock would degrade or hinder the performance of timing and control that are critical for reducing FPN (fixed pattern noise) as taught by Dierickx and would increase power requirements as well as costs. Id. ¶ 154. Dr. Lebby also testifies that separating timing and control circuitry from the pixel array adversely effects performance, and the only reason Ricquier used an off-chip driving circuit was to simplify the circuitry for development purposes and Ricquier does not teach or suggest such an arrangement for an actual embodiment. Id. ¶ 160. In his Reply Declaration, Dr. Neikirk testifies that the proposed combination of Ricquier and Dierickx does not combine Dierickx’s CMOS array with Ricquier’s, but rather applies both Ricquier’s teaching of a CMOS array and off-chip location of timing and control circuitry and Dierickx’s teachings of an amplifier at each pixel. Id. Dr. Neikirk also testifies that the ’052 patent admits that active pixel-type imagers have less IPR2020-00475 Patent 9,186,052 B1 91 noise than CCDs. Id. ¶ 53. Dr. Neikirk testifies that the specialized timing and control feature is to compare a first and a second state for each pixel. Id. ¶ 54. Dr. Neikirk also testifies that Dierickx’s teachings of a specialized timing and control feature to eliminate fixed pattern noise is a separate teaching from its teaching of the use of an amplifier at each pixel. Id. Further, Dr. Neikirk testifies that the proposed combination does not involve Dierickx’s teaching of a technique for reducing FPN. Id. In addition, Dr. Neikirk disagrees with Dr. Lebby’s testimony that Ricquier’s used an off- chip driving circuit because it was a proof-of-concept prototype. Ex. 1086 ¶ 52. c. Analysis We find that an ordinarily skilled artisan would have combined Dierickx’s teaching of an active CMOS pixel array, where each pixel has an amplifier, with Wakabayashi’s imager apparatus (as modified by Ricquier). Ex. 1004 ¶ 174. An ordinarily skilled artisan would have been motivated to make this combination to provide high image quality and improve the functionality of Wakabayashi’s video camera (as modified by Ricquier) without leading to a larger size and weight. Id. Dierickx discloses that its pixel array is for use in imaging devices and applications requiring high image quality. Ex. 1041 ¶ 19 (“high image quality,” “configured as a pixel matrix”). Dierickx further discloses that “active pixel image sensors are potentially less sensitive to noise fluctuations than passive pixels. Id. ¶ 6; Ex. 1004 ¶ 79. Further, Dierickx discloses that active pixels can include “additional electronics” such that the “image sensor may be equipped to execute more sophisticated functions” such as “operation at higher speed or operation in more extreme illumination conditions.” Ex. 1041 ¶ 6; Ex. 1004 IPR2020-00475 Patent 9,186,052 B1 92 ¶ 79. These disclosures in Dierickx would have motivated an ordinarily skilled artisan to use active pixels in Wakabayashi’s imager apparatus as modified by Ricquier. Ex. 1004 ¶ 174. Although, as Dr. Lebby testifies, passive pixels and active pixels may be different, Petitioner’s proposed combination of Dierickx with Wakabayashi and Ricquier does not combine active pixels with passive pixels. Ex. 1004 ¶¶ 189–191; Ex. 2088 ¶ 153. Instead, it replaces Ricquier’s passive pixels with active pixels. Ex. 1004 ¶¶ 189–191; Ex. 2088 ¶ 153. Thus, the proposed combination does not raise an issue of combining active and passive pixels. We also do not agree with Patent Owner’s argument that Dierickx teaches away from the use of CMOS image sensors. PO Resp. 56. Patent Owner does not cite any expert testimony to support this teaching-away argument. Id. Further, we find that Dierickx as a whole does not teach away from the use of CMOS sensors. Dierickx states in its Background of the Invention that “CCD-based camera systems have less noise fluctuations in the image compared to CMOS- or MOS-based camera systems.” Ex. 1041 ¶ 5. Dierickx further states: “[t]herefore, CCD-based camera systems are nowadays preferred in applications wherein a high image quality is required such as video or still camera applications.” Id. But Dierickx also discloses that CMOS technology has the advantage of “being offered by most foundries whereas CCD technology is rarely offered and [is] . . . more complex and expensive.” Id. Thus, Dierickx teaches that, although CCD cameras have less noise fluctuation, CMOS has the advantage of being offered by most foundries and is also less expensive and complex. Dierickx further teaches that active CMOS pixels have less of an issue with noise. Id. IPR2020-00475 Patent 9,186,052 B1 93 ¶ 6. Combined, these disclosures do not teach away from CMOS active pixels for high image quality applications. In fact, Dierickx’s invention is directed to “camera systems and in imaging applications . . . requiring a high image quality.” Ex. 1041 ¶ 19. Yet, Dierickx uses a CMOS sensor for its imager. Id. ¶ 2 (“[P]resent invention relates to solid state imaging devices being manufactured in a CMOS- or MOS-technology.”), ¶ 32 (“[A]n implementation of the image sensor as a sensor with nxm pixels in a double metal, single poly 0.7 µm CMOS process can be assumed.”). Thus, we find that Dierickx does not teach away from the use of CMOS sensors for high quality imaging. Instead, Dierickx describes tradeoffs between CCD and CMOS sensors while expressly disclosing the use of CMOS sensors. Although Dr. Lebby testifies that Dierickx discloses a specialized timing and control pattern contrary to the simplified off-chip clock driver used in Ricquier, Petitioner does not propose combining Dierickx’s timing and control pattern with the clock driver in Ricquier. Ex. 2088 ¶ 153; Pet. 62–65. Thus, Petitioner’s combination does not create a conflict between Dierickx’s timing and control patter and Ricquier’s clock driver. In Section III.E.5.f, we address Dr. Lebby’s testimony that the only reason that Ricquier used an off-chip driving circuit was to simplify the circuitry for development purposes and that Ricquier does not teach or suggest such an arrangement for an actual camera embodiment. In that section, we also address Dr. Neikirk’s contrary testimony. As set forth in Section III.E.5.f, we credit Dr. Neikirk’s testimony on that issue, and not Dr. Lebby’s. IPR2020-00475 Patent 9,186,052 B1 94 We find that an ordinarily skilled artisan would have been motivated to combine Dierickx’s teaching of an active CMOS pixel array, where each pixel has an amplifier, with Wakabayashi’s imager apparatus (as modified by Ricquier) and would have had a reasonable expectation of success in making that combination. Ex. 1004 ¶¶ 174–175. 5. Element-by-Element Analysis of Claim 3 We provide an element-by-element analysis of claim 3. The only limitation of claim 3 in dispute is limitation 3.e, which we address in Section III.E.5.f below. Below, we nevertheless address all limitations of claim 3. a. [3.pre] an imaging device Petitioner relies on its showing for claim 1 that Wakabayashi teaches an imaging device. Pet. 65 (citing Ex. 1004 ¶¶ 176–177). Patent Owner does not dispute that Wakabayashi teaches an imaging device. See generally PO Resp. For the reasons discussed in Section III.D.6.a, we find that Wakabayashi teaches an imaging device.20 b. [3.a] a housing For limitation 3.a, Petitioner relies on its showing that Wakabayashi teaches limitation 1.a. Pet. 65 (citing Ex. 1004 ¶¶ 178–179). Patent Owner does not dispute that Wakabayashi teaches limitation 3.a. See generally PO Resp. For the reasons discussed in Section III.D.6.b for limitation 1.a, we find that Wakabayashi teaches limitation 3.a.21 c. [3.b] an image sensor mounted in said housing, said image sensor including a planar substrate having a length and a width thereto, wherein said length and width of said planar substrate define a first plane, said 20Thus, we do not need to determine whether the preamble is limiting. 21 Limitations 1.a and 3.a are identical. IPR2020-00475 Patent 9,186,052 B1 95 planar substrate including an array of CMOS pixels thereon, Petitioner asserts that Wakabayashi and Ricquier combined teach limitation 3.b. Pet. 65–68. Petitioner argues that Wakabayashi discloses: an image sensor (e.g., “imager device 27 [] electrically connected to the camera circuit board 29 by soldering”) mounted in said housing (e.g., “circuit board 29 is fixed on the mounting plate 28…fixed to the camera case 16”), said image sensor including a planar substrate having a length and a width thereto, wherein said length and width of said planar substrate define a first plane (e.g., plane defined by length and width of “imager device 27” as shown in Fig. 7), said planar substrate including an [image sensing area] thereon (e.g., area of “imager device 27” upon which the “image of the subject is focused”). Pet. 65. Petitioner further argues that “Wakabayashi further discloses that its ‘imager device 27’ is a ‘solid state imager device.’ E.g., Wakabayashi [Ex. 1027], 9:10-14.” Id. Petitioner further asserts that an ordinarily skilled artisan “would have understood ‘imager device 27’ includes a planar semiconductor substrate on which the image sensing region, for converting light into charge, is fabricated.” Id. at 65–66 (referring to Section IX.A.1 (pp. 15–26) of the Petition). Petitioner provides the following annotated version of Figure 7 illustrating how imager device 27 has a length and width that defines a first plane: IPR2020-00475 Patent 9,186,052 B1 96 Pet. 66 (citing Ex. 1004 ¶¶ 180–182). The annotated version of Figure 7 above shows imager device 27 and camera circuit board 29 in red, indicating that those elements constitute an image sensor including a planar substrate. Id. Petitioner argues that Ricquier discloses “a planar substrate (e.g., substrate for ‘fabricat[ing] in a standard 1.5 µm CMOS technology’) including an array of CMOS pixels thereon (e.g., ‘pixel array . . . realised in . . . CMOS technology’).” Pet. 66. Petitioner further argues Ricquier discloses “‘acquisition of image data’ using a ‘256*256 X-Y addressable photodiode array . . . realised in a 1.5 µm standard CMOS technology.’” Id. (quoting Ex. 1033, 9; citing Ex. 1033, Abstract, 3, 5, 6, Fig. 1). Petitioner provides the following annotated version of Figure 1 of Ricquier: IPR2020-00475 Patent 9,186,052 B1 97 Pet. 68 (citing Ex. 1004 ¶¶ 183–185). In the annotated figure above, Petitioner identifies an array of CMOS pixels. Id. Patent Owner does not dispute that Petitioner’s combination of Wakabayashi and Ricquier teaches limitation 3.b. See PO Resp. 51–58. Dr. Neikirk’s testimony and the cited passages of Wakabayashi’s and Ricquier’s disclosures support Petitioner’s arguments for limitation 3.b. See Ex. 1004 ¶¶ 178–185 (and the citations to Exs. 1027 and 1033 therein). We find that the combination of Wakabayashi and Ricquier teaches limitation 3.b. Id. d. [3.c] wherein a plurality of CMOS pixels within said array of CMOS pixels each include an amplifier, Petitioner argues that Ricquier and Dierickx combined teach limitation 3.c. Pet 68–70. Petitioner asserts that Ricquier discloses a plurality of CMOS pixels within an array of CMOS pixels thereon. Id. at 68. Petitioner quotes Ricquier’s disclosure of a “pixel array consists of 256 by 256 square pixels . . . realised in . . . CMOS technology.” Id. (quoting IPR2020-00475 Patent 9,186,052 B1 98 Exhibit 1033, 17). Petitioner assets that Dierickx discloses CMOS pixels that each have an amplifier. Id. Petitioner further argues that Dierickx discloses “‘CMOS . . . image sensors with active pixels’ where each ‘active pixel is configured with means integrated in the pixel to amplify charge that is collected on the light sensitive element.’” Id. (quoting Ex. 1041 ¶ 6). Petitioner also quotes the following passages in Dierickx: • “[S]olid state imaging devices being manufactured in a CMOS- or MOS-technology.” (Pet. 69, quoting Ex. 1041 ¶ 2 (emphasis omitted)); • “Of the image sensors implemented in a CMOS- or MOS- technology, CMOS or MOS image sensors with passive pixels and CMOS or MOS image sensors with active pixels are distinguished. An active pixel is configured with means integrated in the pixel to amplify the charge that is collected on the light sensitive element . . . .” (Pet. 69, quoting Ex. 1041 ¶ 6); and • “An active pixel…is shown in FIG. 6 in a most simple form. Two pixels of an array are shown, only relevant parts of the pixels are shown: (81), (82) are photo detectors, (91), (92) are schematic representations of the amplifying part of the pixel.” (Pet. 69, quoting Ex. 1041 ¶ 53 (emphasis by Petitioner)). IPR2020-00475 Patent 9,186,052 B1 99 Petitioner provides the following annotated version of Figure 6 of Dierickx: Pet. 69. In the above annotated figure, Petitioner colors elements 91 and 92 in blue, indicating those elements are amplifiers. In this annotated figure, Petitioner also indicates elements 81, 83, 84, and 91 constitute one pixel and elements 82, 85, 86, and 92 constitute another pixel. Further, Petitioner cites to paragraph 25 and Figure 5 of Dierickx for support, as well as paragraphs 186–191 of Dr. Neikirk’s Declaration (Ex. 1004). Id. Patent Owner does not dispute that Ricquier and Dierickx combined teach limitation 3.c. See PO Resp. 51–58. Dr. Neikirk’s testimony and the cited disclosures of Ricquier and Dierickx support Petitioner’s arguments for limitation 3.c. See Ex. 1004 ¶¶ 186–191 (and the citations to Exs. 1033 and 1041 therein). We find that Ricquier and Dierickx combined teach limitation 3.c. Id. IPR2020-00475 Patent 9,186,052 B1 100 e. [3.d] said image sensor further including a first circuit board having a length and a width thereto, wherein said length and width of said first circuit board define a second plane, said first circuit board including timing and control circuitry thereon, said timing and control circuitry being coupled to said array of CMOS pixels Petitioner argues that Wakabayashi and Ricquier combined teach limitation 3.d. Pet 70–73. Petitioner asserts: “Wakabayashi discloses said image sensor further including a first circuit board having a length and a width thereto, wherein said length and width of said first circuit board define a second plane (e.g., plane defined by length and width of ‘circuit board 29’ as shown in Fig. 7).” Id. at 70 (citing Ex. 1027, Fig. 7; Ex. 1004 ¶¶ 192– 194). Petitioner further argues: Ricquier discloses circuitry (e.g., “off-chip driving unit”) including timing and control circuitry thereon (e.g., “timing controller” to “drive…row selection and column selection signal[s]” of “X-Y addressable photodiode array”) said timing and control circuitry being coupled to said array of CMOS pixels (e.g., “timing controller” “controlling the sequence of addresses and reset pulses of” “photodiode array” as illustrated in Fig. 1). Pet. 70–71 (emphasis omitted). Petitioner further argues that Ricquier “discloses that a ‘timing controller’ generates the ‘X-Y addresses and control pulses’ and uses ‘decoders [to] drive . . . row selection and column selection signal” from the ‘X-Y addressable photodiode array.’ E.g., Ricquier [Ex. 1033], 3, 4, 9.” Id. at 71. Further, Petitioner asserts that “Ricquier further discloses that this “timing controller,” while electrically coupled to the photodiode array to provide the selection signals, is ‘off chip.’ Ricquier [Ex. 1033], 4.” Id. Petitioner provides additional quotes from the Abstract and pages 3 and 4 of IPR2020-00475 Patent 9,186,052 B1 101 Ricquier to support this argument. Id. at 71–72. Petitioner also cites page 9 of Ricquier and provides the following annotated version of Figure 1 of Ricquier: Id. at 73. The annotated figure above includes the following annotations: Row selection, K reset, G reset, Column selection, and pre-video signal. Petitioner further cites the testimony of Dr. Neikirk for support. Id. (citing Ex. 1004 ¶¶ 192–198). Patent Owner does not dispute that Wakabayashi and Ricquier combined teach limitation 3.d. See PO Resp. 51–58. Dr. Neikirk’s testimony and Wakabayashi’s and Ricquier’s disclosures support Petitioner’s arguments. See Ex. 1004 ¶¶ 192–198 (and the citations to Exs. 1027 and 1033 therein). We find that Wakabayashi and Ricquier combined teach limitation 3.d. IPR2020-00475 Patent 9,186,052 B1 102 f. [3.e] said first circuit board being positioned in a stacked arrangement with respect to said planar substrate, said second plane of said first circuit board being substantially parallel to said first plane of said planar substrate The parties dispute whether Wakabayashi teaches limitation 3.e. Pet. 73–75; PO Resp. 57–58. Petitioner argues that Wakabayashi discloses that a first circuit board being positioned in a stacked arrangement with a planar substrate, arguing that circuit board 29 in Wakabayashi is in stacked arrangement with imager device 27. Pet 73. Petitioner further argues that Figures 3 and 7 of Wakabayashi show this stacked arrangement. Id. Petitioner asserts that the plane defined by the length and width of circuit board 29 is parallel with the plane defined by the length and width of imager device 27 as shown in Figure 3 and 7. Petitioner provides the following annotated version of Figure 7: Pet. 74. In the annotated figure above, Petitioner colors imager device 27 orangeish brown, indicating that imager device 27 is the recited planar IPR2020-00475 Patent 9,186,052 B1 103 substrate. Pet. 74. Petitioner colors circuit board 29 blue, indicating that circuit board 39 is the recited first circuit board that is positioned in a stacked arrangement with the planar substrate. Id. Petitioner provides the following annotated version of Figure 3 of Wakabayashi: Pet. 75. In the annotated figure above, imager device 27 and circuit board 29 are shaded the same colors as in annotated Figure 7 above. Id. The above annotated figure indicates that a plane of imager device 27 is “said first plane of the planar substrate” and that a plane of circuit board 29 is “said second plane of said first circuit board being substantially parallel to said first plane of said planar substrate.” Id. Although limitation 3.e does IPR2020-00475 Patent 9,186,052 B1 104 not expressly recite timing and control circuitry, as discussed above, limitation 3.d recites “said first circuit board including timing and control circuitry thereon.” As discussed above, Petitioner argues that Ricquier teaches timing and control circuitry. Pet. 61. Further, Petitioner argues that an ordinarily skilled artisan would have placed that timing and control circuitry on circuit board 29 when combining Wakabayashi’s and Ricquier’s teachings. Id. Petitioner cites to the testimony of Dr. Neikirk to support these arguments. Pet. 61 (citing Ex. 1004 ¶ 170), 75 (citing Ex. 1004 ¶¶ 199– 200). Patent Owner argues that limitation 3.e in combination with recitations from other limitations of claim 3 require that the timing and control circuitry and the array of CMOS pixels be on separate planes. PO Resp. 57. Patent Owner quotes the following recitations in claim 3: planar substrate including an array of CMOS pixels thereon, wherein a plurality of CMOS pixels within said array of CMOS pixels each include an amplifier, said image sensor further including a first circuit board having a length and a width thereto, wherein said length and width of said first circuit board define a second plane, said first circuit board including timing and control circuitry thereon, said first circuit board being positioned in a stacked arrangement with respect to said planar substrate. PO Resp. 57 (emphasis by Patent Owner). The italicized recitation is limitation 3.e. The non-italicized recitations above are found in limitation 3.b (“planar substrate including an array of CMOS pixels thereon”), limitation 3.c (“wherein a plurality of CMOS pixels within said array of CMOS pixels each include an amplifier”), and limitation 3.d (“said image sensor further including a first circuit board having a length and a width IPR2020-00475 Patent 9,186,052 B1 105 thereto, wherein said length and width of said first circuit board define a second plane, said first circuit board including timing and control circuitry thereon.”). As mentioned, Patent Owner argues that the combination of above recitations require that the recited timing and control circuitry and the recited array of CMOS pixels be on separate planes. Id. Patent Owner argues that an ordinarily skilled artisan would understand that Ricquier describes a proof-of-concept prototype for programming a CMOS imager to operate in several resolutions. PO Rep. 58. Patent Owner further argues that an ordinarily skilled artisan would recognize that the driving circuitry of Ricquier would be integrated on-chip in any actual CMOS imager. Id. Patent Owner asserts thus that Ricquier teaches that the driving circuitry must be on the same chip as the CMOS pixel array, so when Ricquier is combined with Wakabayashi an integrated camera on the chip would be used and the CMOS pixel array and timing and control circuitry would not be on the same plane. Id. In its Reply, Petitioner argues that Ricquier never states that its teachings are for a proof of concept prototype or intended to be a camera on the chip. Reply 24. Petitioner argues that Ricquier discusses the possibility of further cointegration of processing electronics on the same chip and the development of a multipurpose flexible sensor architecture that can be used as a module in further sensor system on a single chip. Id. Further, Petitioner asserts that neither statement disavows or teaches away from Ricquier’s off- chip architecture. Id. Petitioner argues that, when an ordinarily skilled artisan would combine Wakabayashi’s and Ricquier’s teachings, that artisan would place Ricquier’s timing circuit on circuit board 29, which has a different plane than Wakabayashi’s image sensor 27. Id. at 26. IPR2020-00475 Patent 9,186,052 B1 106 In its Sur-reply, Patent Owner argues that Petitioner’s assertion that Ricquier discloses that further cointegration was possible, not required, focuses on what could be combined, rather than what an ordinarily skilled artisan would have been motivated to do. Sur-reply 23–24. Patent Owner also argues that Ricquier’s teachings are for a proof-of-concept prototype, arguing that the passages cited by Petitioner from Ricquier are under the heading “The Sensor Concept” while another section is titled “Practical Realisation.” Id. at 24. As indicated above, Patent Owner does not dispute that, if as Petitioner argues Ricquier teaches off-chip timing and control circuitry and an ordinarily skilled artisan were to combine Wakabayashi’s and Ricquier’s teachings, an ordinarily skilled artisan would place Ricquier’s timing and control circuitry on Wakabayashi’s circuit board 29 in Wakabayashi, which is on a different plane than imager 27. See PO Resp. 57–58. Patent Owner, however, argues that Ricquier does not teach off-chip timing and control circuitry for any actual CMOS device but instead teaches the timing and control circuitry and an array of CMOS pixels must be on the same chip in actual CMOS device. Id. Thus, Patent Owner contends that with Petitioner’s proposed combination for any actual device the timing and control circuitry would be on the same plane as the imager and limitation 3.e would not be satisfied. Id. We find that Ricquier teaches off-chip timing and control circuitry. Ex. 1038, Abstract, 3, 4 (“timing controller (realised in an off-chip driving unit)”); Ex. 1004 ¶¶ 192–198. Although Ricquier describes “the possibility of further cointegration of processing electronics on the same chip,” that statement does not teach that cointegration is mandatory, but rather that is IPR2020-00475 Patent 9,186,052 B1 107 merely possible. Ex. 1033, 10 (emphasis added). Thus, this statement does not negate Ricquier’s teaching of off-chip driving circuitry, which when combined with Wakabayashi would be placed on circuit board 29, which is on a different plane than imager 27. Ex. 1004 ¶¶ 199–200. The fact that the embodiment disclosed in Ricquier may or may not be described as a prototype is of no consequence. Nothing in Ricquier teaches or suggests that all non-prototype embodiments must have cointegration of processing electronics on the same chip. Ex. 1086 ¶ 52. As discussed above, Ricquier merely teaches that such cointegration is a possibility. Ex. 1033, 18. As for Patent Owner’s argument that Petitioner focuses on the fact that cointegration is possible, but a possibility is not sufficient for a motivation to combine (Sur-reply 23–24), Petitioner does not rely on possible cointegration as providing a motivation to combine: the combination proposed by Petitioner does not involve cointegration of Ricquier’s processing circuitry on a chip. Pet. 62–65. As mentioned, the only issue in dispute regarding element 3.e is whether Ricquier teaches that its timing and control circuitry must be on the same chip as its CMOS array. As discussed, we resolve that issue in favor of Petitioner. The rest of Petitioner’s showing for element 3.e is undisputed. The testimony of Dr. Neikirk and Ricquier’s and Wakabayashi’s disclosures support Petitioner’s arguments regarding limitation 3.e. Ex. 1004 ¶¶ 199– 200 (and the citations therein); Ex. 1086 ¶¶ 52, 56 (and the citations therein). IPR2020-00475 Patent 9,186,052 B1 108 Thus, we find that the combination of Wakabayashi and Ricquier teaches limitation 3.e.22 g. [3.f] said image sensor producing a pre-video signal Petitioner argues that Ricquier teaches limitation 3.f. Pet. 75–76. Petitioner asserts “Ricquier discloses image data readout from the “256*256 imager” is “output” from the array.” Id. at 75 (citing Ex. Ricquier, Fig. 1, Abstract, 4). Petitioner further asserts that an ordinarily skilled artisan “would have understood Ricquier’s ‘output’ as shown in Figure 1 is a pre- video signal produced by Ricquier’s image sensor.” Id. Petitioner also provides the annotated version of Figure 1 of Ricquier, reproduced in Section III.E.5.e above, which identifies the output from the sensor as a “pre-video signal.” Pet. 73. Petitioner also cites to the abstract and pages 3, 4, and 9 of Ricquier. Id. Petitioner further cites to the testimony of Dr. Neikirk. Pet. 73 (citing Ex. 1004 ¶¶ 192–198). Patent Owner does not dispute that Ricquier teaches limitation 3.f. See PO Resp. 51–58. Dr. Neikirk’s testimony and Ricquier’s disclosure support Petitioner’s arguments for limitation 3.f. See Ex. 1004 ¶¶ 201–204 (and the citations to Exs. 1027 and 1033 therein). Thus, we find that Ricquier teaches limitation 3.f. h. [3.g] a second circuit board mounted in said housing, said second circuit board being electrically coupled to said planar substrate and to said first circuit board, said second circuit board having a length and a width thereto, wherein said length and width of said second 22 As discussed above, Wakabayashi and Ricquier combined teach limitations 3.b, 3.c, and 3.d, so the combination of Wakabayashi and Ricquier teaches the combination of limitations 3.b, 3.c, 3.d, and 3.e. IPR2020-00475 Patent 9,186,052 B1 109 circuit board define a third plane, said second circuit board including circuitry thereon to convert said pre- video signal to a post-video signal, said second circuit board being offset from said first circuit board and from said planar substrate, said third plane of said second circuit board being substantially parallel to said second plane of said first circuit board and to said first plane of said planar substrate; Petitioner argues Wakabayashi suggests limitation 3.g.23 Pet. 77–80. Petitioner maps the recited second circuit board to circuit board 39, the recited planar substrate to imager device 27, and the recited first circuit board to camera circuit board 29. Id. at 79. Petitioner argues that Wakabayashi discloses that circuit board 39 is disposed in the housing and that circuit board 39 is electrically connected to imager device 27 via flexible board 51. Id. at 77. Petitioner maps the recited third plane to the plane defined by the length and width of circuit board 39 as shown in Figure 7. Id. Petitioner quotes Wakabayashi’s disclosure that “circuit board 39 includes a signal processing circuit . . ., a driver circuit . . ., a system circuit, a power supply circuit, and so on.” Id. (quoting Ex. 1027, 6:7–10). Petitioner further argues that it would have been obvious to include “camera signal processing circuit . . . [that] generates a video signal 103 in a television signal format from the optoelectrically converted signal 101” on circuit board 39. Id. Petitioner argues that Ricquier teaches the production of a pre-video signal. Id. at 75–77. 23 In the claim chart, Petitioner expressly cites only Wakabayashi for this limitation. Implicitly, however, Petitioner also relies on Ricquier because this limitation recites a pre-video signal, and, for limitation 3.f, Petitioner expressly relies on Ricquier for the production of a pre-video signal. Pet. 75–77. IPR2020-00475 Patent 9,186,052 B1 110 Petitioner further argues that circuit board 39 is vertically and laterally offset from circuit board 29 and from imager device 27 as illustrated in Figures 3 and 7. Pet. 77–78. Petitioner further argues that the plane defined by length and width of circuit board 39 is parallel with plane defined by length and width of circuit board 29 and the plane defined by length and width of imager device 27 as shown in Figs. 3 and 7. Id. at 78. Petitioner provides the following annotated version of Figure 7 of Wakabayashi: Pet. 79. The above annotated figure identifies Petitioner’s mappings in Wakabayashi for the recited first circuit board, the planar substrate, the second circuit, and electrical coupling. Id. Petitioner provides the following annotated version of Figure 5 of Wakabayashi: IPR2020-00475 Patent 9,186,052 B1 111 Pet. 79. This annotated figure above further illustrates Petitioner’s mapping for the second circuit board. Id. Petitioner provides the following annotated version of Figure 3 of Wakabayashi: IPR2020-00475 Patent 9,186,052 B1 112 Pet. 80. The annotated figure above shows Petitioner’s mapping for the planar substrate, the first circuit board, and the third plane that is substantially parallel to the first and second planes. Petitioner cites the testimony of its expert to support its mappings and arguments for this limitation. Pet. 77–80 (citing Ex. 1004 ¶¶ 205–209). Patent Owner does not dispute that Wakabayashi suggests limitation 3.g. See PO Resp. 51–58. Dr. Neikirk’s testimony and Wakabayashi’s disclosures support Petitioner’s arguments for limitation 3.g. Ex. 1004 ¶¶ 199–209 (and the citations therein). We find that Wakabayashi suggests limitation 3.g. IPR2020-00475 Patent 9,186,052 B1 113 i. [3.h] a lens mounted in said housing, said lens being integral with said imaging device, said lens focusing images on said array of CMOS pixels of said image sensor Petitioner argues that Wakabayashi and Ricquier combined teach limitation 3.h. Pet. 80–81. For pertinent teachings from Wakabayashi, Petitioner relies on its showing for limitation 1.g. Id. at 80. Petitioner further argues that Ricquier’s teachings of an array of CMOS pixels would be applied to Wakabayashi’s imager so the lens of Wakabayashi would focus images on an array of CMOS pixels. Id. at 81. Petitioner relies on the testimony of Dr. Neikirk for support. Id. (citing Ex. 1004 ¶¶ 210–212). Patent Owner does not dispute that Wakabayashi and Ricquier combined teach limitation 3.h. See PO Resp. 51–58. Dr. Neikirk’s testimony and Wakabayashi’s and Ricquier’s disclosures support Petitioner’s arguments for limitation 3.h. See, e.g., Ex. 1004 ¶¶ 210–212 (and citations therein). We find that the combination of Wakabayashi and Ricquier teaches limitation 3.h. Id. j. [3.i] a video screen, said video screen being electrically coupled to said second circuit board, said video screen receiving said post-video signal and displaying images from said post-video signal; Petitioner argues that Wakabayashi teaches limitation 3.i. Pet. 81. For this limitation, Petitioner relies on its showing for limitation 1.h. Id. Petitioner also relies on the testimony of Dr. Neikirk. Id. (citing Ex. 1004 ¶¶ 213–214). Patent Owner does not dispute that Wakabayashi teaches limitation 3.i. See PO Resp. 51–58. IPR2020-00475 Patent 9,186,052 B1 114 Dr. Neikirk’s testimony and Wakabayashi’s disclosure support Petitioner’s arguments for limitation 3.i. Ex. 1004 ¶¶ 213–214 (and citations therein). We find that Wakabayashi teaches limitation 3.i. Id. k. [3.j] a power supply mounted said housing, said power supply being electrically coupled to said planar substrate to provide power to said array of CMOS pixels, said power supply also being electrically coupled to said first circuit board to provide power to said timing and control circuitry, said power supply also being electrically coupled to said second circuit board to provide power thereto Petitioner argues that Wakabayashi and Ricquier combined teach limitation 3.j. Pet. 81–82. For this limitation, Petitioner primarily relies on its showing regarding Wakabayashi’s teachings for limitation 1.i. Id. at 81. Petitioner also relies on Ricquier’s teachings of a CMOS array and timing and control circuitry. Id. at 82. Petitioner further relies on the testimony of Dr. Neikirk. Id. (citing Ex. 1004 ¶¶ 215–217). As mentioned, Petitioner relies on Ricquier as teaching the use of an array of CMOS pixels. See Section III.E.5.c. above. Patent Owner does not dispute that Wakabayashi and Ricquier combined teach limitation 3.j. See PO Resp. 51–58. Dr. Neikirk’s testimony and Wakabayashi’s and Ricquier’s disclosures support Petitioner’s arguments for limitation 3.j. See, e.g., Ex. 1004 ¶¶ 215–217 (and citations therein). We find that Wakabayashi and Ricquier combined teach limitation 3.j. IPR2020-00475 Patent 9,186,052 B1 115 l. [3.k] wherein a largest dimension of said image sensor along said first plane is between 2 and 12 millimeters Petitioner argues that Wakabayashi and Dierickx teach limitation 3.k.24 Pet. 83. Dierickx discloses the size of its image sensor is “6.3x5.7 mm” and, therefore, the largest dimension of that image sensor is between 2 and 12 millimeters. Pet. 83. Petitioner quotes Dierickx’s disclosure that “[t]he size of such image sensor with 384x288 pixels is 6.3x5.7 mm . . . .” Id. (quoting Ex. 1041 ¶ 32). Petitioner further relies on the testimony of Dr. Neikirk. Id. (citing Ex. 1004 ¶¶ 218–222). As mentioned, Petitioner relies on Wakabayashi as disclosing the first plane. See Section III.E.5.c. above. Patent Owner does not dispute that Wakabayashi and Dierickx teach limitation 3.k. See PO Resp. 51–58. Dr. Neikirk’s testimony and Dierickx’s disclosure support Petitioner’s arguments for limitation 3.k. Ex. 1004 ¶¶ 215–217 (and the citations therein). We find that Wakabayashi and Dierickx combined teach limitation 3.k. Id. m. Summary For the foregoing reasons, after considering and balancing the evidence presented by the parties, both for and against obviousness, we determine that Petitioner has proved, by a preponderance of the evidence, that claim 3 would have been obvious over Wakabayashi, Ricquier, and Dierickx. 24 Petitioner expressly cites Dierickx for limitation 3.k. Pet. 83. Petitioner, however, also relies on its arguments for limitation 3.b, for which it relies on both Wakabayashi and Ricquier. Id. (referring to limitation 3.b, which is addressed at pages 65–68 of the Petition). IPR2020-00475 Patent 9,186,052 B1 116 6. Claim 7 Claim 7 recites the imaging device of claim 3 wherein “said image sensor has a generally square shape along said first plane.” Ex. 1001, 23:29–31. For the limitation that claim 7 adds to claim 3, Petitioner asserts that Figure 7 of Wakabayashi shows that imager device 27 and circuit board have generally square shapes. Pet. 53–54, 83 (citing Ex. 1027, Fig. 7). Petitioner further argues that Dierickx discloses an image sensor that is 6.3 x 5.7 mm, and thus, Dierickx’s sensor also has a generally square shape. Id. at 83–84 (referring to Ex. 1041 ¶ 32). Further, Petitioner asserts that it would have been obvious to change the number of pixels in Dierickx from 384 x 288 to 256 x 256 as taught by Ricquier, thus producing a square shape. Id. (citing Ricquier 2, 9). Petitioner relies on the testimony of Dr. Neikirk to support these arguments. Id. (citing Ex. 1004 ¶¶ 223–227). Patent Owner does not dispute that Wakabayashi and Dierickx both disclose image sensors with generally square shapes. PO Resp. 51–58. Patent Owner, in fact, does not separately address claim 7. Id. We find that Wakabayashi and Dierickx each disclose image sensors with generally square shapes. Ex. 1027, Fig. 7; Ex. 1041 ¶ 32; Ex. 1004 ¶¶ 223–227. Thus, for the foregoing reasons, after considering and balancing the evidence presented by the parties, both for and against obviousness, we determine that Petitioner has proved, by a preponderance of the evidence, that claim 7 would have been obvious over Wakabayashi, Ricquier, and Dierickx. IPR2020-00475 Patent 9,186,052 B1 117 IV. CONCLUSION Petitioner has proven by a preponderance of the evidence that claims 1, 3, and 7 of the ’052 patent are unpatentable on the grounds of unpatentability as summarized in the following table: Claims 35 U.S.C. § Reference(s)/ Basis Claims Shown Unpatentable Claims Not Shown Unpatentable 1 103 Wakabayashi, Ackland25 1 103 Wakabayashi, Ackland, Suzuki 1 3, 7 103 Wakabayashi, Ricquier, Dierickx 3, 7 Overall Outcome 1, 3, 7 V. ORDER It is: ORDERED that claims 1, 3, and 7 have been shown, by a preponderance of the evidence, to be unpatentable;26 25 As indicated above, in light of our determinations regarding the grounds set forth in this table, we did not need to determine whether Petitioner has proven that claim 1 would have been obvious over Wakabayashi and Ackland (Ground 1). Pet. 9. 26 Should Patent Owner wish to pursue amendment of the challenged claims in a reissue or reexamination proceeding subsequent to the issuance of this decision, we draw Patent Owner’s attention to the April 2019 Notice Regarding Options for Amendments by Patent Owner Through Reissue or Reexamination During a Pending AIA Trial Proceeding. See 84 Fed. Reg. 16,654 (Apr. 22, 2019). If Patent Owner IPR2020-00475 Patent 9,186,052 B1 118 FURTHER ORDERED that because this is a Final Written Decision, the parties to the proceeding seeking judicial review of the decision must comply with the notice and service requirements of 37 C.F.R. § 90.2. chooses to file a reissue application or a request for reexamination of the challenged patent, we remind Patent Owner of its continuing obligation to notify the Board of any such related matters in updated mandatory notices. See 37 C.F.R. § 42.8(a)(3), (b)(2). IPR2020-00475 Patent 9,186,052 B1 119 FOR PETITIONER: Scott A. McKeown James L. Davis, Jr. Carolyn Redding ROPES & GRAY LLP scott.mckeown@ropesgray.com james.l.davis@ropesgray.com carolyn.redding@ropesgray.com FOR PATENT OWNER: Jonathan S. Caplan James Hannah Jeffrey H. Price KRAMER LEVIN NAFTALIS & FRANKEL LLP jcaplan@kramerlevin.com jhannah@kramerlevin.com jprice@kramerlevin.com Copy with citationCopy as parenthetical citation