Avaya Inc.

Patent Trials and Appeals BoardJun 17, 2021

2019006230 (P.T.A.B. Jun. 17, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 14/194,222 02/28/2014 Ariel Shtilman 514402-US- NP/AVA087PA 5524 136582 7590 06/17/2021 STEVENS & SHOWALTER, LLP Box AVAYA Inc. 7019 Corporate Way Dayton, OH 45459-4238 EXAMINER AHMED, SABA ART UNIT PAPER NUMBER 2154 NOTIFICATION DATE DELIVERY MODE 06/17/2021 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): pair_avaya@firsttofile.com pto@sspatlaw.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________________ Ex parte ARIEL SHTILMAN and ARKADY KARPMAN _____________________ Appeal 2019-006230 Application 14/194,222 Technology Center 2100 ____________________ Before JOSEPH L. DIXON, DAVID M. KOHUT, and JON M. JURGOVAN, Administrative Patent Judges. DIXON, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Appellant1 appeals under 35 U.S.C. § 134(a) from a final rejection of claims 1, 3–14, and 17–20, which constitute all the claims pending in this application.2 We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE.3 1 We use the word “Appellant” to refer to “applicant(s)” as defined in 37 C.F.R. § 1.42. The real party in interest is Avaya Inc. (Appeal Br. 2.) 2 Claims 2, 15, and 16 were canceled. (See Final Act. 1–2.) 3 Our Decision refers to the Specification (“Spec.”) filed February 28, 2014, the Final Office Action (“Final Act.”) mailed September 17, 2018, the Appeal Brief (“Appeal Br.”) filed February 15, 2019, the Supplemental Appeal Brief (“Supp. Appeal Br.”) filed March 6, 2019, the Examiner’s Appeal 2019-006230 Application 14/194,222 2 The claims are directed to a method and system “for facilitating in- memory indexing of data based on certain data access modes” including a first data access mode assigned to a first data index, and a second data access mode assigned to a second data index, the method and system “interchanging data access modes of the first and the second data indexes based on pre-defined rules” and “synchronizing [the] second data index with the first data index.” (Spec. Title; Abstr.) Claim 1, reproduced below, is illustrative of the claimed subject matter: 1. A data management system for providing in-memory indexing of data based on data access modes, the data management system comprising: a memory device storing executable instructions; and a processor in communication with the memory device, wherein executing the executable instructions by the processor causes the processor to: store, in a primary memory, data received from a first external system; index the data stored in the primary memory and storing the indexed data as a first data index in the primary memory, wherein the first data index is assigned with a first data access mode, wherein the first data access mode comprises a data write only privilege; after indexing the data stored in the primary memory, synchronize a second data index, stored in the primary memory, with the first data index, wherein the second data index is assigned with a second data access mode different than the first data access mode; and before synchronizing the second data index, interchange the first data access mode of the first data index with the second Answer (“Ans.”) mailed June 21, 2019, and the Reply Brief (“Reply Br.”) filed August 21, 2019. Appeal 2019-006230 Application 14/194,222 3 data access mode of the second data index based on one or more pre-defined rules, wherein the second data access mode comprises a data read only privilege. (Supp. Appeal Br. 2 (Claims Appendix).) REFERENCES The prior art relied upon by the Examiner in rejecting the claims on appeal is: D’Athis US 2007/0101090 A1 May 3, 2007 (“D’Athis”) Zhang et al. US 2010/0250832 A1 Sept. 30, 2010 (“Zhang”) REJECTION4 The Examiner made the following rejection: Claims 1, 3–14, and 17–20 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Zhang in view of D’Athis. (Final Act. 7–17.)5 4 Claims 1, 3–14, and 17–20 were rejected under 35 U.S.C. § 101 as directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more. (Final Act. 4–6.) However, this rejection was withdrawn in the Examiner’s Answer and is no longer pending on appeal. (Ans. 2.) 5 The Examiner’s rejection incorrectly refers to America Invents Act (“AIA”) § 103 instead of pre-America Invents Act (“pre-AIA”) § 103(a). (See Final Act. 7.) We are aware of no prejudice to Appellant or the Examiner resulting from this error, and thus we consider this to be harmless error. Appeal 2019-006230 Application 14/194,222 4 ANALYSIS With respect to independent claim 1, the Examiner finds Zhang’s storage service device indexes and stores, in a memory, indexed data as a “first data index” (Zhang’s index page of a first memory module of the service device) that “is assigned with a first data access mode . . . compris[ing] a data write only privilege,” as claimed. (Final Act. 7–8 (citing Zhang ¶¶ 9, 11).) The Examiner also finds Zhang synchronizes the “first data index” with a “second data index” (Zhang’s index page of a second memory module of the service device) that “is assigned with a second data access mode different than the first data access mode,” as claimed. (Id. at 8 (citing Zhang ¶ 25).) The Examiner acknowledges “Zhang does not teach ‘before synchronizing the second data index, interchange the first data access mode of the first data index with the second data access mode of the second data index’” but asserts D’Athis teaches an interchange of read and write privileges. (Id. at 8–9 (citing D’Athis ¶¶ 34–41).) The Examiner reasons that “[i]t would have been obvious to modify Zhang, as taught by D’Athis because the first access mode of data write privilege is interchanged with second data access mode of data read only privilege and vice versa.” (See id. at 9.) We do not agree. We agree with Appellant that Zhang and D’Athis, alone or in combination, fail to teach or suggest “before synchronizing the second data index, interchange the first data access mode of the first data index with the second data access mode of the second data index,” as recited in claim 1. (Appeal Br. 19–22; Reply Br. 2, 4–7.) As recognized by the Examiner, (i) Zhang does not teach interchanging data access modes (see Final Act. 8), and as Appellant explains, D’Athis (ii) does not make up for the deficiencies Appeal 2019-006230 Application 14/194,222 5 of Zhang, and (iii) even if combined with Zhang, would not lead a skilled artisan to the claimed interchanging before synchronizing (see Appeal Br. 19–22). More particularly, as Appellant explains, claim 1 requires an interchange between data access modes of first and second data indices stored in the same memory. (Appeal Br. 18–19.) In contrast, D’Athis merely discloses “modify[ing] the value of a key and/or the coding data for the sector access rights” so that different entities (e.g., vending machines and validation machines) can access (e.g., read or write to) a chip card/travel pass in accordance with the entities’ assigned access rights—e.g., a vending machine has different assigned access rights than a validation machine, as “the vending machine writes the data concerning the contract (characteristics of the route, subscription period, etc.)” to the travel card, while “validation machines do not alter the contract data, but they need to be able to access it in read mode.” (See D’Athis ¶¶ 29, 30–31, 34, 44–47, 53–54; Appeal Br. 18–19, 22.) D’Athis does not disclose a processor performing an interchange between data access modes (e.g., read and write) of different data indices stored on the travel card. (See Appeal Br. 19, 22.) Thus, we disagree with the Examiner’s assertion that “D’Athis [0034–0041] teaches interchanging of data access modes between the first data and second data index. . . . the access mode of data write privileges is interchanged with data access mode of data read only privilege and vice versa” (see Ans. 6–7). The Examiner’s additional reference to D’Athis’ “data interchanges” (see Ans. 7 (citing D’Athis ¶ 5)) is not germane to the interchange as recited in claim 1. (See D’Athis ¶ 5 (describing “contactless chip cards used in the transport Appeal 2019-006230 Application 14/194,222 6 domain [that] normally comply with the standard ISO1443 concerning data interchanges (modulation, carrier)”).) The Examiner’s rejection has also failed to provide an adequate reason based on rational underpinnings to explain why a skilled artisan would have been led by D’Athis to modify Zhang to perform an “interchange [of] the first data access mode of the first data index with the second data access mode of the second data index,” as claimed. (Appeal Br. 20–22.) The Examiner asserts the combination of D’Athis and Zhang would lead to claim 1 because “[i]t would have been obvious to modify Zhang, as taught by D’Athis because the first access mode of data write privilege is interchanged with second data access mode of data read only privilege and vice versa.” (See Final Act. 9; see also Ans. 7–8 (asserting obviousness of claim 1 by virtue of adding D’Athis’ “feature of data access privileges”).) We disagree with the Examiner’s reasoning, which relies upon Examiner’s assertion that D’Athis teaches interchanging of data access modes/privileges. As discussed supra, we disagree with Examiner’s assertion that D’Athis teaches such interchanges. Moreover, as Appellant explains, [even] if D’Athis is considered to teach or suggest something even peripherally related to [interchanging access modes] . . . the identified rationale for combining the references is based on a purported benefit realized in the specific system of D’Athis but fails to consider whether that same benefit would actually be realized in the system of Zhang if hypothetically modified. (Appeal Br. 20–21.) We agree with Appellant that the Examiner’s proffered rationale to modify Zhang to arrive at the claimed “interchange” (see Final Act. 9, Ans. 7–8) is not sufficient, and Appeal 2019-006230 Application 14/194,222 7 is merely a conclusory statement of a hypothetical result that would occur rather than a reason why achieving that result would have made it obvious to combine the references as proposed. . . . this reason is inapplicable to the operation of Zhang and does not result to combine the elements in the way the claimed new invention does. . . . [I]n Zhang, when a power failure occurs a specific backup procedure of configuration data is envisioned that tries to ensure that two separately maintained index pages are automatically synchronized and stored in separate flash memories. During this backup procedure, the power has failed and battery power is invoked so that each memory module can synchronize with one another. The memory chip access procedures of D’Athis allow different users with different access codes to have different access privileges to the same memory location in the memory chip. The synchronization techniques of Zhang rely on both reading and storing data related to the different index pages maintained by the different controllers. Limiting the data access modes in Zhang to read-only or write-only are inapplicable and do not involve or rely on any access codes or other such data. Therefore, it would not have been obvious to modify the system of Zhang to include the variable access privilege techniques of D’Athis because no improvement or benefit to the system of Zhang would have been realized. (See Appeal Br. 21–22.) The Examiner’s Answer does not address Appellant’s arguments (see supra), and also does not account for D’Athis’ deficiencies (e.g., no teaching of “interchange” between data access modes). As the Examiner has not identified a sufficient reason that would prompt a skilled artisan to modify Zhang based on D’Athis to achieve the claimed “interchange,” we do not sustain the Examiner obviousness rejection of independent claim 1, and claims 3–13 dependent therefrom. We also do not sustain the Examiner’s obviousness rejection of independent claims 14 (reciting “interchanging, by the computer, the first data access Appeal 2019-006230 Application 14/194,222 8 mode of first data index with the second data access mode of the second data index” before “synchronizing by the computer”) and 20 (reciting aspects of an interchanging operation before synchronizing, as “assigning, by the computer, the second data access mode to the first data index; the first data access mode to the second data index,” and aspects of an interchanging operation after synchronizing, as “assigning, by the computer, the first data access mode to the first data index; the second data access mode to the second data index”). (See Appeal Br. 23–24 (discussing “the periodic nature of the manner in which the data access modes are interchanged between the two indices so that one index is available for receiving queries and one index is available for updating” in claim 20).) We also do not sustain the Examiner’s obviousness rejection of claims 17–19 dependent from claim 14. CONCLUSION The Examiner erred in rejecting claims 1, 3–14, and 17–20 based upon obviousness. DECISION For the above reasons, we REVERSE the Examiner’s obviousness rejection of claims 1, 3–14, and 17–20 under 35 U.S.C. § 103(a). In summary: Claims Rejected 35 U.S.C. § Reference(s)/Basis Affirmed Reversed 1, 3–14, 17–20 103(a) Zhang, D’Athis 1, 3–14, 17–20 REVERSED