Avalanche Technology, Inc.

Patent Trials and Appeals BoardMay 27, 2021

2020004354 (P.T.A.B. May. 27, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 16/024,601 06/29/2018 Hongxin Yang AVALANCHE-0184US 6474 16708 7590 05/27/2021 Bing K Yen P.O.Box 1538 Cupertino, CA 95015 EXAMINER MOVVA, AMAR ART UNIT PAPER NUMBER 2898 NOTIFICATION DATE DELIVERY MODE 05/27/2021 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): bing.k.yen@gmail.com bing@avalanche-technology.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte HONGXIN YANG and BING K. YEN Appeal 2020-004354 Application 16/024,601 Technology Center 2800 Before ADRIENE LEPIANE HANLON, BEVERLY A. FRANKLIN, and JAMES C. HOUSEL, Administrative Patent Judges. Opinion for the Board filed by Administrative Patent Judge FRANKLIN. Opinion Concurring filed by Administrative Patent Judge HOUSEL. FRANKLIN, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the Examiner’s decision to reject claims 1–7 and 13–16. We have jurisdiction under 35 U.S.C. § 6(b). 1 We use the word Appellant to refer to “applicant” as defined in 37 C.F.R. § 1.42(a). Appellant identifies the real party in interest as Avalanche Technology, Incorporated. Appeal Br. 2. Appeal 2020-004354 Application 16/024,601 2 We REVERSE. CLAIMED SUBJECT MATTER Claims 1 and 5 are illustrative of Appellant’s subject matter on appeal and is set forth below: 1. A magnetic memory array comprising: an array of magnetic memory elements arranged in rows and columns; a plurality of first conductive lines formed beneath the array of magnetic memory elements, each of the plurality of first conductive lines connected to a respective row of the array of magnetic memory elements along a row direction; and a plurality of composite lines formed above the array of magnetic memory elements, each of the plurality of composite lines including a volatile switching layer connected to a respective column of the array of magnetic memory elements along a column direction and an electrode layer formed on top of the volatile switching layer. 5. A magnetic memory array comprising: an array of magnetic memory elements arranged in rows and columns; a plurality of first conductive lines formed beneath the array of magnetic memory elements, each of the plurality of first conductive lines connected to a respective row of the array of magnetic memory elements along a row direction; a sheet of volatile switching layer formed on top of the array of magnetic memory elements and covering the array of magnetic memory elements along the row direction and a column direction; and a plurality of electrode lines formed on top of the sheet of volatile switching layer, each of the plurality of electrode lines aligned to a respective column of the array of magnetic memory elements along the column direction. Appeal 2020-004354 Application 16/024,601 3 REFERENCES2 The prior art relied upon by the Examiner is: Name Reference Date Tadepalli US 2014/0254245 A1 Sept. 11, 2014 Hsu US 2017/0148851 A1 May 25, 2017 THE REJECTIONS3 1. Claims 1–4, 13, and 14 are rejected under 35 U.S.C. § 103 as being unpatentable over Hsu in view of Tadepalli. Final Act. 2. 2. Claims 5–7, 15, and 16 are rejected under 35 U.S.C. § 103 as being unpatentable over Hsu in view of Tadepalli. Final Act. 5. OPINION We review the appealed rejections for error based upon the issues identified by Appellant and in light of the arguments and evidence produced thereon. Ex parte Frye, 94 USPQ2d 1072, 1075 (BPAI 2010) (precedential), cited with approval in In re Jung, 637 F.3d 1356, 1365 (Fed. Cir. 2011) (“[I]t has long been the Board’s practice to require an applicant to identify the alleged error in the examiner’s rejections.”). After considering the evidence presented in this Appeal (including the Examiner’s Answer, the Appeal 2 The Examiner introduces discussion of Lin (US 2004/0160251 A1, published August 19, 2004) in the Answer for the first time. Ans. 6. This reference is not included here because it was not made part of Rejections 1 or Rejection 2. 3 We note that on page 2 of the Appeal Brief, Appellant states that claims 1– 7 and 13–16 stand rejected, and claims 1–7 are on appeal. Claims 13 and 14 depend upon claim 1. Claims 15 and 16 depend upon claim 5. Appeal 2020-004354 Application 16/024,601 4 Brief, and the Reply Brief), we are persuaded that Appellant identifies reversible error. Thus, we reverse the Examiner’s rejections for essentially the reasons stated by Appellant in the record with the following emphasis. We agree with Appellant that the references of Hus and Tadepalli are not properly combinable for the reasons stated on pages 9–10 of the Appeal Brief and on pages 3–5 of the Reply Brief. We are persuaded by Appellant’s argument that the unidirectional diode devices of Tadepalli are not compatible with any of the 3D memory structures Hsu incorporating magnetic memory elements, for the reasons stated therein. As explained by Appellant (Reply Br. 4–5) Tadepalli discloses a field-switching MRAM device (Fig. 3, 42) that uses magnetic fields generated by external program lines (Fig. 3, 44) to write the magnetic memory element (Fig. lb, 12), in contrast with the MRAM of Hsu. We also agree with Appellant that the Examiner’s discussion of the Lin reference does not rectify the incompatibility issues of Hsu in view of Tadepalli. Reply Br. 4–5. In view of the above, we reverse Rejections 1 and 2. CONCLUSION We reverse the Examiner’s decision. DECISION SUMMARY In summary: Claims Rejected 35 U.S.C. § Reference(s)/Basis Affirmed Reversed 1-4, 13, 14 103 Hsu, Tadepalli 1-4, 13, 14 5-7, 15, 16 103 Hsu, Tadepalli 5-7, 15, 16 Appeal 2020-004354 Application 16/024,601 5 Overall Outcome 1–7, 13–16 REVERSED HOUSEL, Administrative Patent Judge, concurring. I concur completely with the majority opinion reversing the Examiner’s obviousness rejections based on Hsu and Tadepalli. I write separately to express my view that, under the broadest reasonable interpretation standard, Tadepalli represents an anticipatory teaching with respect to the subject matter of claim 1. It is well established that “the PTO must give claims their broadest reasonable construction consistent with the specification . . . Therefore, we look to the specification to see if it provides Appeal 2020-004354 Application 16/024,601 6 a definition for claim terms, but otherwise apply a broad interpretation.” In re ICON Health & Fitness, Inc., 496 F.3d 1374, 1379 (Fed. Cir. 2007). The broadest reasonable interpretation rule recognizes that before a patent is granted the claims are readily amended as a part of the examination process and that an applicant has the opportunity and responsibility to remove any ambiguity in claim meaning by making an amendment. In re Bigio, 381 F.3d 1320, 1324 (Fed. Cir. 2004). Specifically, Tadepalli discloses a magnetic memory array comprising an array of magnetic memory elements (magnetic tunnel junctions 12) arranged in rows and columns, a plurality of first conductive lines (bit lines 32) formed beneath the array of magnetic memory elements, each of the plurality of first conductive lines connected to a respective row of the array of magnetic memory elements along a row direction (see Fig. 2); and a plurality of composite lines (diodes 40 combined with word lines 34) formed above the array of magnetic memory elements, each of the plurality of composite lines including a volatile switching layer (central oxide layer 18) connected to a respective column of the array of magnetic memory elements along a column direction and an electrode layer (word lines 34) formed on top of the volatile switching layer. Tadepalli ¶¶ 50, 51, 53, 56; Figs. 1b and 2. In this regard, we note that Appellant teaches that memory elements of a magnetic random access memory (“MRAM”) normally includes a magnetic reference layer and a magnetic free layer separated by an electron tunnel junction layer, which collectively form a magnetic tunneling junction. Spec. ¶ 4. As such, Tadepalli’s magnetic tunnel junctions 12 correspond to Appeal 2020-004354 Application 16/024,601 7 the magnetic memory elements recited in claim 1. Moreover, Appellant discloses that the volatile switching layer “may be made of a nominally insulating material or any suitable material that switches its resistance in the presence of an applied field or current.” Id. ¶ 38. Appellant discloses that the volatile switching layer may be made from MgOx or AlOx or ZrOx, all of which are disclosed as suitable materials for Tadepalli’s central oxide layer 18. Id.; Tadepalli ¶¶ 51, 53. We further note that although claim 1 recites composite lines including the volatile switching layer and an electrode layer, neither the claim nor the Specification require that either layer be continuous from one column to the next. Tadepalli’s word lines 34 are connected to each column of the array of magnetic memory elements 12 along a column direction and may include the central oxide layers 18 of each column, even though these oxide layers do not also run continuously from column to column. In other words, claim 1 is not limited to the structure shown in Appellant’s Figure 20, but more broadly encompasses Tadepalli’s structure. Accordingly, in my view, Tadepalli anticipates the magnetic memory array of claim 1. I leave it to the Examiner and Appellant to address Tadepalli’s applicability to the remaining claims on appeal.