Advanced Micro Devices, Inc.

Patent Trials and Appeals BoardApr 2, 2021

2019004770 (P.T.A.B. Apr. 2, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 14/747,933 06/23/2015 David Andrew Roberts 1458-140119 8658 109712 7590 04/02/2021 Advanced Micro Devices, Inc. c/o Davidson Sheehan LLP 6836 Austin Center Blvd. Suite 320 Austin, TX 78731 EXAMINER YU, JAE UN ART UNIT PAPER NUMBER 2135 NOTIFICATION DATE DELIVERY MODE 04/02/2021 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): AMD@DS-patent.com docketing@ds-patent.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte DAVID ANDREW ROBERTS, MITESH R. MESWANI, SERGEY BLAGODUROV, DMITRI YUDANOV, and INDRANI PAUL Appeal 2019-004770 Application 14/747,933 Technology Center 2100 Before ST. JOHN COURTENAY III, JOYCE CRAIG, and SCOTT E. BAIN, Administrative Patent Judges. BAIN, Administrative Patent Judge. DECISION ON APPEAL Appellant1 appeals under 35 U.S.C. § 134(a) from the Examiner’s decision to reject claims 1–20, which constitute all the claims pending in this application. We have jurisdiction under 35 U.S.C. § 6(b). We AFFIRM. 1 We use the word “Appellant” to refer to “applicant” as defined in 37 C.F.R. § 1.42(a). Appellant identifies the real party in interest as Advanced Micro Devices, Inc. Appeal Br. 1. Appeal 2019-004770 Application 14/747,933 2 BACKGROUND The Claimed Invention The invention relates to memory management for processors, and specifically, to cache memory that uses prefetching to improve efficiency. Spec. ¶ 2. Claims 1, 10, and 13 are independent. Claim 1 is illustrative of the invention and the subject matter in dispute, and is reproduced below: 1. A method, comprising: prefetching data to a first memory module by a first prefetcher of a plurality of prefetchers of a processor based on a first history of accesses to a first memory module; and prefetching data to a second memory module by a second prefetcher of the plurality of prefetchers of the processor based on a second history of accesses to the second memory module, the second history of accesses recorded independent of the first history of accesses, wherein each prefetcher of the plurality of prefetchers prefetches data for corresponding memory modules. Appeal Br. 11 (Claims App.). References The references relied upon by the Examiner are: Name Reference Date Kandaswamy et al. (“Kandaswamy”) US 2008/0243268 A1 Oct. 2, 2008 Scherr US 2002/0116585 A1 Aug. 22, 2002 Appeal 2019-004770 Application 14/747,933 3 The Rejections on Appeal Claims 1, 3–13, and 15–20 stand rejected under 35 U.S.C. § 103 as unpatentable over Applicant’s admitted prior art (“AAPA”) and Kandaswamy. Final Act. 2–4. Claims 2 and 14 stand rejected under 35 U.S.C. § 103 as unpatentable over AAPA, Kandaswamy, and Scherr. Final Act. 4–5. DISCUSSION We have reviewed the Examiner’s rejections in light of Appellant’s arguments presented in this appeal. Arguments that Appellant could have made but did not make in the Briefs are deemed to be waived. See 37 C.F.R. § 41.37(c)(1)(iv). For the reasons discussed below, Appellant has not persuaded us of error. We adopt as our own the findings and reasons set forth in the rejections and in the Examiner’s Answer. We provide the following for highlighting and emphasis. Appellant argues the Examiner erred in finding the prior art teaches or suggests prefetching to a first memory “based on a first history of accesses” and prefetching to a second memory based on a second history of accesses “recorded independent[ly],” as recited in claim 1. Appeal Br. 4–7; Reply Br. 2–3. Specifically, Appellant argues the Examiner relies on AAPA (paragraph 2 of Appellant’s Specification), but that the AAPA only describes “using a pattern of demand requests” to move data speculatively into a cache. Reply Br. 2; Spec. ¶ 2. We, however, are unpersuaded of error. As the Examiner finds, one of ordinary skill in the art would have understood the AAPA’s description of a “pattern of demand requests” as Appeal 2019-004770 Application 14/747,933 4 being past requests, i.e., teaching a history of accesses. Ans. 6. Appellant does not identify any error in this finding. In addition, the Examiner relies on Kandaswamy’s teaching of a plurality of prefetchers, i.e., first and second prefetchers, as recited in claim 1. Id.; Kandaswamy ¶ 18. Thus, we discern no error in the Examiner’s finding that the combination of AAPA and Kandaswamy teaches or suggests the recited first and second prefetching operations. Although Kandaswamy discloses only a single “controller” for the “plurality of pre-fetchers,” the existence of a single controller does not preclude the recording of “independent” access histories, as recited in claim 1. Ans. 6. Neither claim 1 nor the Specification limit “independent” recording to anything beyond the existence of multiple recorded histories, as taught in Kandaswarmy and the AAPA (paragraph 2 in the Background of Appellant’s Specification). Ans. 6; In re Am. Acad. of Sci. Tech Ctr., 367 F.3d 1359, 1364 (Fed. Cir. 2004) (claim terms given their “their broadest reasonable interpretation consistent with the specification”). Moreover, Appellant’s argument directed to the AAPA alone is not persuasive of error, because the Examiner relied on the combination of AAPA with Kandaswarmy. See, e.g., In re Merck & Co., Inc., 800 F.2d 1091, 1097 (Fed. Cir. 1986) (“Non-obviousness cannot be established by attacking references individually where the rejection is based upon the teachings of a combination of references.”). Accordingly, we are unpersuaded of error regarding the Examiner’s rejection of claim 1. For similar reasons, we are unpersuaded of error regarding dependent claim 2, which further recites communicating “hints” based on the first Appeal 2019-004770 Application 14/747,933 5 history of accesses. As the Examiner finds, the AAPA discloses analyzing “patterns” of access, i.e., history of access, and Scherr teaches using hints in prefetching, such as “time-currency, page usage frequency, charging considerations, prefetching algorithms, data-usage patterns . . . among others.” Ans. 6 (citing Scherr Abstract). We, therefore, sustain the obviousness rejections of claims 1 and 2. The remaining claims are not argued separately, and Appellant has not demonstrated error as to those claims. We, therefore, also sustain the obviousness rejections of the remaining claims. CONCLUSION For the foregoing reasons, we affirm the Examiner’s decision rejecting claims 1–20. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R. § 1.136(a)(1)(iv). DECISION SUMMARY In summary: Claim(s) Rejected 35 U.S.C. § Reference(s)/Basis Affirmed Reversed 1, 3–13, 15– 20 103 AAPA, Kandaswamy 1, 3–13, 15–20 2, 14 103 AAPA, Kandaswamy, Scherr 2, 14 Overall Outcome 1–20 AFFIRMED