Advanced Micro Devices, Inc.

Patent Trials and Appeals Board

May 26, 2021

2021000351 (P.T.A.B. May. 26, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/797,702 10/30/2017 Benedict R. Gaster AMD-120347-US-CNT 5570
25310 7590 05/26/2021
Volpe Koenig
DEPT. AMD
30 SOUTH 17TH STREET -18TH FLOOR
PHILADELPHIA, PA 19103
EXAMINER
ASHLEY, BRUCE S
ART UNIT PAPER NUMBER
2494
NOTIFICATION DATE DELIVERY MODE
05/26/2021 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
eoffice@volpe-koenig.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________________

Ex parte BENEDICT R. GASTER and LEE W. HOWES
____________________

Appeal 2021-000351
Application 15/797,702
Technology Center 2400
____________________

Before JOSEPH L. DIXON, ST. JOHN COURTENAY III, and
JAMES W. DEJMEK, Administrative Patent Judges.

DEJMEK, Administrative Patent Judge.

DECISION ON APPEAL
Appellant1 appeals under 35 U.S.C. § 134(a) from a Final Rejection of
claims 1–18. The Examiner has withdrawn the rejection of claims 2 and 11.
See Ans. 3. Accordingly, only the rejections of claims 1, 3–10, and 12–18
are before us. Oral arguments were heard on May 10, 2021. A transcript of
the hearing will be placed in the record in due course. We have jurisdiction
over the pending claims under 35 U.S.C. § 6(b).
We affirm.

1 Throughout this Decision, we use the word “Appellant” to refer to
“applicant” as defined in 37 C.F.R. § 1.42 (2019). Appellant identifies
Advanced Micro Devices, Inc. as the real party in interest. Appeal Br. 3.
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STATEMENT OF THE CASE
Introduction
Appellant’s disclosed and claimed invention generally relates to
managing memory in a heterogeneous computing environment. See Spec.
¶¶ 2, 6, 15–18. In a disclosed embodiment, a heterogeneous parallel
primitives (HPP) programming model is used. Spec. ¶ 30. According to the
Specification, “HPP is a braided parallel programming model that supports
task and data parallelism, and solidifies flexibility and composability
concepts that have been lacking in the conventional programming models.”
Spec. ¶ 30.
Claims 1 and 10 are independent. Claim 1 is representative (see
Appeal Br. 9–10, 12; see also 37 C.F.R. § 41.37(c)(1)(iv)) of the subject
matter on appeal and is reproduced below:
1. A method for improving memory utilization in a
heterogeneous computing platform, the method comprising:
generating an unbound distributed array in a plurality of
memories of different types included in the heterogeneous
computing platform, wherein the unbound distributed array
permits linear access to an entirety of the unbound distributed
array;
binding the unbound distributed array to a kernel to form
a bound array, wherein the kernel is configured to execute a
plurality of workgroups on processors that are included in the
heterogeneous computing platform;
segmenting the bound array to form a plurality of bound
segments, wherein a particular bound segment is accessible by a
particular workgroup and inaccessible by other workgroups in
the plurality of workgroups; and
accessing the plurality of bound segments when the kernel
executes the plurality of workgroups.

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The Examiner’s Rejections
1. Claims 1, 9, 10, and 18 stand rejected under pre-AIA 35 U.S.C.
§ 103(a) as being unpatentable over Vaidyanathan et al. (US 2010/0287279
A1; Nov. 11, 2010) (“Vaidyanathan”); Clohset et al. (US 2012/0139926 A1;
June 7, 2012) (“Clohset”); and Sato et al. (US 6,681,388 B1; Jan. 20, 2004)
(“Sato”). Final Act. 3–7.
2. Claims 3–5 and 12–14 stand rejected under pre-AIA 35 U.S.C.
§ 103(a) as being unpatentable over Vaidyanathan, Clohset, Sato, and Jula et
al. (US 8,635,626 B2; Jan. 21, 2014) (“Jula”). Final Act. 8–10.
3. Claims 6–8 and 15–17 stand rejected under pre-AIA 35 U.S.C.
§ 103(a) as being unpatentable over Vaidyanathan, Clohset, Sato, Jula, and
Cho et al. (US 2011/0161944 A1; June 30, 2011) (“Cho”). Final Act. 10–
12.

ANALYSIS2
Claims 1, 9, 10, and 18
Appellant disputes the Examiner’s findings that Clohset teaches
generating an unbound distributed array or binding an unbound distributed
array to a kernel as recited in claim 1. Appeal Br. 8–10; Reply Br. 6–7. In
particular, Appellant argues Clohset merely describes that “upon request, a
local storage allocation is made,” but that Clohset does not teach the claimed
unbound distributed array, that the storage allocations are considered a

2 Throughout this Decision, we have considered the Appeal Brief, filed
June 10, 2020 (“Appeal Br.”); the Reply Brief, filed October 16, 2020
(“Reply Br.”); the Examiner’s Answer, mailed August 17, 2020 (“Ans.”);
and the Final Office Action, mailed November 18, 2019 (“Final Act.”), from
which this Appeal is taken.
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singular array, or that the storage allocations permit linear access to an
entirety of the unbound distributed array. Appeal Br. 8–9; Reply Br. 4–6. In
addition, Appellant argues the profiling in Clohset, which the Examiner
finds teaches the claimed binding, occurs on individual code module
instances, as opposed to a kernel executing a plurality of workgroups on
processors of the recited heterogeneous computing platform. Reply Br. 6–7.
Further, Appellant asserts that Sato does not cure the alleged
deficiencies of Clohset. Appeal Br. 10; Reply Br. 7. Moreover, Appellant
argues Sato fails to teach that its subarrays that belong to a processor are
inaccessible by other processors. Appeal Br. 10–11; Reply Br. 7–8.
Appellant also argues that Sato’s processor “is not the same thing as a
recited workgroup.” Appeal Br. 11.
In rejecting claim 1, inter alia, the Examiner finds Vaidyanathan
teaches a method for improving memory utilization in a heterogeneous
computing platform. Final Act. 3–4 (citing Vaidyanathan ¶¶ 27, 51). The
heterogeneous computing platform includes one or more heterogeneous
processor systems and a plurality of memories of different types. Final
Act. 3–4 (citing Vaidyanathan ¶¶ 27, 51). Appellant does not dispute these
findings.
Clohset relates to multiprocessing using memory allocation in
distributed memories. See Clohset, Title; see also Clohset ¶¶ 34, 38.
Clohset describes that “multiprocessing comprises a plurality of processing
units” and that the disclosed system “comprises an allocator operable to
allocate local memory space to instances of program elements to be executed
in the plurality of processing units.” Clohset ¶ 38. Clohset describes the
instances of program elements as comprising instances of a plurality of types
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of workloads. Clohset ¶ 38. Exemplary workloads include a recursive
instantiation of an existing instance of a program element or a new instance
of a program element. Clohset ¶ 38. Program elements “can be modules of
program code, [or] portions of a base of program code.” Clohset ¶ 39.
Clohset further teaches profiling code module instances as a mechanism to
characterize the instances and determine “how and on what resources the
computation instances will be executed.” Clohset ¶ 186. For example, a
local storage (i.e., memory) allocation may be determined based on profiling
the code module instance. Clohset ¶ 189.
The Examiner finds that profiling a code module instance to
determine a local storage allocation, as described by Clohset, teaches
binding the memory (i.e., the unbound distributed array) to a kernel. Ans. 4,
6. Moreover, the Examiner explains that code modules that have not been
profiled are unbound. Final Act. 4 (explaining that storage allocation for a
code module instance data set that had not been profiled teaches an unbound
distributed array); Ans. 4, 6. Further, the Examiner finds that by allocating
local memory space to instances of program elements to be executed in a
plurality of processing units, wherein the instances of program elements
comprise instances of a plurality of types of workloads, Clohset teaches
binding the unbound distributed array to a kernel, as recited in claim 1. See
Final Act. 4–5 (citing Clohset ¶¶ 38, 189); Ans. 6–7.
Regarding Clohset, we agree with the Examiner’s findings that prior
to instances of program elements being profiled, the local storage (i.e.,
memory) is not associated with, or unbound from the program elements. See
Clohset ¶ 189. Further, after the code modules have been profiled, the local
storage is bound to the program elements. See Clohset ¶ 189. Accordingly,
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we find Clohset teaches or reasonably suggests generating an unbound
distributed array, and biding the unbound distributed array to a kernel as
recited in claim 1.
In addition, contrary to Appellant’s arguments (see, e.g., Reply Br. 6–
7), we find Clohset teaches the profiled code modules are associated with a
plurality of workgroups executed on processors. In particular, Clohset
describes “[t]he system also comprises an allocator operable to allocate local
memory space to instances of program elements to be executed in the
plurality of processing units, where the instances comprise instances of a
plurality of types of workloads.” Clohset ¶ 38. Workloads may be new
instantiations of a program element or a recursive instantiation of an existing
instance of a program element. Clohset ¶ 38.
We note that in the Specification, Appellant defines a “kernel” as “a
program and/or processing logic that is executed as one or more workitems
in parallel having the same code base.” Spec. ¶ 37. Further, “[e]ach kernel
describes the execution of a single lane of execution called a workitem.”
Spec. ¶ 37. Workitems may be organized into workgroups of one or more.
Spec. ¶ 39.
Consistent with Appellant’s Specification, we agree with the
Examiner that Clohset teaches “binding the unbound distributed array to a
kernel to form a bound array, wherein the kernel is configured to execute a
plurality of workgroups on processors.”
Regarding Appellant’s argument that “there is no indication that such
local storage allocations [(in Clohset)] are considered a singular array”
(Appeal Br. 8) or a “singular distributed array” (Reply Br. 5, emphasis
omitted), we note that the claim does not recite a “singular array” or a
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“singular distributed array.” As such, this argument is not persuasive of
Examiner error. See In re Self, 671 F.2d 1344, 1348 (CCPA 1982)
(limitations not appearing in the claims cannot be relied upon for
patentability).
To the extent Appellant asserts Clohset does not teach an unbound
distributed array that permits linear access to an entirety of the unbound
distributed array (see Appeal Br. 8–9; Reply Br. 5–6), we note that the
Examiner relies on Sato (rather than Clohset) to teach linear accessibility /
linear addressability of the array. Ans. 5–6 (citing Sato, col. 6, ll. 57–63
(sic: Sato, col. 5, ll. 57–63)).
Sato generally relates to rearranging array data into sub-arrays of
consecutively addressed elements for distributed processing. See Sato, Title.
In particular, Sato describes “a data rearranging method for performing a
distribution processing of an array in a multi processor system including a
plurality of processors each of which has an independent memory . . . and
rearranging [a] sequence of array elements so that the array elements within
each . . . subarray possess consecutive addresses.” Sato, col. 2, ll. 25–38.
As an initial matter, the Examiner notes that the claim merely requires
that the array permits linear access and that other accessing schemes are not
precluded. Ans. 5. The Examiner finds Sato’s disclosure of linearly
addressing a software array in memory teaches the memory array may be
linearly accessed. Ans. 5–6.
Contrary to Appellant’s argument that the cited portion of Sato only
states that an array is partitioned into multiple elements (see Reply Br. 6),
we note that Sato further describes the array dimensions, including that the
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“addresses are consecutive.” Sato, col. 5, ll. 57–63. Accordingly, we agree
with the Examiner’s finding.
Regarding Appellant’s argument that Sato fails to teach that a
subarray that belongs to a processor is inaccessible to other processors (see
Appeal Br. 11), we are unpersuaded of Examiner error. As the Examiner
explains, Sato describes that the subarrays are assigned to only one
processor and that there is no sharing of data with the caches in the other
processors. Ans. 8 (citing Sato, col. 2, ll. 25–38, col. 28, ll. 47–49). Thus,
workgroups being executed on other processors do not access the subarray to
which another processor has been assigned.
For the reasons discussed supra, we are unpersuaded of Examiner
error. Accordingly, we sustain the Examiner’s rejection of independent
claim 1. For similar reasons, we also sustain the Examiner’s rejection of
independent claim 10, which recites similar limitations and was not argued
separately. See Appeal Br. 9–10, 12; see also 37 C.F.R. § 41.37(c)(1)(iv).
Additionally, we sustain the Examiner’s rejection of claims 9 and 18, which
depend from independent claims 1 and 10, respectively, and were not argued
separately. See Appeal Br. 12; see also 37 C.F.R. § 41.37(c)(1)(iv).

Claims 3–8 and 12–17
Appellant does not present separate arguments with respect to the
Examiner’s rejections of dependent claims 3–8 and 12–17. Thus, for similar
reasons to those discussed supra, we sustain the Examiner’s rejections of
claims 3–8 and 12–17. See 37 C.F.R. § 41.37(c)(1)(iv).

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CONCLUSION
We affirm the Examiner’s decision rejecting claims 1, 3–10, and 12–
18 under pre-AIA 35 U.S.C. § 103(a).

DECISION SUMMARY
Claim(s)
Rejected
35 U.S.C. § Reference(s)/Basis Affirmed Reversed
1, 9, 10, 18 103(a) Vaidyanathan,
Clohset, Sato
1, 9, 10, 18
3–5, 12–14 103(a) Vaidyanathan,
Clohset, Sato, Jula
3–5, 12–14
6–8, 15–17 103(a) Vaidyanathan,
Clohset, Sato, Jula,
Cho
6–8, 15–17
Overall
Outcome
1, 3–10,
12–18

TIME PERIOD FOR RESPONSE
No time period for taking any subsequent action in connection with
this appeal may be extended. 37 C.F.R. § 1.136(a)(1)(iv); see 37 C.F.R.
§ 41.50(f).

AFFIRMED