ACQIS LLC

Patent Trials and Appeals BoardOct 7, 2021

IPR2021-00670 (P.T.A.B. Oct. 7, 2021)

Trials@uspto.gov Paper 8 571-272-7822 Date: October 7, 2021 UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ SAMSUNG ELECTRONICS CO., LTD. and SAMSUNG ELECTRONICS AMERICA, INC., Petitioner, v. ACQIS LLC, Patent Owner. ____________ IPR2021-00670 Patent RE45,140 E ____________ Before THU A. DANG, JONI Y. CHANG, and PATRICK M. BOUCHER, Administrative Patent Judges. CHANG, Administrative Patent Judge. DECISION Denying Institution of Inter Partes Review 35 U.S.C. § 314 IPR2021-00670 Patent RE45,140 E 2 I. INTRODUCTION Samsung Electronics Co., Ltd. and Samsung Electronics America, Inc. (collectively, “Petitioner”) filed a Petition requesting an inter partes review (“IPR”) of claims 14−38 (“the challenged claims”) of U.S. Patent No. RE45,140 E (Ex. 1001, “the ’140 patent”). Paper 3 (“Pet.”), 3. ACQIS LLC (“Patent Owner”) filed a Preliminary Response (Paper 7, “Prelim. Resp.”). Under 35 U.S.C. § 314(a), an inter partes review may not be instituted unless the information presented in the petition “shows that there is a reasonable likelihood that the petitioner would prevail with respect to at least 1 of the claims challenged in the petition.” For the reasons stated below, we determine that Petitioner has not established a reasonable likelihood that it would prevail with respect to at least one claim. Accordingly, we do not institute an inter partes review. A. Related Matters The parties indicate that the ’140 patent is involved in Acqis LLC v. Samsung Electronics Co., Ltd., No. 2:20-cv-00295 (EDTX). Pet. 1; Paper 4, 1. The ’140 patent also is involved in IPR2021-00607. B. The ’140 Patent The ’140 patent relates to an interconnection between two physically separate units of a personal computer system. Ex. 1001, 14:5−7. The first unit, an attached computing module, contains the core computing power and environment for a computer user. Id. at 14:7−9. The second unit, a IPR2021-00670 Patent RE45,140 E 3 peripheral console, contains the power supply and primary input and output devices for the computer system. Id. at 14:9−11. The units are coupled together to form a fully functional personal computer system. Id. at 14:11−13. Figure 13 of the ’140 patent is reproduced below with annotations added by Petitioner highlighting the interconnection. Pet. 7. Annotated Figure 13 above shows a block diagram of a computer system using an interface. Id. at 18:30−40. As shown, computer system 1300 includes attached computer module (ACM) 1305 and peripheral console 1310. Id. at 18:41−42. ACM 1305 and peripheral console 1310 are interfaced through exchange interface system (XIS) bus 1315. Id. at 18:46−48. XIS bus 1315 includes power bus 1316, video bus 1317 and IPR2021-00670 Patent RE45,140 E 4 peripheral bus (XPBus) 1318, which is also referred to as an interface channel. Id. at 18:46−51. C. Illustrative Claim Of the challenged claims, claims 14, 18, 22, 26, 30, and 35 are independent. Claims 15−17 depend from claim 14; claims 19−21 depend from claim 18; claims 23−25 depend from claim 22; claims 27−29 depend from claim 26; claims 31−34 depend from claim 30; and claims 36−38 depend from claim 35. Claim 14 is illustrative: 14. A method of improving performance of a computer, comprising: obtaining an integrated Central Processing Unit (CPU) with a graphics controller in a single chip; connecting a Differential Signal channel directly to the integrated CPU and graphics controller to output video data; conveying Transition Minimized Differential Signaling (TDMS) signals through the Differential Signal channel; connecting memory directly to the integrated CPU and graphics controller; providing a connector for the computer for connection to a console; and providing a first Low Voltage Differential Signal (LVDS) channel to couple to the connector, the first LVDS channel comprising two unidirectional, serial bit channels that transmit data in opposite directions. Ex. 1001, 22:44–60. IPR2021-00670 Patent RE45,140 E 5 D. Prior Art Relied Upon Petitioner relies upon the references listed below (Pet. 4−7): Name Reference Date Exhibit No. Gulick U.S. Patent No. 6,690,676 Filed June 11, 1999 1004 Goodrum U.S. Patent No. 5,822,571 Issued Oct. 13, 1998 1006 McAlear U.S. Patent No. 6,389,029 Filed Nov. 10, 1998 1007 Sauber U.S. Patent No. 6,600,747 Filed Sept. 17, 1998 1009 E. Asserted Grounds of Unpatentability Petitioner asserts the following grounds of unpatentability (Pet. 7)1: Claims Challenged 35 U.S.C. § References 1 30−33, 35 103(a) Gulick, Goodrum 1 For purposes of this Decision, we assume the claims at issue have an effective filing date prior to March 16, 2013, the effective date of the Leahy-Smith America Invents Act, Pub. L. No. 112-29, 125 Stat. 284 (2011) (“AIA”), and we apply the pre-AIA versions of 35 U.S.C. §§ 102, 103 and 112. IPR2021-00670 Patent RE45,140 E 6 Claims Challenged 35 U.S.C. § References 2 14, 16−17, 38 103(a) Gulick, Goodrum, Sauber 3 18−20, 22−26, 28, 29, 34, 36, 37 103(a) Gulick, Goodrum, McAlear 4 15, 21, 27 103(a) Gulick, Goodrum, McAlear, Sauber II. ANALYSIS A. Claim Construction In an inter partes review, we construe a patent claim “using the same claim construction standard that would be used to construe the claim in a civil action under 35 U.S.C. § 282(b).” 37 C.F.R. § 42.100(b) (2019). Under this standard, the words of a claim generally are given their “ordinary and customary meaning,” which is the meaning the term would have to a person of ordinary skill at the time of the invention, in the context of the entire patent, including the specification. Phillips v. AWH Corp., 415 F.3d 1303, 1312–13 (Fed. Cir. 2005) (en banc). We note that only those claim terms that are in controversy need to be construed, and only to the extent necessary to resolve the controversy. See Nidec Motor Corp. v. Zhongshan Broad Ocean Motor Co., 868 F.3d 1013, 1017 (Fed. Cir. 2017) (noting that “we need only construe terms ‘that are in controversy, and only to the extent necessary to resolve the controversy’” (quoting Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999))). For purposes of this Decision, we find it necessary to address only the claim term “graphics controller.” IPR2021-00670 Patent RE45,140 E 7 “graphics controller” Claims 14, 18, 22, 26, 30, and 35 each require “an integrated Central Processing Unit (CPU) with a graphics controller in a single chip.” See, e.g., Ex. 1001, 22:46−47 (emphasis added). In its Petition, Petitioner does not expressly propose a construction for the term “graphics controller.” Pet. 10. Rather, in its prior art analysis, Petitioner implicitly construes “graphics controller” as a “graphics interface” by arguing that Gulick’s graphics interface 306 accounts for the claimed “graphics controller.” See, e.g., id. at 17−18. We are not persuaded that a “graphics controller” is merely a graphics interface in the context of the ’140 patent. As Patent Owner explains, “[t]he ‘graphics controller’ of the ’140 patent has graphics processing functionality, and is not just a connection to a separate component for processing graphics.” Prelim. Resp. 12 (emphasis added). Patent Owner’s declarant, Marc Levitt, Ph.D., testifies that a person of ordinary skill in the art would have recognized that a graphics interface is not a graphics controller because a graphics interface is “simply the interface for connecting an external graphics processor to the processor module” and the “graphics interface itself provides no actual graphics processing functionality.” Ex. 2001 ¶¶ 72−73. We credit Dr. Levitt’s testimony as it is consistent with the Specification and the general knowledge of an ordinarily skilled artisan. See, e.g., Ex. 1001, 19:10−13, Figs. 19, 20; Ex. 3001 (IEEE Dictionary), 3 (defining “interface” as “[a] hardware or software component IPR2021-00670 Patent RE45,140 E 8 that connects two or more other components for the purpose of passing information from one to the other”). Figure 20 of the ’140 patent is reproduced below with blue high-lightings added. Figure 20 of the ’140 patent above shows an “Integrated CPU with Core Logic, Graphics Accelerator & Interface Controller” on a single chip 2025. Ex. 1001, Fig. 20 (emphasis added). The Specification describes Figure 20 as showing “an attached computer module with single chip 2025 fully integrated: CPU, Cache, Core Logic, Graphics controller and Interface controller.” Id. at 5:31−33; 19:10−13 (emphasis added). Hence, the ’140 patent clearly equates a graphics controller with a graphics accelerator (highlighted in blue). Id. The Specification also describes a graphics subsystem as a processing unit having a graphics accelerator and graphics IPR2021-00670 Patent RE45,140 E 9 memory. See, e.g., Ex. 1001, 10:56−60 (“The graphics subsystem can include a graphics accelerator, graphics memory, and other devices.”). In addition, Petitioner and Petitioner’s declarant, Stephen Edwards, Ph.D., also acknowledge that a “graphics controller” performs graphics processing functions by arguing that Gulick’s “graphics interface 306 implements a graphics function on the processor module 301 . . . and as such a [person of ordinary skill in the art] would have understood that the graphics interface 306 is a graphics controller in the context of the ’140 Patent.” Pet. 17−18; Ex. 1003 ¶ 66 (emphasis added). In light of the Specification and the evidence before us, we construe “graphics controller” as “a processing unit having graphics processing functionality, not merely a graphics interface that connects two or more other components for the purpose of passing information from one to the other.” See Phillips, 415 F.3d at 1312−13. Our claim construction for “graphics controller” in this instant proceeding is consistent with our claim construction in the Decision Denying Institution in IPR2021-00668, which challenges a related patent. B. Principles of Law A patent claim is unpatentable under 35 U.S.C. § 103(a) if the differences between the claimed subject matter and the prior art are such that the subject matter, as a whole, “would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains.” KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 406 IPR2021-00670 Patent RE45,140 E 10 (2007). The question of obviousness is resolved on the basis of underlying factual determinations including: (1) the scope and content of the prior art; (2) any differences between the claimed subject matter and the prior art; (3) the level of ordinary skill in the art; and (4) objective evidence of non-obviousness.2 See Graham v. John Deere Co., 383 U.S. 1, 17–18 (1966). C. Level of Ordinary Skill in the Art In determining the level of ordinary skill in the art, various factors may be considered, including the “type of problems encountered in the art; prior art solutions to those problems; rapidity with which innovations are made; sophistication of the technology; and educational level of active workers in the field.” In re GPAC, Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995) (quotation marks omitted). Here, citing to the Declaration of Dr. Edwards for support, Petitioner asserts that a person of ordinary skill in the art of the ’140 patent would have had “at least a Master’s Degree in, or a Bachelor’s degree in electrical engineering, computer science, or a related subject.” Pet. 9−10 (citing Ex. 1003 ¶ 46). And such an artisan also would have had “three years of experience working with computer architecture, computer busses, and related technologies.” Id. (citing Ex. 1003 ¶ 46). “Patent Owner does not 2 Neither party presents evidence or arguments regarding objective evidence of non-obviousness in the instant proceeding at this time. IPR2021-00670 Patent RE45,140 E 11 dispute the level of skill for a person of ordinary skill in the art.” Prelim. Resp. 4. For purposes of this Decision, we adopt the level of ordinary skill as articulated by Petitioner because, based on the current record, this proposal appears to be consistent with the ’140 patent, prior art of record, and the testimony of Dr. Edwards. D. Brief Summaries of the Asserted Prior Art References 1. Gulick (Exhibit 1004) Gulick discloses a non-addressed packet structure connecting dedicated end points on a multi-pipe computer interconnect bus. Ex. 1004, code (57). Figure 3 of Gulick is reproduced below. IPR2021-00670 Patent RE45,140 E 12 Figure 3 of Gulick above shows a portion of a personal computer system that utilizes a communication link. Id. at 3:7−9. As shown, link 205 communicates between processor module 301 and interface module 303. Id. at 5:5−8. Bus 205 provides guaranteed bandwidth and latency to each isochronous stream such as random access memory digital-to-analog converter (RAMDAC) data, audio data, and IEEE 1394 isochronous streams while also attempting to minimize latency to asynchronous accesses such as CPU-initiated accesses and PCI-initiated accesses. Id. at 5:10−14. Processor module 301 includes link interface 305, which is coupled to link interface 307 in interface module 303. Id. at 5:8−9. Processor module 301 provides the major process function in the computer system and includes system memory controller 309, CPU 311, and graphics interface 306. Id. at 5:21−25. Interface module 303 provides an interface between various input/output devices such as video monitors, hard drives, scanners, printers, network connections, modems, and the processor module. Id. at 5:25−28. 2. Goodrum (Exhibit 1006) Goodrum discloses transmission of data between a first device and a second device connected by the communications channel in a computer system. Ex. 1006, code (57). Figure 1 of Goodrum is reproduced below with color high-lightings added by Patent Owner. Prelim. Resp. 10. IPR2021-00670 Patent RE45,140 E 13 Figure 1 above shows a block diagram of a computer system. Ex. 1006, 2:21. As shown, computer system 10 includes primary PCI bus 24 (green) that couples system controller/host bridge circuit 18 (yellow) to PCI-Extended Industry Standard Architecture (EISA) bridge 15 (blue). Id. at 5:7−22. Primary PCI bus 24 also is coupled to bridge chips 26a and 26b. Id. at 4:65−67. Bridge chip 26b is coupled to bridge chip 48b through cable 31 and bridge chip 26b is coupled to bridge chip 48b through cable 28. Id. at 4:67−5:6. Cables 28 and 31 connect to expansion boxes 30a and 30b. Id. at 5:7−43. In one embodiment, cable 28 is a cylindrical 50-pair shielded cable designed to support the High Performance Parallel Interface (HIPPI) standard. Id. at 57:22−24. Twenty wire pairs of cable 28 are used for IPR2021-00670 Patent RE45,140 E 14 downstream communication and 20 more for upstream communication. Id. at 58:8−9. For the remaining ten pairs in the 50-pair HIPPI cable 28, error detection and correction is not implemented. Id. at 58:10−14. 3. McAlear (Exhibit 1007) McAlear discloses local area networks incorporating universal serial bus protocol. Ex. 1007, code (57). In one of the embodiments, McAlear discloses that “computer 130 can also communicate with a USB device 100 or 180 by addressing the LAN hub 10 in the IP (or Ethernet) protocol and encapsulating the USB protocol within the IP (or Ethernet) protocol.” Id. at 40:35−38. Such as, “[a] plurality of USB packets destined to the USB device 100 or 180 (‘USB device packets’) are sent in a plurality of IP (or Ethernet) packets.” Id. at 40:38-41. 4. Sauber (Exhibit 1009) Sauber discloses a video monitor multiplexing circuit. Ex. 1009, code (54). Specifically, Sauber discloses video controller 109 that “transmits analog signals by first converting a digital video signal through a digital-to- analog converter (DAC).” Id. at 3:23−27. Sauber further discloses digital to differential circuit 220 that includes “a Low Voltage Differential Signaling (LVDS) transmitter or another suitable transmitter, such as a transmitter for Transition Minimized Differential Signaling (TMDS).” Id. at 4:1−5. IPR2021-00670 Patent RE45,140 E 15 E. Obviousness Based on Gulick and Goodrum Alone, or with Other References Petitioner asserts that claims 30−33 and 35 are unpatentable under § 103(a) as obvious over Gulick and Goodrum (Ground 1); claims 14, 16−17, and 38 are unpatentable under § 103(a) as obvious over Gulick, Goodrum, and Sauber (Ground 2); claims 18−20, 22−26, 28, 29, 34, 36, and 37 are unpatentable under § 103(a) as obvious over Gulick, Goodrum, and McAlear (Ground 3); and claims 15, 21, and 27 are unpatentable under § 103(a) as obvious over Gulick, Goodrum, McAlear, and Sauber (Ground 4). Pet. 10−49. Patent Owner opposes, arguing that, among other things, the asserted combinations of prior art do not teach or suggest all of the claim limitations. Prelim. Resp. 5−52. For the reasons stated below, we agree with Patent Owner and determine that Petitioner has not demonstrated a reasonable likelihood of prevailing in showing that those challenged claims are unpatentable under § 103(a). 1. “integrated Central Processing Unit (CPU) with a graphics controller in a single chip” Claims 14, 18, 22, 26, 30, and 35 each require “an integrated Central Processing Unit (CPU) with a graphics controller in a single chip” (hereafter “the ‘graphics controller’ limitation”). See, e.g., Ex. 1001, 22:46−47 (emphasis added). By virtue of their dependency, dependent claims 15−17, 19−21, 23−25, 27−29, 31−34, and 36−38 also require this limitation. As discussed above in our claim construction analysis, we construe “graphics controller” as “a processing unit having graphics processing functionality, IPR2021-00670 Patent RE45,140 E 16 not merely a graphics interface that connects two or more other components for the purpose of passing information from one to the other.” In its Petition, Petitioner relies on Gulick’s “graphics interface 306” to teach the claimed “graphics controller.” Pet. 17−18, 31, 33−34, 39, 43, 45. Specifically, Petitioner argues that Gulick discloses the claimed “graphics controller” limitation because Gulick’s processor module 301 includes CPU 311 and graphics interface 306. Id. (citing Ex. 1004, 5:4−7, 5:21−25, Fig. 3). Petitioner also contends that “graphics interface 306 implements a graphics function on the process module, . . . and as such a [person of ordinary skill in the art] would have understood that the graphics interface 306 is a graphics controller in the context of the ’140 Patent,” citing to Dr. Edwards’ testimony for support. Id. (citing Ex. 1004, 23:54−57; Ex. 1003 ¶ 66). As Dr. Levitt testifies, a person of ordinary skill in the art would have recognized that a graphics interface is not a graphic subsystem, because a graphics interface is “simply the interface for connecting an external graphics processor to the processor module,” and “[t]he graphics interface itself provides no actual graphics processing functionality.” Ex. 2001 ¶¶ 72−73. Consistent with Dr. Levitt’s testimony, Gulick’s Background Section describes that a graphics interface is merely the interface for connecting an external graphics processor to the processor module. Ex. 1004, 1:25−30, Fig. 1. For example, Gulick discloses a graphics interface (e.g., Advanced Graphics Port (AGP) interface) separate from a video/graphics processing IPR2021-00670 Patent RE45,140 E 17 unit. Figure 1 of Gulick is reproduced below (with high-lightings added by Patent Owner). Prelim. Resp. 15. Figure 1 of Gulick above shows north bridge 103 with AGP interface (yellow) separate from the video/graphics processing unit (blue), and connected by graphics bus 109 (green). Ex. 1004, 1:25−30. More significantly, Petitioner’s arguments are conclusory, not supported by sufficient evidence. Neither Petitioner nor Dr. Edwards explains sufficiently how Gulick’s graphics interface 306 provides any functionality of a graphics controller. Pet. 17−18, 31, 33−34, 39, 43, 45; Ex. 1003 ¶ 66. Tellingly, Dr. Edwards’ testimony merely repeats IPR2021-00670 Patent RE45,140 E 18 Petitioner’s arguments without providing any additional explanation. Ex. 1003 ¶ 66. The cited portions of Gulick also do not support Petitioner’s arguments or Dr. Edwards’ testimony. Ex. 1004, 5:4−7, 5:21−25, 23:54−57, Fig. 3. As Patent Owner points out, the portion of Gulick relied upon by Petitioner “does not indicate that graphics interface 306 itself performs graphics functions, or is anything more than an interface.” Prelim. Resp. 13; Ex. 2001 ¶¶ 72−74. Moreover, the only portion of Gulick relied upon by Petitioner to support its arguments that “graphics interface 306 implements a graphics function on the processor module 301” and “is a graphics controller” (Pet. 17, citing Ex. 1004, 23:54−57) describes the system shown in Figure 19 that “includes CPU 1901 coupled via host bus 1905 to graphics engine 1902 and memory controller 1903,” not graphics interface 306. Ex. 1004, 23:49−57, 24:38−41. IPR2021-00670 Patent RE45,140 E 19 Figure 19 of Gulick is reproduced below. Figure 19 of Gulick above illustrates a pipe structure and associated functions of a typical computer system. Ex. 1004, 3:41−42, 24:38−39. Gulick expressly describes that “processor module 1900 includes CPU 1901 coupled via host bus 1905 to graphics engine 1902 and memory controller 1903.” Id. at 24:39−41. Gulick makes clear that graphics engine 1902 is a separate processing unit coupled to CPU 1901 via host bus 1905, not integrated with the CPU on a single chip, as required by the challenged claims. Id. The sentence in Gulick replied upon by Petitioner (Pet. 17) “one or more asynchronous or isochronous source or target pipes connecting to non-CPU, non-memory processor module functions, such as graphics, may IPR2021-00670 Patent RE45,140 E 20 be implemented” (Ex. 1004, 23:54−57) describes Gulick’s “graphics engine 1902,” not “graphics interface 306.” Petitioner improperly conflates a graphics interface with a graphics engine. In light of the foregoing, we determine that Petitioner fails to show that the combination of Gulick and Goodrum teaches or suggests “an integrated Central Processing Unit (CPU) with a graphics controller in a single chip” as required by the challenged claims. 2. Conclusion on Obviousness Based on Gulick and Goodrum Alone, or with Other References For the reasons discussed above, we conclude that Petitioner has not demonstrated a reasonable likelihood of prevailing in showing that claims 30−33 and 35 are unpatentable under § 103(a) as obvious over Gulick and Goodrum (Ground 1); claims 14, 16−17, and 38 are unpatentable under § 103(a) as obvious over Gulick, Goodrum, and Sauber (Ground 2); claims 18−20, 22−26, 28, 29, 34, 36, and 37 are unpatentable under § 103(a) as obvious over Gulick, Goodrum, and McAlear (Ground 3); and claims 15, 21, and 27 are unpatentable under § 103(a) as obvious over Gulick, Goodrum, McAlear, and Sauber (Ground 4). Pet. 10−49. III. CONCLUSION After considering the parties’ evidence and arguments, we determine that the information presented does not show a reasonable likelihood that Petitioner would prevail in establishing that at least one of claims 14−38 of the ’140 patent is unpatentable on the grounds asserted in the Petition. IPR2021-00670 Patent RE45,140 E 21 IV. ORDER Accordingly, it is ORDERED that the Petition is denied, and no inter partes review is instituted. FOR PETITIONER: Gianni Minutolli Harpreet Singh Alan Limbach DLA PIPER LLP (US) gianni.minutoli@dlapiper.com harpreet.singh@dlapiper.com alan.limbach@dlapiper.com FOR PATENT OWNER: Cyrus Morton Derrick Carman ROBINS KAPLAN LLP cmorton@robinskaplan.com dcarman@robinskaplan.com