Ex Parte Tessarolo et al

Patent Trial and Appeal Board

Aug 1, 2017

13971635 (P.T.A.B. Aug. 1, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/971,635 08/20/2013 Alexander Tessarolo TI-72989US 5370
TEXAS INSTRUMENTS INCORPORATED
P O BOX 655474, M/S 3999
DALLAS, TX 75265
EXAMINER
MAI, TAN V
ART UNIT PAPER NUMBER
2182
NOTIFICATION DATE DELIVERY MODE
08/03/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
uspto@ti.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte ALEXANDER TESSAROLO and CHIRAG GUPTA
Appeal 2017-004532
Application 13/971,63 51
Technology Center 2100
Before JEFFREY S. SMITH, JOHNNY A. KUMAR, and
TERRENCE W. McMILLIN, Administrative Patent Judges.
McMILLIN, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on appeal under 35 U.S.C. § 134(a) of the Final
Rejection of claims 1—18. Final Act. 1. We have jurisdiction under
35 U.S.C. § 6(b).
We AFFIRM.
1 According to Appellants, the real party in interest is Texas Instruments
Incorporated. Br. 1.
Appeal 2017-004532
Application 13/971,635
THE CLAIMED INVENTION
According to the Specification, the present invention generally relates
to processors and methods “for solving mathematical equations,” and more
particularly to processors and methods that “use a combination of look up
tables and polynomials to solve complex mathematical operations.” Spec.
3, 9. Independent claims 1 and 18 are directed to processors, and
independent claim 10 is directed to a method. Br. 10—12. Claim 1 recites:
1. A processor for solving mathematical operations,
the processor comprising:
a hardware device for receiving an input number for a
programmed mathematical operation and for calculating
coefficients based on the programmed mathematical operation
and the input number;
an indexing device operable to generate a table index for
storing and retrieving the coefficients to and from a look up table,
wherein the table index is generated in accordance with
programmed mathematical operation, the input number, and a
symmetry of the programmed mathematical operation;
a hardware multiplier that multiplies certain coefficients
by the derivative of a function related to the programmed
mathematical operation; and
a hardware adder that adds a first coefficient to the product
of a second coefficient and the first order derivative of the
function.
REJECTION ON APPEAL
Claims 1—18 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Tsadik et al. (US 2013/0185345 Al, published July 18,
2013) and Slavin (US 2011/0055303 Al, published Mar. 3, 2011).
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Appeal 2017-004532
Application 13/971,635
ANALYSIS
We have reviewed the Examiner’s rejection of claims 1—18 in light of
Appellants’ arguments that the Examiner erred. We are not persuaded that
Appellants identity reversible error. Upon consideration of the arguments
presented in the Brief, we agree with the Examiner that all the pending
claims are unpatentable over the cited combination of references. We adopt
as our own the findings and reasons set forth in the rejection from which this
appeal is taken and in the Examiner’s Answer. We provide the following
explanation to highlight and address specific arguments and findings
primarily for emphasis.
Appellants contend Tsadik does not teach or suggest “an indexing
device operable to generate a table index for storing and retrieving the
coefficients to and from a look up table, wherein the table index is generated
in accordance with programmed mathematical operation [and] the input
number” as recited in claim 1 (emphasis added). Br. 4—5. In response, the
Examiner cites paragraphs 17 and 23 of Tsadik, which read:
[0017] An input word (x) is divided into two portions — one
representing a known value, ao, and the other representing some
differential, dx, where x=ao+dx. Each look up table includes the
pre-calculated values of a particular function at ao, and the first
derivative of the function at ao. These results, together with the
portion representing dx, are input to the arithmetic engine, which
calculates the desired approximation. It is a feature of the
invention that the decision as to where to divide the bits of the
input word (i.e., how many bits are used to form ao and how many
bits are used to represent dx) can be decided dynamically during
operation, and can change as desired, depending on the
instruction received regarding the particular function to be
approximated. . . .
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Appeal 2017-004532
Application 13/971,635
[0023] In this way, many functions which are difficult to
calculate at present, such as sine, exponent, square root,
logarithm, can be estimated relatively rapidly and using fewer
resources. ... If desired, various L UTs can be stored in a single
memory. Each table is built using the values of the function at
values selected according to the precision desired ....
Tsadik || 17, 23 (emphasis added), cited in Ans. 5, 8—9.
The cited passages in Tsadik support the Examiner’s finding that
Tsadik teaches the claimed “indexing device operable to generate a table
index for storing and retrieving the coefficients to and from a look up table.”
Specifically, we agree with the Examiner’s finding that the claimed “table
index” encompasses Tsadik’s look up table of pre-calculated values (i.e.,
coefficients) generated in accordance with mathematical operations and
input numbers according to the precision desired. Ans. 8—9 (citing Tsadik
123). We further agree that the claimed “indexing device operable to
generate [the] table index for storing and retrieving the coefficients to and
from a look up table” encompasses Tsadik’s algebraic processor that divides
input, builds the look up table, and stores and retrieves the values to perform
the calculations. Ans. 5, 8—9 (citing Tsadik || 17, 23).
We observe that no Reply Brief is of record to rebut the Examiner’s
findings in response to Appellants’ arguments regarding claim 1. See Br. 4—
5 and Ans. 5. Therefore, in the absence of sufficient rebuttal evidence or
argument to persuade us otherwise, in light of the discussion above, we find
no error in the Examiner’s rejection of claim 1.
Accordingly, we sustain the § 103 rejection of independent claim 1, as
well as the rejection of commensurate independent claims 10 and 18, for
which Appellants did not make arguments for separate patentability, and
dependent claims 2—9 and 11—17, not separately argued. See Br. 5—8.
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Appeal 2017-004532
Application 13/971,635
DECISION
The rejection of claims 1—18 is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv).
AFFIRMED
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