Ex Parte SinykinDownload PDFPatent Trial and Appeal BoardApr 28, 201613344851 (P.T.A.B. Apr. 28, 2016) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 13/344,851 01/06/2012 57299 7590 05/02/2016 Kathy Manke A vago Technologies Limited 4380 Ziegler Road Fort Collins, CO 80525 FIRST NAMED INVENTOR Joshua P. Sinykin UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. 11-0464 3301 EXAMINER AISAKA, BRYCE M ART UNIT PAPER NUMBER 2851 NOTIFICATION DATE DELIVERY MODE 05/02/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): kathy.manke@broadcom.com patent.info@broadcom.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte JOSHUA P. SINYKIN Appeal2014-005591 Application 13/344,851 Technology Center 2800 Before JEFFREY T. SMITH, BEYERL YA. FRANKLIN, and LINDA M. GAUDETTE, Administrative Patent Judges. SMITH, Administrative Patent Judge. DECISION ON APPEAL Appellant appeals under 35 U.S.C. § 134(a) from the Examiner's decision finally rejecting claims 1--4, 8-11, and 15-18. 1 We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE. 1 The Examiner has withdrawn the rejection of claims 5-7, 12-14, 19, and 20. (Ans. 6.) Appeal2014-005591 Application 13/344,851 The subject matter on appeal is generally directed "generally to circuit design/testing, and more specifically relates to acquiring internal signals of a circuit by analyzing the circuit's design and programming test logic of the circuit to output desired internal signals based upon the analysis." (Spec. iT 1.) Details of the appealed subject matter are recited in representative claim 1, reproduced below: 1. A method operable as programmed instructions on a computer system, the method comprising: acquiring, by use of the computer system, a Register Transfer Level (RTL) representation of an electronic circuit, the circuit implementing operational logic for performing tasks, the circuit further implementing test logic that may be externally programmed for providing one or more output signals corresponding to internal operational signals; analyzing, via the computer system, the RTL representation to identify test multiplexers (MUXs) having registers for implementing the test logic; correlating, via the computer system, test register values for the test MUXs with outputs corresponding to the internal operational signals, based upon the RTL representation; selecting a desired internal operational signal for acquisition; and programming, via the computer system, the test registers of the test MUXs of the circuit based on the correlated test register values to acquire the selected internal operational signal and to apply the acquired signal as one or more output signals. (App. Br. 14 (Claims App'x).) The Examiner maintains the following rejection (Ans. 2-5): 2 Appeal2014-005591 Application 13/344,851 Claims 1--4, 8-11, and 15-18 under 35 U.S.C. § 103(a) as unpatentable over Hom et al. (US 2010/0169856 Al; published July 1, 2010 (hereinafter "Hom"). The Examiner has withdrawn the rejection of claims 5-7, 12-14, 19, and 20 under 35 U.S.C. § 103(a) as unpatentable over Hom in view of Siu et al. (US 2006/0149 803 A 1; published July 6, 2006) (hereinafter "Siu"). (Ans. 6.) DISCUSSION Upon consideration of the evidence on this appeal record in light of the arguments advanced by the Examiner and Appellant, we concur with Appellant that the Examiner has not carried the burden of establishing obviousness regarding the subject matter recited in claims 1--4, 8-11, and 15-18 \vithin the meaning of 35 U.S.C. § 103(a). ii .. ccordingly, we reverse the Examiner's§ 103(a) rejections of these claims for the reasons set forth in the Appeal Brief. We add the following. 2 The Examiner has the burden of establishing a prima facie case of obviousness regarding the subject matter recited in the claims on appeal. In re Oetiker, 977 F.2d 1443, 1445 (Fed. Cir. 1992) ("[The] [patent] examiner bears the initial burden, on review of the prior art or on any other ground, of presenting a primafacie case ofunpatentability."); see also In re Jung, 637 F.3d 1356, 1365-66 (Fed. Cir. 2011) (explaining that while "the applicant 2 We limit our discussion to independent claims 1, 8, and 15. 3 Appeal2014-005591 Application 13/344,851 must identify to the Board what the examiner did wrong, ... the examiner retains the burden to show invalidity"). As explained by Appellant, Hom does not teach analyzing the Register Transfer Level (RTL) representation to identify test multiplexers having registers for implementing the test logic and correlating the test register values for the test multiplexers with outputs corresponding to the internal operational signals, based upon the RTL representation as required by independent claim 1. 3 (Br. 8-9.) The Examiner asserts Hom discloses gate level netlist which is an RTL representation. (Ans. 8.) The Examiner further contends Hom discloses: testing and monitoring of the circuit via scan-in or scan-out. The testing/monitoring test sequences necessarily include test MUXs to be included in the circuit because the circuit will have different modes of operation and there must be a way to set the different modes or determine which inputs circuit elements should use. (Ans. 8 (citing Hom i-fi-f 10, 13, 14).) While a netlist may be an RL T representation, the Examiner has not explained adequately why "the testing/monitoring test sequences necessarily include test MUXs." Hom's paragraph 10, cited by the Examiner, provides a discussion of a mux-scan testing. This disclosure does not necessarily indicate testing of multiplexers having registers for implementing the test logic and correlating the test register values for the test multiplexers with 3 Similar language appears in independent claims 8 and 15. 4 Appeal2014-005591 Application 13/344,851 outputs corresponding to the internal operational signals, based upon the RTL representation as required by the independent claims. Accordingly, on this record, we concur with Appellant that the Examiner's evidence and explanation are not sufficient to establish obviousness of the subject matter recited in claims 1--4, 8-11, and 15-18 within the meaning of 35 U.S.C. § 103(a). We therefore do not sustain the rejections of these claims. DECISION In view of the reasons set forth in the Appeal Brief and above, the Examiner's§ 103(a) rejection of claims 1--4, 8-11, and 15-18 is reversed. REVERSED 5 Copy with citationCopy as parenthetical citation