Ex Parte Pickett et al

Patent Trial and Appeal Board

Aug 29, 2017

14349352 (P.T.A.B. Aug. 29, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
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APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
14/349,352 04/03/2014 Matthew D. Pickett 83881910 1026
56436 7590
Hewlett Packard Enterprise
3404 E. Harmony Road
Mail Stop 79
Fort Collins, CO 80528
EXAMINER
DOAN, KHOA D
ART UNIT PAPER NUMBER
2133
NOTIFICATION DATE DELIVERY MODE
08/31/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
hpe.ip.mail@hpe.com
chris. mania @ hpe. com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte MATTHEW D. PICKETT,
R. STANLEY WILLIAMS, and GILBERTO M. RIBEIRO
Appeal 2017-002484
Application 14/349,3521
Technology Center 2100
Before BRUCE R. WINSOR, JOHN F. HORVATH, and
PHILLIP A. BENNETT, Administrative Patent Judges.
BENNETT, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
Appellants appeal under 35 U.S.C. § 134(a) from the Examiner’s final
rejection of claims 1—6 and 8—20.2 We have jurisdiction under 35 U.S.C.
§ 6(b).
We reverse.
1 Appellants’ Brief (“App. Br.”) identifies Hewlett Packard Enterprise
Development LP as the real party in interest.
2 Claim 7 is objected to as being dependent upon a rejected base claim, but
has been indicated to be otherwise allowable.
Appeal 2017-002484
Application 14/349,352
CLAIMED SUBJECT MATTER
The claims are directed to a shiftable memory employing ring
registers. Spec. Title. Claim 1, reproduced below, is illustrative of the
claimed subject matter:
1. A computing device comprising:
a processor; and
a main memory system coupled to the processor, the
main memory system comprising:
a memory comprising a plurality of ring registers
to store data words, and a memory controller to, in
response to a receipt of an address and a length of a
contiguous subset of the data words from the processor,
control the plurality of ring registers to shift the
contiguous subset of data words from a first location to a
second location within the memory, the contiguous
subset of data words having a size that is smaller than a
total size of the memory, wherein the plurality of ring
registers shifts only data words stored inside the
contiguous subset when the contiguous subset is shifted.
App. Br. 11 (Claims Appendix).
The prior art relied upon by the Examiner in rejecting the claims on
REFERENCES
appeal is:
Chung
Nakamura
Stone
US 5,677,864 Oct. 14, 1997
US 2003/0147488 A1 Aug. 7, 2003
US 7,570,611 B2 Aug. 4, 2009
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Appeal 2017-002484
Application 14/349,352
REJECTIONS
Claims 5 and 13 stand rejected under 35U.S.C. § 112, first paragraph
as failing to comply with the written description requirement. Final Act. 2—
3.
Claims 1—4, 6, 8—11, and 18—20 stand rejected under 35 U.S.C.
§ 103(a) as being unpatentable over Nakamura, Stone, and Chung. Final
Act. 3-12.
Claims 12 and 14—17 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Chung and Stone. Final Act. 12—15.
ISSUES
First Issue: Has the Examiner erred in finding the limitation of
“wherein the length received by the memory controller from the processor
indicates a numerical quantity of ring registers required to store the
contiguous subset of the data words,” lacks support in the Specification?
App. Br. 12 (claim 5) (Claims Appendix).
Second Issue: Has the Examiner erred in finding Stone teaches “a
memory comprising a plurality of ring registers to store data words,” as
recited in claim 1 ?
ANALYSIS
First Issue—Written Description
The Examiner rejects claims 5 and 13 under 35 U.S.C. § 112, first
paragraph as failing to comply with the written description requirement.
Final Act. 2—3. More specifically, the Examiner finds the limitation
“wherein the length received by the memory controller . . . indicates a
numerical quantity of ring registers” lacks support because:
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Appeal 2017-002484
Application 14/349,352
A[] [person of] ordinary skill in the art at the time the invention
was made would recognize that a length of a data word is
measured in byte, a unit of digital information. A length of data
words would obviously consist of plurality of bytes. Thus, “the
length of a contiguous subset of data words” would be in X
byte(s) (X is an integer number greater than or equal 1).
Ans. 4. The Examiner rejects claim 13 for the same reason. Final Act. 3.
Appellants contend the Specification supports the rejected claim
because it states “a set of ring registers 110 that has a length (e.g., a number
of ring registers 110) that corresponds to a length of the contiguous subset of
data words.” App. Br. 6 (citing Spec. 145) (emphasis omitted). We agree.
A person of ordinary skill in the art would have understood from this
disclosure that the inventor possessed a computing device in which the
number of ring registers needed corresponds to the length of the received
contiguous subset of data words. The Examiner seems to suggest that this
“number of ring registers” must be expressed as a number of data bytes.
Ans. 4 (“A length of data words would obviously consist of [a] plurality of
bytes.”). The language of the claim, however, imposes no such requirement.
The language of the claim merely requires that the length of a contiguous
subset of the data words “indicate” the number of ring registers required to
store the subset. By disclosing that a specific number of ring registers can
correspond to the length of the contiguous subset of data words, the
Specification supports the limitation that the length of the data words
indicates the number of ring registers required. Accordingly, we do not
sustain the rejection of claims 5 and 13 under 35U.S.C. § 112, first
paragraph.
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Appeal 2017-002484
Application 14/349,352
Second Issue—Obviousness
In rejecting the independent claims, the Examiner finds Nakamura and
Chung teach all of the limitations except “a main memory system coupled to
the processor” and “a plurality of ring registers to store data words.” Final
Act. 4—5. To cure these deficiencies, the Examiner relies on Stone. The
Examiner finds Stone teaches “a main memory system coupled to the
processor” because it teaches a processor 130 coupled to a system on a chip
10. Final Act. 5 (citing Stone, Fig. 3). The Examiner further finds Stone
teaches “a plurality of ring registers to store data words,” because it shows a
fabric exchange element 15, which, although shown as a single ring register,
includes a first portion (shift registers 31—35) and a second portion (shift
registers 41—45). Final Act. 5 (citing Stone, Fig. 2, col. 2,11. 52—58, col. 3,
11. 42-45).
Appellants contend Stone does not teach “a plurality of ring registers
to store data words.” App. Br. 7—8 (emphasis omitted). More specifically,
Appellants contend the fabric exchange element 15 taught by Stone is a
single ring register included in a system on a chip 10. App. Br. 7.
According to Appellants, Stone’s drawings depict the fabric exchange
element as a single element, and Stone’s description of the fabric exchange
element is singular and not plural. App. Br. 8 (citing Stone, Fig. 1, col. 2,11.
6-14).
We agree with Appellants. Appellants define “ring register” as “a
memory register comprising a plurality of interconnected memory cells that
are configured to shift or circulate data between adjacent memory cells of
the plurality in a circular manner.” Spec. 30 (emphasis added). Thus, as
defined by Appellants, a ring register must shift data so that it eventually
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Appeal 2017-002484
Application 14/349,352
returns to its starting point. The Examiner finds Stone’s fabric exchange
element discloses a plurality of ring registers, namely, the groupings of shift
registers 31—35 and shift registers 41—45 depicted in Figure 2. Neither group
of shift registers can, in isolation, shift data so that it returns to its starting
point. Rather, shifting data in a circular manner is possible only when the
two groups of shift registers are combined to form a single entity—the fabric
exchange element. Thus, the groupings of shift registers 31—35 and 41—45
cannot be “ring registers,” and together they cannot be considered “a
plurality of ring registers” within the meaning of claim l.3 Accordingly, we
do not sustain the rejection of claim 1 under 35 U.S.C. § 103(a), or of
independent claims 8 and 12 which also recite the limitation of “a plurality
of ring registers.” App. Br. 12—13 (Claims Appendix). For the same reason,
we do not sustain the rejection of dependent claims 2-4, 6, 9—11, and 14—20
which depend therefrom.
DECISION
The Examiner’s rejection of claims 1—6 and 8—20 is reversed.
REVERSED
3 Because we have found the first of Appellants’ arguments persuasive of
Examiner error, we need not address Appellants’ additional argument that
Stone does not teach or suggest the recited “main memory system coupled to
the processor.” We note, however, that the Specification describes main
memory as “separate from a processor of a general-purpose computer
system or related processing system,” and that main memory is distinguished
from processor memory which “typically may be limited to less than a few
tens of bytes (e.g., processor registers) to a few megabytes (e.g., LI cache,
L2 cache etc.).” Spec. 139. Stone’s fabric exchange element 15, to the
extent it is memory, seems to us to be more akin to processor memory than
main memory.
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