Ex Parte Gelinas et al

Patent Trial and Appeal BoardNov 24, 2014

12429655 (P.T.A.B. Nov. 24, 2014)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 12/429,655 04/24/2009 Robert GELINAS 4729.10US03 1431 24113 7590 11/25/2014 PATTERSON THUENTE PEDERSEN, P.A. 4800 IDS CENTER 80 SOUTH 8TH STREET MINNEAPOLIS, MN 55402-2100 EXAMINER KIM, KENNETH S ART UNIT PAPER NUMBER 2111 MAIL DATE DELIVERY MODE 11/25/2014 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________________ Ex parte ROBERT GELINAS, W. PATRICK HAYS, SOL KATZMAN, and WILLIAM J. DALLY ____________________ Appeal 2012-007897 Application 12/429,655 Technology Center 2100 ____________________ Before JEFFREY S. SMITH, STANLEY M. WEINBERG, and HUNG H. BUI, Administrative Patent Judges. BUI, Administrative Patent Judge. DECISION ON APPEAL Appellants1 seek our review under 35 U.S.C. § 134(a) of the Examiner’s final rejection of claims 1–5 and 8–27.2 We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE.3 1 The Real Party in Interest is MIPS Technologies, Inc. 2 Claim 6 has been cancelled and is not on appeal. Claims 7 and 28–39 have been withdrawn from consideration following the Restriction Requirement issued on December 27, 2010 and, as such, are not on appeal. 3 Our decision refers to Appellants’ Appeal Brief filed January 13, 2012 (“App. Br.”); Reply Brief filed April 26, 2012 (“Reply Br.”); Final Office Action mailed June 29, 2011 (“Final Rej.”); Examiner’s Answer mailed February 28, 2012 (“Ans.”); and original Specification filed April 24, 2009 (“Spec.”). Appeal 2012-007897 Application 12/429,655 2 STATEMENT OF THE CASE Appellants’ Invention Conventional processor is required to send: (1) an operation with data to a target device (i.e., a table lookup unit), and then (2) another command requesting the target device (i.e., a table lookup unit) to load the result and return data to the processor. This conventional procedure requires two bus transactions initiated by the processor. Spec. ¶ 3. As a solution to this problem, Appellants allow for performing a single transaction that: (1) supplies data to the target device and (2) commands the target device to perform an action (operation) and return the result back to the processor. Id. at ¶ 5. According to Appellants, “the single instruction includes a thread identifier so that the device can send the data back to the requesting thread at the processor.” Id. at ¶ 21. The “term thread describes a set of program instructions or a software program that relies on a context register set to perform a particular task.” Id. at ¶ 22. The term “context” describes an independent set of general registers and control registers that are used in executing a “thread,” and may generally be used to refer to a “thread” currently using the context’s registers. Id. at ¶ 24. An example of such an instruction is a “write-split read” instruction that writes to a system device and directs the device to return read data when available. Id. at ¶ 30. Claims on Appeal Claims 1, 8, 14, 18, and 23 are independent claims. Representative claim 1 is reproduced below: Appeal 2012-007897 Application 12/429,655 3 1. A processing system, comprising: a processor; and a controller coupled to the processor and configured to be coupled to a bus, to send an instruction to a device coupled to the bus, and to add a first identifier to the instruction to indicate an identity of the processor and an identity of a context of a thread that produced the instruction, wherein the device is configured and arranged to return data to the processor identified by the first identifier. App. Br. 18 (Claims Appendix) (disputed limitations in italics.) Evidence Considered Wingard US 6,182,183 B1 Jan. 30, 2001 Examiner’s Rejection4 Claims 1–5 and 8–27 stand rejected under 35 U.S.C. § 102(e) as being anticipated by Wingard. Ans. 5–6. Issues on Appeal Based on Appellants’ arguments, the dispositive issue on appeal is whether the Examiner erred in rejecting claims 1–5 and 8–27 under 35 U.S.C. § 102(e) as being anticipated by Wingard. In particular, the appeal turns on whether Wingard discloses several limitations of Appellants’ independent claims 1, 8, 14, 18, and 23, including: (1) “a first identifier to the instruction to indicate an identity of the processor and an identity of a context of a thread that produced the instruction” and (2) “wherein the 4 Claims 1–5 and 8–27 also stand finally rejected under 35 U.S.C. § 112, second paragraph. However, that rejection has been withdrawn as per Examiner’s Answer and, as such, is no longer on appeal. Ans. 4. Appeal 2012-007897 Application 12/429,655 4 device is configured and arranged to return data to the processor identified by the first identifier.” App. Br. 13–17; Reply Br. 2–12. ANALYSIS Independent claim 1 recites a processing system comprising a processor and a controller . . . to send an instruction to a device coupled to the bus, and to add (1) “a first identifier to the instruction to indicate [1a] an identity of the processor and [1b] an identity of a context of a thread that produced the instruction,” (2) “wherein the device is . . . arranged to return data to the processor identified by the first identifier.” Independent claims 8, 14, 18, and 23 recite the same features in context of an electronic processor [instead of a processor] and an external electronic device [instead of a target device]. Appellants contend Wingard does not disclose: (1) “a first identifier” that indicates both: (a) “an identity of the processor” and (b) “an identity of a context of a thread that produced the instruction” and (2) “wherein the device is configured and arranged to return data to the processor identified by the first identifier” as recited in Appellants’ independent claims 1, 8, 14, 18, and 23. App. Br. 13–17; Reply Br. 2–12. In response thereto, the Examiner takes the position that: (1) “since data is returned to the processor and not to a thread (or a context of a thread), as recited in the claim, whether the identifier contains the extra information of the identity of a context of a thread or not is not relevant” (Ans. 6) (emphasis added); (2) Appellants’ claimed term “context of a thread” is not different from the term “thread” as described by Wingard at 3:16–18 as these terms are synonymous and, as such, one skilled in the art Appeal 2012-007897 Application 12/429,655 5 would readily recognize that “identity of a context of a thread” or “identity of a thread” can be interchangeably used to specify the destination (requesting thread) for returning requested data (Ans. 6–7); and (3) evidence of interchangeability of these terms can further be found in Appellants’ own Specification at ¶¶ 9–10 and 24 (Ans. 7). However, the Examiner does not address Appellants’ contention as to whether Wingard discloses a target device arranged to return data to an initiator processor identified by the identifier as recited in Appellants’ independent claims 1, 8, 14, 18, and 23. Ans. 5–7. We do not agree with the Examiner’s positions. In order to establish anticipation under 35 U.S.C. § 102, the Examiner must demonstrate a single reference discloses every element of a claim, as set forth in the rejected claim, either expressly or inherently. Verdegaal Bros., Inc. v. Union Oil Co. of California, 814 F.2d 628, 631 (Fed. Cir. 1987). Thus, in order to find that Wingard anticipates Appellants’ independent claims 1, 8, 14, 18, and 23, the Examiner must demonstrate Wingard discloses the identical invention “in as complete detail as is contained in the . . . claim.” Richardson v. Suzuki Motor Co., 868 F.2d 1226, 1236 (Fed. Cir. 1989). At the outset, we note the claim term “an identity of a context of a thread that produced the instruction” is relevant and cannot be ignored in the anticipation determination under 35 U.S.C. § 102. As explained by Appellants’ Specification, the “bus controller 140 adds a global thread identifier (GTID) to every outgoing transition” and “[t]he GTID indicates the processor number and context number of the originating thread.” Id. at ¶ 26. The context information stored in the GTID is later used by the system. For instance, as explained by the Specification in the context of a read Appeal 2012-007897 Application 12/429,655 6 operation, the “[p]rocessor 100 writes this read word to the register indicated in the write address register 216 by obtaining the identity of the originating context from the GTID.” Id. at ¶ 36 (emphasis added.) In addition, we further note that the Examiner does not address Appellants’ contention as to whether Wingard discloses a target device arranged to return data to an initiator processor identified by the identifier as recited in Appellants’ independent claims 1, 8, 14, 18, and 23. Ans. 5–7. Nor do we find any evidence in Wingard to support the Examiner’s finding regarding that feature. Because Wingard fails to teach each and every feature of Appellants’ independent claims 1, 8, 14, 18, and 23, particularly those features discussed above, we are constrained by the record not to sustain the Examiner’s anticipation rejection of Appellants’ independent claims 1, 8, 14, 18, and 23. As such, we need not address other issues raised by Appellants, including whether the terms “context of a thread” and “a thread” are distinct as contended by Appellants. Reply Br. 5–7. Regarding the anticipation rejection of claims 9, 15, 19, and 24, we are also constrained by the record not to sustain the Examiner’s anticipation rejection of claims 9, 15, 19, and 24 (dependent from claims 8, 14, 18, and 24, respectively) as well as remaining dependent claims 2–5, 10–13, 15–17, 20–22, and 25–27 for the same reasons discussed in connection with independent claims 1, 8, 14, 18, and 23. Appeal 2012-007897 Application 12/429,655 7 CONCLUSION On the record before us, we conclude the Examiner’s rejection of claims 1–5 and 8–27 under 35 U.S.C. § 102(e) should be withdrawn.5 DECISION As such, we REVERSE the Examiner’s final rejection of claims 1–5 and 8–27 under 35 U.S.C. § 102(e). REVERSED cdc 5 In the event of further prosecution, we suggest the Examiner evaluate whether it would have been obvious to one of ordinary skill in the art at the time of the invention was made to modify the teachings of Wingard to utilize an “identifier” that indicates both: (1) “an identity of the processor” and (2) “an identity of a context of a thread that produced the instruction” and the target device arranged to return data to the processor identified by the identifier in order to arrive at Appellants’ independent claims 1, 8, 14, 18, and 23.