Ex Parte Chen et al

Patent Trial and Appeal Board

Aug 28, 2017

13696437 (P.T.A.B. Aug. 28, 2017)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/696,437 11/06/2012 Jing Chen GUH-176US 8611
56352 7590 08/28/2017
GLOBAL IP SERVICES
7285 Eagle Court
Winton, CA 95388
EXAMINER
MAPAR, BIJAN
ART UNIT PAPER NUMBER
2128
MAIL DATE DELIVERY MODE
08/28/2017 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte JING CHEN, QINGQING WU, JIEXIN LUO, ZHAN CHAI,
and XI WANG
____________

Appeal 2016-008734
Application 13/696,4371
Technology Center 2100
____________

Before BRUCE R. WINSOR, JEREMY J. CURCURI, and
SHARON FENICK, Administrative Patent Judges.

WINSOR, Administrative Patent Judge.

DECISION ON APPEAL
Appellants appeal under 35 U.S.C. § 134(a) from the final rejection of
claims 1–7, which constitute all the claims pending in this application. We
have jurisdiction under 35 U.S.C. § 6(b).
We reverse.

1 Appellants identify the real party in interest as the Shanghai Institute of
Microsystem and Information Technology, Chinese Academy of Sciences.
App. Br. 3.
Appeal 2016-008734
Application 13/696,437

2
STATEMENT OF THE CASE
Appellants’ disclosed invention “relates to a modeling method of a
SPICE[2] model series of a field effect transistor (FET), and specifically to a
modeling method of a SPICE model series of a Silicon On Insulator (SOI)
FET, belonging to the field of micro-electronic device modeling.” Spec.
1:4–6. Claim 1, which is illustrative, reads as follows:
1. A modeling method of a SPICE model series of a Silicon on
Insulator (SOI) Field Effect Transistor (FET), comprising the
following steps:
1) designing and fabricating a plurality of devices of a
body leading-out structure and of different sizes, a plurality of
devices of a floating structure and of different sizes, and a
plurality of auxiliary devices only comprising body leading-out
parts in the devices of a body leading-out structure;
2) measuring various electrical property data of the
devices of a body leading-out structure, the devices of a floating
structure, and the auxiliary devices respectively;
3) subtracting the electrical property data of the auxiliary
devices of corresponding sizes from the electrical property data
of all the devices of a body leading-out structure in the same
test conditions, and recording the subtraction result as
intermediate data;
4) extracting all model parameters of the devices of a
body leading-out structure in a SPICE model equation of an
SOI FET by using the intermediate data, to establish a first
model;
5) extracting all model parameters of the devices of a
body leading-out structure in the SPICE model equation of the

2 Simulation Program with Integrated Circuit Emphasis. SPICE, WIKIPEDIA,
https://en.wikipedia.org/wiki/SPICE (last updated June 13, 2017; last visited
Aug. 17, 2017).
Appeal 2016-008734
Application 13/696,437

3
SOI FET by using the electrical property data of the auxiliary
devices, to establish a second model;
6) writing a macro-model formed by the first model and
the second model in a parallel connection, and establishing a
SPICE model of the SOI FET of a body leading-out structure;
and
7) based on the first model established in step 4) and by
using the electrical property data of the devices of a floating
structure, extracting all model parameters of devices without a
body leading-out structure in the SPICE model equation of the
SOI FET, so as to obtain a SPICE model of an SOI FET of a
floating structure.
The Examiner relies on the following prior art in rejecting the claims:
Tsai US 2003/0055613 Al Mar. 20, 2003
Guldi et al. US 2009/0102501 Al Apr. 23, 2009
P. Su et al., A Body-Contact SOI MOSFET Model for Circuit
Simulation, 1999 IEEE INTERNATIONAL SOI CONFERENCE 50 (Oct.
1999) (hereinafter “Su 1999”).
Pin Su et al., BSIMPD: A Partial-Depletion SOI MOSFET Model for
Deep-Submicron CMOS Designs, IEEE 2000 CUSTOM INTEGRATED
CIRCUITS CONFERENCE 197 (2000) (hereinafter “Su 2000”).
BSIM Group, BSIMSOIv4.4 MOSFET MODEL Users’ Manual,
(Dept. of Elec. Eng’g and Comput. Sci., Univ. of Cal., Berkeley,
2010) (hereinafter “BSIMSOIv4.4”).
Claims 1, 2, 3, and 7 stand rejected under 35 U.S.C. § 103(a)3 as being
unpatentable over Guldi et al. (hereinafter “Guldi”), Tsai, Su 1999, and Su
2000. See Final Act. 5–11.

3 All rejections are under the provisions of 35 U.S.C. in effect prior to the
effective date of the Leahy-Smith America Invents Act of 2011. Final Act 2.

Appeal 2016-008734
Application 13/696,437

4
Claims 4, 5, and 6 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Guldi, Tsai, Su 1999, Su 2000, and BSIMSOIv4.4. See
Final Act. 11–14.
Rather than repeat the arguments here, we refer to the Briefs (“App.
Br.” filed Dec. 03, 2015; “Reply Br.” filed Sept. 21, 2016) and the
Specification (“Spec.” filed Nov. 06, 2012) for the positions of Appellants
and the Final Office Action (“Final Act.” mailed June 05, 2015) and Answer
(“Ans.” mailed July 22, 2016) for the reasoning, findings, and conclusions of
the Examiner.

ISSUE
Appellants’ arguments raise the following dispositive issue:4 Does
the Examiner err in finding Guldi, teaches or suggests “measuring various
electrical property data of the devices of a body leading-out structure, the
devices of a floating structure, and the auxiliary devices respectively,” as
recited in step 2 of claim 1?

ANALYSIS
The Examiner finds Guldi teaches step 2 of claim 1. Final Act. 6
(citing Guldi ¶¶ 32–33, 38). The Examiner explains, in pertinent part, that
the “Examiner is interpreting measuring electrical property data to include
detecting leakage current paths.” Id. (citing Guldi ¶ 38).
Appellants contend the Examiner errs because the functions described
in the passages of Guldi relied on by the Examiner are not the same as those

4 Appellants’ arguments raise additional issues. Because the identified issue
is dispositive of the appeal, we do not reach the additional issues.
Appeal 2016-008734
Application 13/696,437

5
described in step 2 of claim 1. See App. Br. 14–15; Reply Br. 3. In
particular, the purpose, i.e., function, of step 2 is “to get various electrical
property data of the devices of a body leading-out structure, the devices of a
floating structure, and the auxiliary devices measured respectively, for
further establishing models by using the corresponding model equation.”
App. Br. 14–15. Step 2 of Appellants’ invention accomplishes this function
by measuring the electrical property data of the various devices. App. Br.
15. The function performed by Guldi, on the other hand, is “detecting a
defect during semiconductor processing, and for e-beam testing of
dislocations, pipes, and electrical leakage.” Id. We agree with Appellants.
During prosecution claims are to be given their broadest reasonable
interpretation consistent with the Specification, In re Am. Acad. of Sci. Tech.
Ctr., 367 F.3d 1359, 1364 (Fed. Cir. 2004), without importing limitations
into the claims from the Specification, In re Van Geuns, 988 F.2d 1181,
1184 (Fed. Cir. 1993).
We construe the phrase “electrical property data of the devices.” In
the context of claim 1, “electrical property data of the devices” is electrical
data that is suitable for use in the equations of a SPICE model. See Claim 1,
steps 4–7. Appellants’ Specification is consistent with this construction:
“Various AC electrical properties and DC electrical properties, including
Cgg_Vgs, Cgc_Vgs_Vbs, Ids_Vgs_Vbs, Ids_Vds_Vgs, and Ids_Vgs_Vds,
of the foregoing three devices are respectively measured by using a
semiconductor parameter measurement instrument.” Spec. 6:1–3; see also
BSIMSOIv4.4 at 66–86. “Model parameters are extracted from the
[electrical property] data of the auxiliary devices by using a proper SPICE
model equation . . . to establish a second model.” Spec. 7:9–11.
Appeal 2016-008734
Application 13/696,437

6
Accordingly, we conclude the broadest reasonable interpretation of
“electrical property data of the devices” is electrical data that is suitable for
use in the equations of a SPICE model.
The Examiner relies on Guldi’s detection of current leakage paths,
e.g., dislocations and/or pipes, as teaching measuring “electrical property
data of the devices.” Final Act. 6 (citing Guldi ¶ 38). However, Guldi
detects current leakage paths by examining devices being tested with an
electron beam of an electron beam microscope. See Guldi ¶¶ 33, 38), Fig. 8
(items 806, 808). Although it is true that electron beam examination of
devices relies on electrical characteristics of the devices (Guldi ¶ 38, Fig. 8
(item 846), Guldi does not teach, and the Examiner does not explain, how
the detection of dislocations and pipes by an electron beam microscope
produces electrical data that is suitable for use in the equations of a SPICE
model. We conclude the Examiner has given “electrical property data of the
devices” an unreasonably broad construction. Given our corrected
construction, we do not sustain the rejection of claim 1 and claims 2–7,
which depend from claim 1.

DECISION
The decision of the Examiner to reject claims 1–7 is reversed.

REVERSED

Notice of References Cited

Application/Control No.

13/696,437
Applicant(s)/Patent Under
Reexamination
Chen, et al.
Examiner

Appeal No. 2016-008734
Art Unit

2128

Page 1 of 1

U.S. PATENT DOCUMENTS

* Document Number Country Code-Number-Kind Code Date MM-YYYY

Name

Classification

A US- 707/5

B US-

C US-

D US-

E US-

F US-

G US-

H US-

I US-

J US-

K US-

L US-

M US-
FOREIGN PATENT DOCUMENTS

* Document Number Country Code-Number-Kind Code Date MM-YYYY

Country

Name

Classification

N

O

P

Q

R

S

T
NON-PATENT DOCUMENTS
* Include as applicable: Author, Title Date, Publisher, Edition or Volume, Pertinent Pages)

U

SPICE, WIKIPEDIA, https://en.wikipedia.org/wiki/SPICE (last updated June 13, 2017; last visited Aug.17,
2017).

V

W

X

*A copy of this reference is not being furnished with this Office action. (See MPEP § 707.05(a).)
Dates in MM-YYYY format are publication dates. Classifications may be US or foreign.

U.S. Patent and Trademark Office
PTO-892 (Rev. 01-2001) Notice of References Cited Part of Paper No.
SPICE 1
Original author(s) Laurence Nagel
Initial release 1973
Written in Fortran
Type Electronic circuit simulation
License Public-domain software
SPICE 2
Initial release 1975
Stable release 2G.6 / 1983
Written in Fortran
Type Electronic circuit simulation
License Public-domain software
Website https://embedded.eecs.berkeley.edu/pubs/downloads/spice/index.htm
SPICE 3
Original author(s) Thomas Quarles
Initial release 1989
Stable release 3f.5 / July 1993
Written in C
Type Electronic circuit simulation
License BSD license
Website https://embedded.eecs.berkeley.edu/pubs/downloads/spice/index.htm
SPICE
From Wikipedia, the free encyclopedia
SPICE (Simulation Program with Integrated Circuit Emphasis)[1][2] is a
general-purpose, open source analog electronic circuit simulator. It is a
program used in integrated circuit and board-level design to check the
integrity of circuit designs and to predict circuit behavior.
Contents
◾ 1 Introduction
◾ 2 Origins
◾ 3 Transient analysis
◾ 3.1 Initial conditions for transient analysis
◾ 4 Adoption
◾ 5 Program features and structure
◾ 5.1 Analyses
◾ 5.2 Device models
◾ 5.3 Input and output: Netlists, schematic capture and
plotting
◾ 6 See also
◾ 7 References
◾ 8 External links
◾ 8.1 Histories, original papers
Page 1 of 6SPICE - Wikipedia
8/17/2017https://en.wikipedia.org/wiki/SPICE
Introduction
Unlike board-level designs composed of discrete parts, it is not practical to breadboard integrated circuits before manufacture.
Further, the high costs of photolithographic masks and other manufacturing prerequisites make it essential to design the
circuit to be as close to perfect as possible before the integrated circuit is first built. Simulating the circuit with SPICE is the
industry-standard way to verify circuit operation at the transistor level before committing to manufacturing an integrated
circuit.
Board-level circuit designs can often be breadboarded for testing. Even with a breadboard, some circuit properties may not be
accurate compared to the final printed wiring board, such as parasitic resistances and capacitances. These parasitic
components can often be estimated more accurately using SPICE simulation. Also, designers may want more information
about the circuit than is available from a single mock-up. For instance, circuit performance is affected by component
manufacturing tolerances. In these cases it is common to use SPICE to perform Monte Carlo simulations of the effect of
component variations on performance, a task which is impractical using calculations by hand for a circuit of any appreciable
complexity.
Circuit simulation programs, of which SPICE and derivatives are the most prominent, take a text netlist describing the circuit
elements (transistors, resistors, capacitors, etc.) and their connections, and translate[3] this description into equations to be
solved. The general equations produced are nonlinear differential algebraic equations which are solved using implicit
integration methods, Newton's method and sparse matrix techniques.
Origins
SPICE was developed at the Electronics Research Laboratory of the University of California, Berkeley by Laurence Nagel
with direction from his research advisor, Prof. Donald Pederson. SPICE1 was largely a derivative of the CANCER program,[4]
which Nagel had worked on under Prof. Ronald Rohrer. CANCER was an acronym for "Computer Analysis of Nonlinear
Circuits, Excluding Radiation," a hint to Berkeley's liberalism in the 1960s:[5] at these times many circuit simulators were
developed under the United States Department of Defense contracts that required the capability to evaluate the radiation
hardness of a circuit. When Nagel's original advisor, Prof. Rohrer, left Berkeley, Prof. Pederson became his advisor. Pederson
insisted that CANCER, a proprietary program, be rewritten enough that restrictions could be removed and the program could
be put in the public domain.[6]
SPICE1 was first presented at a conference in 1973.[7] SPICE1 was coded in FORTRAN and used nodal analysis to construct
the circuit equations. Nodal analysis has limitations in representing inductors, floating voltage sources and the various forms
of controlled sources. SPICE1 had relatively few circuit elements available and used a fixed-timestep transient analysis. The
real popularity of SPICE started with SPICE2[8] in 1975. SPICE2, also coded in FORTRAN, was a much-improved program
with more circuit elements, variable timestep transient analysis using either the trapezoidal (second order Adams-Moulton
method) or the Gear integration method (also known as BDF), equation formulation via modified nodal analysis[9] (avoiding
the limitations of nodal analysis), and an innovative FORTRAN-based memory allocation system developed by another
graduate student, Ellis Cohen. The last FORTRAN version of SPICE was 2G.6 in 1983. SPICE3[10] was developed by
Thomas Quarles (with A. Richard Newton as advisor) in 1989. It is written in C, uses the same netlist syntax, and added X
Window System plotting.
As an early public domain software program with source code available,[11] SPICE was widely distributed and used. Its
ubiquity became such that "to SPICE a circuit" remains synonymous with circuit simulation.[12] SPICE source code was from
the beginning distributed by UC Berkeley for a nominal charge (to cover the cost of magnetic tape). The license originally
included distribution restrictions for countries not considered friendly to the USA, but the source code is currently covered by
the BSD license.
Transient analysis
Since transient analysis is dependent on time, it uses different analysis algorithms, control options with different convergence-
related issues and different initialization parameters than DC analysis. However, since a transient analysis first performs a DC
operating point analysis (unless the UIC option is specified in the .TRAN statement), most of the DC analysis algorithms,
control options, and initialization and convergence issues apply to transient analysis.
Page 2 of 6SPICE - Wikipedia
8/17/2017https://en.wikipedia.org/wiki/SPICE
Initial conditions for transient analysis
Some circuits, such as oscillators or circuits with feedback, do not have stable operating point solutions. For these circuits,
either the feedback loop must be broken so that a DC operating point can be calculated or the initial conditions must be
provided in the simulation input. The DC operating point analysis is bypassed if the UIC parameter is included in the .TRAN
statement. If UIC is included in the .TRAN statement, a transient analysis is started using node voltages specified in an .IC
statement. If a node is set to 5 V in a .IC statement, the value at that node for the first time point (time 0) is 5 V.
You can use the .OP statement to store an estimate of the DC operating point during a transient analysis.
.TRAN 1ns 100ns UIC .OP 20ns
The .TRAN statement UIC parameter in the above example bypasses the initial DC operating point analysis. The .OP
statement calculates transient operating point at t = 20 ns during the transient analysis.
Although a transient analysis might provide a convergent DC solution, the transient analysis itself can still fail to converge. In
a transient analysis, the error message "internal timestep too small" indicates that the circuit failed to converge. The
convergence failure might be due to stated initial conditions that are not close enough to the actual DC operating point values.
Adoption
SPICE inspired and served as a basis for many other circuit simulation programs, in academia, in industry, and in commercial
products. The first commercial version of SPICE was ISPICE,[13] an interactive version on a timeshare service, National CSS.
The most prominent commercial versions of SPICE include HSPICE (originally commercialized by Shawn and Kim Hailey
of Meta Software, but now owned by Synopsys) and PSPICE (now owned by Cadence Design Systems). The academic
spinoffs of SPICE include XSPICE, developed at Georgia Tech, which added mixed analog/digital "code models" for
behavioral simulation, and Cider (previously CODECS, from UC Berkeley/Oregon State Univ.) which added semiconductor
device simulation. The integrated circuit industry adopted SPICE quickly, and until commercial versions became well
developed many IC design houses had proprietary versions of SPICE.[14]
Today a few IC manufacturers, typically the larger companies, have groups continuing to develop SPICE-based circuit
simulation programs. Among these are ADICE at Analog Devices, LTspice at Linear Technology (available to the public as
freeware), Mica at Freescale Semiconductor and TINA at Texas Instruments. Similarly to Linear Technology, Texas
Instruments makes available a freeware Windows version of the TINA software[15] (called TINA-TI[16]), which also includes
their version of SPICE and comes preloaded with models for the company's integrated circuits.[17][18] Analog Devices offers a
similar free tool called ADIsimPE (based on the SIMetrix/SIMPLIS[19] implementation of SPICE).[20] Other companies
maintain internal circuit simulators which are not directly based upon SPICE, among them PowerSpice at IBM, TITAN at
Infineon Technologies, Lynx at Intel Corporation, and Pstar at NXP Semiconductor.
The birth of SPICE was named an IEEE Milestone in 2011; the entry mentions that SPICE "evolved to become the worldwide
standard integrated circuit simulator."[21]
Program features and structure
SPICE became popular because it contained the analyses and models needed to design integrated circuits of the time, and was
robust enough and fast enough to be practical to use.[22] Precursors to SPICE often had a single purpose: The BIAS[23]
program, for example, did simulation of bipolar transistor circuit operating points; the SLIC[24] program did only small-signal
analyses. SPICE combined operating point solutions, transient analysis, and various small-signal analyses with the circuit
elements and device models needed to successfully simulate many circuits.
Analyses
SPICE2 included these analyses:
◾ AC analysis (linear small-signal frequency domain analysis)
◾ DC analysis (nonlinear quiescent point calculation)
Page 3 of 6SPICE - Wikipedia
8/17/2017https://en.wikipedia.org/wiki/SPICE
◾ DC transfer curve analysis (a sequence of nonlinear operating points calculated while sweeping an input voltage or
current, or a circuit parameter)
◾ Noise analysis (a small signal analysis done using an adjoint matrix technique which sums uncorrelated noise currents
at a chosen output point)
◾ Transfer function analysis (a small-signal input/output gain and impedance calculation)
◾ Transient analysis (time-domain large-signal solution of nonlinear differential algebraic equations)
Since SPICE is generally used to model nonlinear circuits, the small signal analyses are necessarily preceded by a quiescent
point calculation at which the circuit is linearized. SPICE2 also contained code for other small-signal analyses: sensitivity
analysis, pole-zero analysis, and small-signal distortion analysis. Analysis at various temperatures was done by automatically
updating semiconductor model parameters for temperature, allowing the circuit to be simulated at temperature extremes.
Other circuit simulators have since added many analyses beyond those in SPICE2 to address changing industry requirements.
Parametric sweeps were added to analyze circuit performance with changing manufacturing tolerances or operating
conditions. Loop gain and stability calculations were added for analog circuits. Harmonic balance or time-domain steady state
analyses were added for RF and switched-capacitor circuit design. However, a public-domain circuit simulator containing the
modern analyses and features needed to become a successor in popularity to SPICE has not yet emerged.[22]
It is very important to use appropriate analyses with carefully chosen parameters. For example, application of linear analysis
to nonlinear circuits should be justified separately. Also, application of transient analysis with default simulation parameters
can lead to qualitatively wrong conclusions on circuit dynamics.[25]
Device models
SPICE2 included many semiconductor device compact models: three levels of MOSFET model, a combined Ebers–Moll and
Gummel-Poon bipolar model, a JFET model, and a model for a junction diode. In addition, it had many other elements:
resistors, capacitors, inductors (including coupling), independent voltage and current sources, ideal transmission lines, active
components and voltage and current controlled sources.
SPICE3 added more sophisticated MOSFET models, which were required due to advances in semiconductor technology. In
particular, the BSIM family of models were added, which were also developed at UC Berkeley.
Commercial and industrial SPICE simulators have added many other device models as technology advanced and earlier
models became inadequate. To attempt standardization of these models so that a set of model parameters may be used in
different simulators, an industry working group was formed, the Compact Model Council,[26] to choose, maintain and promote
the use of standard models. The standard models today include BSIM3 (http://www-device.eecs.berkeley.edu/bsim/?
page=BSIM3), BSIM4 (http://www-device.eecs.berkeley.edu/bsim/?page=BSIM4), BSIMSOI (http://www-
device.eecs.berkeley.edu/bsim/?page=BSIMSOI), PSP (http://pspmodel.asu.edu/), HICUM (http://www.iee.et.tu-
dresden.de/iee/eb/hic_new/hic_start.html), and MEXTRAM (http://mextram.ewi.tudelft.nl/).
Input and output: Netlists, schematic capture and plotting
SPICE2 took a text netlist as input and produced line-printer listings as output, which fit with the computing environment in
1975. These listings were either columns of numbers corresponding to calculated outputs (typically voltages or currents), or
line-printer character "plots". SPICE3 retained the netlist for circuit description, but allowed analyses to be controlled from a
command-line interface similar to the C shell. SPICE3 also added basic X plotting, as UNIX and engineering workstations
became common.
Vendors and various free software projects have added schematic capture front-ends to SPICE, allowing a schematic diagram
of the circuit to be drawn and the netlist to be automatically generated. Also, graphical user interfaces were added for
selecting the simulations to be done and manipulating the voltage and current output vectors. In addition, very capable
graphing utilities have been added to see waveforms and graphs of parametric dependencies. Several free versions of these
extended programs are available, some as introductory limited packages, and some without restrictions.
See also
◾ Comparison of EDA Software
Page 4 of 6SPICE - Wikipedia
8/17/2017https://en.wikipedia.org/wiki/SPICE
◾ List of free electronics circuit simulators
◾ Input Output Buffer Information Specification (IBIS)
◾ Transistor models
References
1. Nagel, L. W, and Pederson, D. O., SPICE (Simulation Program with Integrated Circuit Emphasis), Memorandum No.
ERL-M382, University of California, Berkeley, Apr. 1973
2. Nagel, Laurence W., SPICE2: A Computer Program to Simulate Semiconductor Circuits, Memorandum No. ERL-
M520, University of California, Berkeley, May 1975
3. Warwick, Colin (May 2009). "Everything you always wanted to know about SPICE* (*But were afraid to
ask)" (http://www.nutwooduk.co.uk/pdf/Issue82.PDF#page=27) (PDF). EMC Journal. Nutwood UK Limited (82): 27
–29. ISSN 1748-9253 (https://www.worldcat.org/issn/1748-9253).
4. Nagel, L. W. & Rohrer, R. A. (August 1971). "Computer Analysis of Nonlinear Circuits, Excluding
Radiation" (http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1050166). IEEE Journal of Solid State Circuits. SC
–6: 166–182. doi:10.1109/JSSC.1971.1050166 (https://doi.org/10.1109%2FJSSC.1971.1050166).
5. Life of SPICE (http://www.designers-guide.org/Perspective/life-of-spice.pdf) Archived
(https://web.archive.org/web/20120204190147/http://www.designers-guide.org/Perspective/life-of-spice.pdf) February
4, 2012, at the Wayback Machine.
6. Perry, T. (June 1998). "Donald O. Pederson". IEEE Spectrum. 35: 22–27. doi:10.1109/6.681968
(https://doi.org/10.1109%2F6.681968).
7. 2nd spice1 ref
8. 2nd spice2 ref
9. Ho, Ruehli, and Brennan (April 1974). "The Modified Nodal Approach to Network
Analysis" (http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1084079). Proc. 1974 Int. Symposium on Circuits and
Systems, San Francisco. pp. 505–509.
10. Quarles, Thomas L., Analysis of Performance and Convergence Issues for Circuit Simulation, Memorandum No.
UCB/ERL M89/42, University of California, Berkeley, Apr. 1989.
11. history-of-spice (http://www.allaboutcircuits.com/textbook/reference/chpt-7/history-of-spice/) Archived
(https://web.archive.org/web/20161009084508/http://www.allaboutcircuits.com/textbook/reference/chpt-7/history-of-
spice/) October 9, 2016, at the Wayback Machine. on allaboutcircuits.com "The origin of SPICE traces back to another
circuit simulation program called CANCER. Developed by professor Ronald Rohrer of U.C. Berkeley along with some
of his students in the late 1960’s, CANCER continued to be improved through the early 1970’s. When Rohrer left
Berkeley, CANCER was re-written and re-named to SPICE, released as version 1 to the public domain in May of 1972.
Version 2 of SPICE was released in 1975 (version 2g6—the version used in this book—is a minor revision of this 1975
release). Instrumental in the decision to release SPICE as a public-domain computer program was professor Donald
Pederson of Berkeley, who believed that all significant technical progress happens when information is freely shared. I
for one thank him for his vision."
12. Pescovitz, David (2002-05-02). "1972: The release of SPICE, still the industry standard tool for integrated circuit
design" (http://www.coe.berkeley.edu/labnotes/0502/history.html). Lab Notes: Research from the Berkeley College of
Engineering. Retrieved 2007-03-10.
13. Vladimirescu, Andrei, SPICE -- The Third Decade, Proc. 1990 IEEE Bipolar Circuits and Technology Meeting,
Minneapolis, Sept. 1990, pp. 96–101
14. K. S. Kundert, The Designer’s Guide to SPICE and Spectre, Kluwer. Academic Publishers, Boston , 1995
15. TINA - Circuit Simulator for Analog, Digital, MCU & Mixed Circuit Simulation (http://www.tina.com/) Archived
(https://web.archive.org/web/20161105090338/http://www.tina.com/) November 5, 2016, at the Wayback Machine.
16. SPICE-Based Analog Simulation Program - TINA-TI - TI Software Folder (http://www.ti.com/tool/tina-ti) Archived
(https://web.archive.org/web/20161019062912/http://www.ti.com/tool/tina-ti) October 19, 2016, at the Wayback
Machine.
17. Art Kay (2012). Operational Amplifier Noise: Techniques and Tips for Analyzing and Reducing Noise
(https://books.google.com/books?id=0_PkTgqJD3kC&pg=PA41). Elsevier. p. 41. ISBN 978-0-08-094243-8.
18. Ron Mancini (2012). Op Amps for Everyone (https://books.google.com/books?id=0J6GtAlcHUcC&pg=PA162).
Newnes. p. 162. ISBN 978-0-12-394406-1.
19. SIMertrix/SIMPLIS (http://www.simetrix.co.uk/site/simetrix-simplis.html) Archived
(http://arquivo.pt/wayback/20160517092453/http://www.simetrix.co.uk/site/simetrix-simplis.html) May 17, 2016, at the
Portuguese Web Archive
Page 5 of 6SPICE - Wikipedia
8/17/2017https://en.wikipedia.org/wiki/SPICE
20. [1] (http://www.analog.com/en/content/adisimpe/fca.html) Archived
(https://web.archive.org/web/20140706082430/http://www.analog.com/en/content/adisimpe/fca.html) July 6, 2014, at
the Wayback Machine.
21. "List of IEEE Milestones" (http://www.ieeeghn.org/wiki/index.php/Milestones:List_of_IEEE_Milestones). IEEE
Global History Network. IEEE. Retrieved 4 August 2011.
22. Nagel, L., Is it Time for SPICE4? (http://www.cs.sandia.gov/nacdm/talks/Nagal_Larry_NACDM2004.pdf) Archived
(https://web.archive.org/web/20060926034314/http://www.cs.sandia.gov/nacdm/talks/Nagal_Larry_NACDM2004.pdf)
September 26, 2006, at the Wayback Machine., 2004 Numerical Aspects of Device and Circuit Modeling Workshop,
June 23–25, 2004, Santa Fe, New Mexico. Retrieved on 2007-11-10
23. McCalla and Howard (February 1971). "BIAS-3 – A program for nonlinear D.C. analysis of bipolar transistor
circuits" (http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1050153). IEEE J. of Solid State Circuits. 6 (1): 14–19.
doi:10.1109/JSSC.1971.1050153 (https://doi.org/10.1109%2FJSSC.1971.1050153).
24. Idleman, Jenkins, McCalla and Pederson (August 1971). "SLIC—a simulator for linear integrated
circuits" (http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1050168). IEEE J. of Solid State Circuits. 6 (4): 188
–203. doi:10.1109/JSSC.1971.1050168 (https://doi.org/10.1109%2FJSSC.1971.1050168).
25. Bianchi, Giovanni (2015). "Limitations of PLL simulation: hidden oscillations in SPICE analysis". arXiv:1506.02484
(https://arxiv.org/abs/1506.02484) .
26. "CMC - Compact Model Council" (https://web.archive.org/web/20110511071827/http://www.geia.org/index.asp?
bid=597). GEIA. Archived from the original (http://www.geia.org/index.asp?bid=597) on May 11, 2011.
External links
Histories, original papers
◾ The original SPICE1 paper (http://www.eecs.berkeley.edu/Pubs/TechRpts/1973/22871.html)
◾ L. W. Nagel's dissertation (SPICE2) (http://www.eecs.berkeley.edu/Pubs/TechRpts/1975/9602.html)
◾ Thomas Quarles' dissertation (SPICE3) (http://www.eecs.berkeley.edu/Pubs/TechRpts/1989/1216.html)
◾ A brief history of SPICE (http://www.ecircuitcenter.com/SpiceTopics/History.htm)
◾ SPICE2 and SPICE3 at UC Berkeley (http://embedded.eecs.berkeley.edu/pubs/downloads/spice/index.htm)
◾ Cider at UC Berkeley (http://embedded.eecs.berkeley.edu/pubs/downloads/cider/index.htm)
Retrieved from "https://en.wikipedia.org/w/index.php?title=SPICE&oldid=785382533"
◾ This page was last edited on 13 June 2017, at 07:02.
◾ Text is available under the Creative Commons Attribution-ShareAlike License; additional terms may apply. By using
this site, you agree to the Terms of Use and Privacy Policy. Wikipedia® is a registered trademark of the Wikimedia
Foundation, Inc., a non-profit organization.
Page 6 of 6SPICE - Wikipedia
8/17/2017https://en.wikipedia.org/wiki/SPICE